Enable Intel MOVDIRI, MOVDIR64B instructions.

[deliverable/binutils-gdb.git] / opcodes / i386-opc.h

diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 6d5044f548aa891f2b4f4ed2bf094f399e12ffed..eddd08b6c32e467e9fc0e2bb5dea87de3af48d1e 100644 (file)
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -1,5 +1,5 @@
 /* Declarations for Intel 80386 opcode table
-   Copyright (C) 2007-2017 Free Software Foundation, Inc.
+   Copyright (C) 2007-2018 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -214,14 +214,27 @@ enum
   CpuRDPID,
   /* PTWRITE instruction required */
   CpuPTWRITE,
-  /* CET instruction support required */
-  CpuCET,
+  /* CET instructions support required */
+  CpuIBT,
+  CpuSHSTK,
   /* GFNI instructions required */
   CpuGFNI,
   /* VAES instructions required */
   CpuVAES,
   /* VPCLMULQDQ instructions required */
   CpuVPCLMULQDQ,
+  /* WBNOINVD instructions required */
+  CpuWBNOINVD,
+  /* PCONFIG instructions required */
+  CpuPCONFIG,
+  /* WAITPKG instructions required */
+  CpuWAITPKG,
+  /* CLDEMOTE instruction required */
+  CpuCLDEMOTE,
+  /* MOVDIRI instruction support required */
+  CpuMOVDIRI,
+  /* MOVDIRR64B instruction required */
+  CpuMOVDIR64B,
   /* MMX register support required */
   CpuRegMMX,
   /* XMM register support required */
@@ -346,10 +359,17 @@ typedef union i386_cpu_flags
       unsigned int cpuospke:1;
       unsigned int cpurdpid:1;
       unsigned int cpuptwrite:1;
-      unsigned int cpucet:1;
+      unsigned int cpuibt:1;
+      unsigned int cpushstk:1;
       unsigned int cpugfni:1;
       unsigned int cpuvaes:1;
       unsigned int cpuvpclmulqdq:1;
+      unsigned int cpuwbnoinvd:1;
+      unsigned int cpupconfig:1;
+      unsigned int cpuwaitpkg:1;
+      unsigned int cpucldemote:1;
+      unsigned int cpumovdiri:1;
+      unsigned int cpumovdir64b:1;
       unsigned int cpuregmmx:1;
       unsigned int cpuregxmm:1;
       unsigned int cpuregymm:1;
@@ -390,8 +410,6 @@ enum
   FloatMF,
   /* src/dest swap for floats. */
   FloatR,
-  /* has float insn direction bit. */
-  FloatD,
   /* needs size prefix if in 32-bit mode */
   Size16,
   /* needs size prefix if in 16-bit mode */
@@ -450,6 +468,8 @@ enum
   ToQword,
   /* Address prefix changes operand 0 */
   AddrPrefixOp0,
+  /* Address prefix changes register operand */
+  AddrPrefixOpReg,
   /* opcode is a prefix */
   IsPrefix,
   /* instruction has extension in 8 bit imm */
@@ -520,8 +540,6 @@ enum
 #define XOP2SOURCES    1
 #define VEX3SOURCES    2
   VexSources,
-  /* instruction has VEX 8 bit imm */
-  VexImmExt,
   /* Instruction with vector SIB byte:
        1: 128bit vector register.
        2: 256bit vector register.
@@ -541,11 +559,13 @@ enum
        2: 128bit EVEX prefix.
        3: 256bit EVEX prefix.
        4: Length-ignored (LIG) EVEX prefix.
+       5: Length determined from actual operands.
    */
 #define EVEX512                1
 #define EVEX128                2
 #define EVEX256                3
 #define EVEXLIG                4
+#define EVEXDYN                5
   EVex,
 
   /* AVX512 masking support:
@@ -558,22 +578,6 @@ enum
 #define BOTH_MASKING    3
   Masking,
 
-  /* Input element size of vector insn:
-       0: 32bit.
-       1: 64bit.
-   */
-  VecESize,
-
-  /* Broadcast factor.
-       0: No broadcast.
-       1: 1to16 broadcast.
-       2: 1to8 broadcast.
-   */
-#define NO_BROADCAST   0
-#define BROADCAST_1TO16        1
-#define BROADCAST_1TO8 2
-#define BROADCAST_1TO4 3
-#define BROADCAST_1TO2 4
   Broadcast,
 
   /* Static rounding control is supported.  */
@@ -593,8 +597,9 @@ enum
    */
   ImplicitQuadGroup,
 
-  /* Compatible with old (<= 2.8.1) versions of gcc  */
-  OldGcc,
+  /* Support encoding optimization.  */
+  Optimize,
+
   /* AT&T mnemonic.  */
   ATTMnemonic,
   /* AT&T syntax.  */
@@ -622,7 +627,6 @@ typedef struct i386_opcode_modifier
   unsigned int jumpintersegment:1;
   unsigned int floatmf:1;
   unsigned int floatr:1;
-  unsigned int floatd:1;
   unsigned int size16:1;
   unsigned int size32:1;
   unsigned int size64:1;
@@ -647,6 +651,7 @@ typedef struct i386_opcode_modifier
   unsigned int todword:1;
   unsigned int toqword:1;
   unsigned int addrprefixop0:1;
+  unsigned int addrprefixopreg:1;
   unsigned int isprefix:1;
   unsigned int immext:1;
   unsigned int norex64:1;
@@ -657,20 +662,18 @@ typedef struct i386_opcode_modifier
   unsigned int vexw:2;
   unsigned int vexopcode:3;
   unsigned int vexsources:2;
-  unsigned int veximmext:1;
   unsigned int vecsib:2;
   unsigned int sse2avx:1;
   unsigned int noavx:1;
   unsigned int evex:3;
   unsigned int masking:2;
-  unsigned int vecesize:1;
-  unsigned int broadcast:3;
+  unsigned int broadcast:1;
   unsigned int staticrounding:1;
   unsigned int sae:1;
   unsigned int disp8memshift:3;
   unsigned int nodefmask:1;
   unsigned int implicitquadgroup:1;
-  unsigned int oldgcc:1;
+  unsigned int optimize:1;
   unsigned int attmnemonic:1;
   unsigned int attsyntax:1;
   unsigned int intelsyntax:1;