The patch fixed invalid compilation of instruction LD IY,(HL) and disassemble of...

[deliverable/binutils-gdb.git] / opcodes / i386-opc.h

diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index aa080cfe3615ff9cdbaaf15eba762e818cb75d3e..fc69d4d0fb689c6c490a06044774a72935a56957 100644 (file)
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -1,5 +1,5 @@
 /* Declarations for Intel 80386 opcode table
-   Copyright (C) 2007-2019 Free Software Foundation, Inc.
+   Copyright (C) 2007-2020 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -87,8 +87,10 @@ enum
   CpuSSSE3,
   /* SSE4a support required */
   CpuSSE4a,
-  /* ABM New Instructions required */
-  CpuABM,
+  /* LZCNT support required */
+  CpuLZCNT,
+  /* POPCNT support required */
+  CpuPOPCNT,
   /* SSE4.1 support required */
   CpuSSE4_1,
   /* SSE4.2 support required */
@@ -154,8 +156,6 @@ enum
   CpuF16C,
   /* Intel BMI2 support required */
   CpuBMI2,
-  /* LZCNT support required */
-  CpuLZCNT,
   /* HLE support required */
   CpuHLE,
   /* RTM support required */
@@ -298,7 +298,8 @@ typedef union i386_cpu_flags
       unsigned int cpusmx:1;
       unsigned int cpussse3:1;
       unsigned int cpusse4a:1;
-      unsigned int cpuabm:1;
+      unsigned int cpulzcnt:1;
+      unsigned int cpupopcnt:1;
       unsigned int cpusse4_1:1;
       unsigned int cpusse4_2:1;
       unsigned int cpuavx:1;
@@ -331,7 +332,6 @@ typedef union i386_cpu_flags
       unsigned int cpurdrnd:1;
       unsigned int cpuf16c:1;
       unsigned int cpubmi2:1;
-      unsigned int cpulzcnt:1;
       unsigned int cpuhle:1;
       unsigned int cpurtm:1;
       unsigned int cpuinvpcid:1;
@@ -401,8 +401,6 @@ enum
   Load,
   /* insn has a modrm byte. */
   Modrm,
-  /* register is in low 3 bits of opcode */
-  ShortForm,
   /* special case for jump insns; value has to be 1 */
 #define JUMP 1
   /* call and jump */
@@ -638,10 +636,16 @@ enum
   ATTSyntax,
   /* Intel syntax.  */
   IntelSyntax,
-  /* AMD64.  */
-  AMD64,
-  /* Intel64.  */
-  Intel64,
+  /* ISA64: Don't change the order without other code adjustments.
+       0: Common to AMD64 and Intel64.
+       1: AMD64.
+       2: Intel64.
+       3: Only in Intel64.
+   */
+#define AMD64          1
+#define INTEL64                2
+#define INTEL64ONLY    3
+  ISA64,
   /* The last bitfield in i386_opcode_modifier.  */
   Opcode_Modifier_Num
 };
@@ -652,7 +656,6 @@ typedef struct i386_opcode_modifier
   unsigned int w:1;
   unsigned int load:1;
   unsigned int modrm:1;
-  unsigned int shortform:1;
   unsigned int jump:3;
   unsigned int floatmf:1;
   unsigned int floatr:1;
@@ -705,8 +708,7 @@ typedef struct i386_opcode_modifier
   unsigned int attmnemonic:1;
   unsigned int attsyntax:1;
   unsigned int intelsyntax:1;
-  unsigned int amd64:1;
-  unsigned int intel64:1;
+  unsigned int isa64:2;
 } i386_opcode_modifier;
 
 /* Operand classes.  */