mulx, 3, 0xf2f6, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 }
pdep, 3, 0xf2f5, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 }
pext, 3, 0xf3f5, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 }
-rorx, 4, 0xf2f0, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=2|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Imm8, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 }
+rorx, 3, 0xf2f0, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=2|VexVVVV=0|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Imm8, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
sarx, 3, 0xf3f7, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
shlx, 3, 0x66f7, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
shrx, 3, 0xf2f7, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }