/* Assemble Matsushita MN10200 instructions.
- Copyright (C) 1996, 1997 Free Software Foundation, Inc.
+ Copyright (C) 1996-2020 Free Software Foundation, Inc.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+ This file is part of the GNU opcodes library.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
-#include "ansidecl.h"
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include "sysdep.h"
#include "opcode/mn10200.h"
\f
const struct mn10200_operand mn10200_operands[] = {
#define UNUSED 0
- {0, 0, 0},
+ {0, 0, 0},
/* dn register in the first register operand position. */
#define DN0 (UNUSED+1)
/* Either an open paren or close paren. */
#define PAREN (SIMM16N+1)
- {0, 0, MN10200_OPERAND_PAREN},
+ {0, 0, MN10200_OPERAND_PAREN},
/* dn register that appears in the first and second register positions. */
#define DN01 (PAREN+1)
/* an register that appears in the first and second register positions. */
#define AN01 (DN01+1)
{2, 0, MN10200_OPERAND_AREG | MN10200_OPERAND_REPEATED},
-} ;
+} ;
-#define MEM(ADDR) PAREN, ADDR, PAREN
-#define MEM2(ADDR1,ADDR2) PAREN, ADDR1, ADDR2, PAREN
+#define MEM(ADDR) PAREN, ADDR, PAREN
+#define MEM2(ADDR1,ADDR2) PAREN, ADDR1, ADDR2, PAREN
\f
/* The opcode table.