{"bgtw", 2, one(0067000), one(0177777), "BW", m68000up | mcfisa_a },
{"blew", 2, one(0067400), one(0177777), "BW", m68000up | mcfisa_a },
-{"bhil", 2, one(0061377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"blsl", 2, one(0061777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bccl", 2, one(0062377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bcsl", 2, one(0062777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bnel", 2, one(0063377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"beql", 2, one(0063777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bvcl", 2, one(0064377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bvsl", 2, one(0064777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bpll", 2, one(0065377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bmil", 2, one(0065777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bgel", 2, one(0066377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bltl", 2, one(0066777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bgtl", 2, one(0067377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"blel", 2, one(0067777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
+{"bhil", 2, one(0061377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"blsl", 2, one(0061777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"bccl", 2, one(0062377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"bcsl", 2, one(0062777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"bnel", 2, one(0063377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"beql", 2, one(0063777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"bvcl", 2, one(0064377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"bvsl", 2, one(0064777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"bpll", 2, one(0065377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"bmil", 2, one(0065777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"bgel", 2, one(0066377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"bltl", 2, one(0066777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"bgtl", 2, one(0067377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
+{"blel", 2, one(0067777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
{"bhis", 2, one(0061000), one(0177400), "BB", m68000up | mcfisa_a },
{"blss", 2, one(0061400), one(0177400), "BB", m68000up | mcfisa_a },
{"bfset", 4, two(0167300, 0), two(0177700, 0170000), "?sO2O3", m68020up },
{"bftst", 4, two(0164300, 0), two(0177700, 0170000), "/sO2O3", m68020up },
-{"bgnd", 2, one(0045372), one(0177777), "", cpu32 },
+{"bgnd", 2, one(0045372), one(0177777), "", cpu32 | fido_a },
-{"bitrev", 2, one(0000300), one(0177770), "Ds", mcfisa_aa},
+{"bitrev", 2, one(0000300), one(0177770), "Ds", mcfisa_aa | mcfisa_c},
{"bkpt", 2, one(0044110), one(0177770), "ts", m68010up },
{"braw", 2, one(0060000), one(0177777), "BW", m68000up | mcfisa_a },
-{"bral", 2, one(0060377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
+{"bral", 2, one(0060377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
{"bras", 2, one(0060000), one(0177400), "BB", m68000up | mcfisa_a },
{"bset", 2, one(0000700), one(0170700), "Dd$s", m68000up | mcfisa_a },
{"bset", 4, one(0004300), one(0177700), "#bqs", mcfisa_a },
{"bsrw", 2, one(0060400), one(0177777), "BW", m68000up | mcfisa_a },
-{"bsrl", 2, one(0060777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
+{"bsrl", 2, one(0060777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},
{"bsrs", 2, one(0060400), one(0177400), "BB", m68000up | mcfisa_a },
{"btst", 2, one(0000400), one(0170700), "Dd;b", m68000up | mcfisa_a },
{"btst", 4, one(0004000), one(0177700), "#b@s", m68000up },
{"btst", 4, one(0004000), one(0177700), "#bqs", mcfisa_a },
-{"byterev", 2, one(0001300), one(0177770), "Ds", mcfisa_aa},
+{"byterev", 2, one(0001300), one(0177770), "Ds", mcfisa_aa | mcfisa_c},
{"callm", 4, one(0003300), one(0177700), "#b!s", m68020 },
{"casw", 4, two(0006300, 0), two(0177700, 0177070), "D3D2~s", m68020up },
{"casl", 4, two(0007300, 0), two(0177700, 0177070), "D3D2~s", m68020up },
-{"chk2b", 4, two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
-{"chk2w", 4, two(0001300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
-{"chk2l", 4, two(0002300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
+{"chk2b", 4, two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
+{"chk2w", 4, two(0001300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
+{"chk2l", 4, two(0002300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
{"chkl", 2, one(0040400), one(0170700), ";lDd", m68000up },
{"chkw", 2, one(0040600), one(0170700), ";wDd", m68000up },
{"clrw", 2, one(0041100), one(0177700), "$s", m68000up | mcfisa_a },
{"clrl", 2, one(0041200), one(0177700), "$s", m68000up | mcfisa_a },
-{"cmp2b", 4, two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
-{"cmp2w", 4, two(0001300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
-{"cmp2l", 4, two(0002300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
+{"cmp2b", 4, two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
+{"cmp2w", 4, two(0001300,0), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
+{"cmp2l", 4, two(0002300,0), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
{"cmpaw", 2, one(0130300), one(0170700), "*wAd", m68000up },
{"cmpal", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a },
{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68000up },
-{"cmpib", 4, one(0006000), one(0177700), "#bDs", mcfisa_b },
+{"cmpib", 4, one(0006000), one(0177700), "#bDs", mcfisa_b | mcfisa_c },
{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68000up },
-{"cmpiw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b },
+{"cmpiw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b | mcfisa_c },
{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68000up },
{"cmpil", 6, one(0006200), one(0177700), "#lDs", mcfisa_a },
/* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */
{"cmpb", 4, one(0006000), one(0177700), "#b@s", m68000up },
-{"cmpb", 4, one(0006000), one(0177700), "#bDs", mcfisa_b },
+{"cmpb", 4, one(0006000), one(0177700), "#bDs", mcfisa_b | mcfisa_c },
{"cmpb", 2, one(0130410), one(0170770), "+s+d", m68000up },
{"cmpb", 2, one(0130000), one(0170700), ";bDd", m68000up },
-{"cmpb", 2, one(0130000), one(0170700), "*bDd", mcfisa_b },
+{"cmpb", 2, one(0130000), one(0170700), "*bDd", mcfisa_b | mcfisa_c },
{"cmpw", 2, one(0130300), one(0170700), "*wAd", m68000up },
{"cmpw", 4, one(0006100), one(0177700), "#w@s", m68000up },
-{"cmpw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b },
+{"cmpw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b | mcfisa_c },
{"cmpw", 2, one(0130510), one(0170770), "+s+d", m68000up },
-{"cmpw", 2, one(0130100), one(0170700), "*wDd", m68000up | mcfisa_b },
+{"cmpw", 2, one(0130100), one(0170700), "*wDd", m68000up | mcfisa_b | mcfisa_c },
{"cmpl", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a },
{"cmpl", 6, one(0006200), one(0177700), "#l@s", m68000up },
{"cmpl", 6, one(0006200), one(0177700), "#lDs", mcfisa_a },
{"divsw", 2, one(0100700), one(0170700), ";wDd", m68000up | mcfhwdiv },
-{"divsl", 4, two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
-{"divsl", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 },
+{"divsl", 4, two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up | cpu32 | fido_a },
+{"divsl", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up | cpu32 | fido_a },
{"divsl", 4, two(0046100,0004000),two(0177700,0107770),"qsDD", mcfhwdiv },
-{"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
-{"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 },
+{"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up | cpu32 | fido_a },
+{"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up | cpu32 | fido_a },
{"divuw", 2, one(0100300), one(0170700), ";wDd", m68000up | mcfhwdiv },
-{"divul", 4, two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
-{"divul", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 },
+{"divul", 4, two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up | cpu32 | fido_a },
+{"divul", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up | cpu32 | fido_a },
{"divul", 4, two(0046100,0000000),two(0177700,0107770),"qsDD", mcfhwdiv },
-{"divull", 4, two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
-{"divull", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 },
+{"divull", 4, two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up | cpu32 | fido_a },
+{"divull", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up | cpu32 | fido_a },
{"eorib", 4, one(0005000), one(0177700), "#b$s", m68000up },
{"eorib", 4, one(0005074), one(0177777), "#bCs", m68000up },
{"extw", 2, one(0044200), one(0177770), "Ds", m68000up|mcfisa_a },
{"extl", 2, one(0044300), one(0177770), "Ds", m68000up|mcfisa_a },
-{"extbl", 2, one(0044700), one(0177770), "Ds", m68020up|cpu32|mcfisa_a },
+{"extbl", 2, one(0044700), one(0177770), "Ds", m68020up | cpu32 | fido_a | mcfisa_a },
-{"ff1", 2, one(0002300), one(0177770), "Ds", mcfisa_aa},
+{"ff1", 2, one(0002300), one(0177770), "Ds", mcfisa_aa | mcfisa_c},
/* float stuff starts here */
{"halt", 2, one(0045310), one(0177777), "", m68060 | mcfisa_a },
{"illegal", 2, one(0045374), one(0177777), "", m68000up | mcfisa_a },
-{"intouch", 2, one(0xf428), one(0xfff8), "As", mcfisa_b },
+{"intouch", 2, one(0xf428), one(0xfff8), "As", mcfisa_b | mcfisa_c },
{"jmp", 2, one(0047300), one(0177700), "!s", m68000up | mcfisa_a },
-{"jra", 2, one(0060000), one(0177400), "Bg", m68000up | mcfisa_a },
+{"jra", 2, one(0060000), one(0177400), "Bb", m68000up | mcfisa_a },
{"jra", 2, one(0047300), one(0177700), "!s", m68000up | mcfisa_a },
{"jsr", 2, one(0047200), one(0177700), "!s", m68000up | mcfisa_a },
-{"jbsr", 2, one(0060400), one(0177400), "Bg", m68000up | mcfisa_a },
+{"jbsr", 2, one(0060400), one(0177400), "Bs", m68000up | mcfisa_a },
{"jbsr", 2, one(0047200), one(0177700), "!s", m68000up | mcfisa_a },
{"lea", 2, one(0040700), one(0170700), "!sAd", m68000up | mcfisa_a },
-{"lpstop", 6, two(0174000,0000700),two(0177777,0177777),"#w", cpu32|m68060 },
+{"lpstop", 6, two(0174000,0000700),two(0177777,0177777),"#w", cpu32 | fido_a | m68060 },
{"linkw", 4, one(0047120), one(0177770), "As#w", m68000up | mcfisa_a },
-{"linkl", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 },
+{"linkl", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 | fido_a },
{"link", 4, one(0047120), one(0177770), "As#W", m68000up | mcfisa_a },
-{"link", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 },
+{"link", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 | fido_a },
{"lslb", 2, one(0160410), one(0170770), "QdDs", m68000up },
{"lslb", 2, one(0160450), one(0170770), "DdDs", m68000up },
{"moveb", 2, one(0010200), one(0170700), "obad", mcfisa_a },
{"moveb", 2, one(0010300), one(0170700), "ob+d", mcfisa_a },
{"moveb", 2, one(0010400), one(0170700), "ob-d", mcfisa_a },
-{"moveb", 2, one(0010000), one(0170000), "obnd", mcfisa_b },
+{"moveb", 2, one(0010000), one(0170000), "obnd", mcfisa_b | mcfisa_c },
{"movew", 2, one(0030000), one(0170000), "*w%d", m68000up },
{"movew", 2, one(0030000), one(0170000), "ms%d", mcfisa_a },
{"movew", 2, one(0030000), one(0170000), "nspd", mcfisa_a },
{"movew", 2, one(0030000), one(0170000), "owmd", mcfisa_a },
-{"movew", 2, one(0030000), one(0170000), "ownd", mcfisa_b },
+{"movew", 2, one(0030000), one(0170000), "ownd", mcfisa_b | mcfisa_c },
{"movew", 2, one(0040300), one(0177700), "Ss$s", m68000up },
{"movew", 2, one(0040300), one(0177770), "SsDs", mcfisa_a },
{"movew", 2, one(0041300), one(0177700), "Cs$s", m68010up },
{"movel", 2, one(0020000), one(0170000), "ms%d", mcfisa_a },
{"movel", 2, one(0020000), one(0170000), "nspd", mcfisa_a },
{"movel", 2, one(0020000), one(0170000), "olmd", mcfisa_a },
-{"movel", 2, one(0020000), one(0170000), "olnd", mcfisa_b },
+{"movel", 2, one(0020000), one(0170000), "olnd", mcfisa_b | mcfisa_c },
{"movel", 2, one(0047140), one(0177770), "AsUd", m68000up | mcfusp },
{"movel", 2, one(0047150), one(0177770), "UdAs", m68000up | mcfusp },
{"movel", 2, one(0120600), one(0177760), "EsRs", mcfmac },
{"move", 2, one(0030000), one(0170000), "ms%d", mcfisa_a },
{"move", 2, one(0030000), one(0170000), "nspd", mcfisa_a },
{"move", 2, one(0030000), one(0170000), "owmd", mcfisa_a },
-{"move", 2, one(0030000), one(0170000), "ownd", mcfisa_b },
+{"move", 2, one(0030000), one(0170000), "ownd", mcfisa_b | mcfisa_c },
{"move", 2, one(0040300), one(0177700), "Ss$s", m68000up },
{"move", 2, one(0040300), one(0177770), "SsDs", mcfisa_a },
{"move", 2, one(0041300), one(0177700), "Cs$s", m68010up },
{"move", 2, one(0047140), one(0177770), "AsUd", m68000up },
{"move", 2, one(0047150), one(0177770), "UdAs", m68000up },
-{"mov3ql", 2, one(0120500), one(0170700), "xd%s", mcfisa_b },
-{"mvsb", 2, one(0070400), one(0170700), "*bDd", mcfisa_b },
-{"mvsw", 2, one(0070500), one(0170700), "*wDd", mcfisa_b },
-{"mvzb", 2, one(0070600), one(0170700), "*bDd", mcfisa_b },
-{"mvzw", 2, one(0070700), one(0170700), "*wDd", mcfisa_b },
+{"mov3ql", 2, one(0120500), one(0170700), "xd%s", mcfisa_b | mcfisa_c },
+{"mvsb", 2, one(0070400), one(0170700), "*bDd", mcfisa_b | mcfisa_c },
+{"mvsw", 2, one(0070500), one(0170700), "*wDd", mcfisa_b | mcfisa_c },
+{"mvzb", 2, one(0070600), one(0170700), "*bDd", mcfisa_b | mcfisa_c },
+{"mvzw", 2, one(0070700), one(0170700), "*wDd", mcfisa_b | mcfisa_c },
{"movesb", 4, two(0007000, 0), two(0177700, 07777), "~sR1", m68010up },
{"movesb", 4, two(0007000, 04000), two(0177700, 07777), "R1~s", m68010up },
{"msacl", 4, two(0xa000, 0x0900), two(0xf130, 0x0f00), "RMRmeH", mcfemac },
{"mulsw", 2, one(0140700), one(0170700), ";wDd", m68000up|mcfisa_a },
-{"mulsl", 4, two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
+{"mulsl", 4, two(0046000,004000), two(0177700,0107770), ";lD1", m68020up | cpu32 | fido_a },
{"mulsl", 4, two(0046000,004000), two(0177700,0107770), "qsD1", mcfisa_a },
-{"mulsl", 4, two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
+{"mulsl", 4, two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up | cpu32 | fido_a },
{"muluw", 2, one(0140300), one(0170700), ";wDd", m68000up|mcfisa_a },
-{"mulul", 4, two(0046000,000000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
+{"mulul", 4, two(0046000,000000), two(0177700,0107770), ";lD1", m68020up | cpu32 | fido_a },
{"mulul", 4, two(0046000,000000), two(0177700,0107770), "qsD1", mcfisa_a },
-{"mulul", 4, two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
+{"mulul", 4, two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up | cpu32 | fido_a },
{"nbcd", 2, one(0044000), one(0177700), "$s", m68000up },
{"rts", 2, one(0047165), one(0177777), "", m68000up | mcfisa_a },
-{"satsl", 2, one(0046200), one(0177770), "Ds", mcfisa_b },
+{"satsl", 2, one(0046200), one(0177770), "Ds", mcfisa_b | mcfisa_c },
{"sbcd", 2, one(0100400), one(0170770), "DsDd", m68000up },
{"sbcd", 2, one(0100410), one(0170770), "-s-d", m68000up },
/* Traps have to come before conditional sets, as they have a more
specific opcode. */
-{"trapcc", 2, one(0052374), one(0177777), "", m68020up | cpu32 },
-{"trapcs", 2, one(0052774), one(0177777), "", m68020up | cpu32 },
-{"trapeq", 2, one(0053774), one(0177777), "", m68020up | cpu32 },
+{"trapcc", 2, one(0052374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapcs", 2, one(0052774), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapeq", 2, one(0053774), one(0177777), "", m68020up | cpu32 | fido_a },
{"tpf", 2, one(0050774), one(0177777), "", mcfisa_a },
-{"trapf", 2, one(0050774), one(0177777), "", m68020up | cpu32 | mcfisa_a },
-{"trapge", 2, one(0056374), one(0177777), "", m68020up | cpu32 },
-{"trapgt", 2, one(0057374), one(0177777), "", m68020up | cpu32 },
-{"traphi", 2, one(0051374), one(0177777), "", m68020up | cpu32 },
-{"traple", 2, one(0057774), one(0177777), "", m68020up | cpu32 },
-{"trapls", 2, one(0051774), one(0177777), "", m68020up | cpu32 },
-{"traplt", 2, one(0056774), one(0177777), "", m68020up | cpu32 },
-{"trapmi", 2, one(0055774), one(0177777), "", m68020up | cpu32 },
-{"trapne", 2, one(0053374), one(0177777), "", m68020up | cpu32 },
-{"trappl", 2, one(0055374), one(0177777), "", m68020up | cpu32 },
-{"trapt", 2, one(0050374), one(0177777), "", m68020up | cpu32 },
-{"trapvc", 2, one(0054374), one(0177777), "", m68020up | cpu32 },
-{"trapvs", 2, one(0054774), one(0177777), "", m68020up | cpu32 },
-
-{"trapccw", 4, one(0052372), one(0177777), "#w", m68020up|cpu32 },
-{"trapcsw", 4, one(0052772), one(0177777), "#w", m68020up|cpu32 },
-{"trapeqw", 4, one(0053772), one(0177777), "#w", m68020up|cpu32 },
+{"trapf", 2, one(0050774), one(0177777), "", m68020up | cpu32 | fido_a | mcfisa_a },
+{"trapge", 2, one(0056374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapgt", 2, one(0057374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"traphi", 2, one(0051374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"traple", 2, one(0057774), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapls", 2, one(0051774), one(0177777), "", m68020up | cpu32 | fido_a },
+{"traplt", 2, one(0056774), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapmi", 2, one(0055774), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapne", 2, one(0053374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trappl", 2, one(0055374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapt", 2, one(0050374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapvc", 2, one(0054374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapvs", 2, one(0054774), one(0177777), "", m68020up | cpu32 | fido_a },
+
+{"trapccw", 4, one(0052372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapcsw", 4, one(0052772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapeqw", 4, one(0053772), one(0177777), "#w", m68020up | cpu32 | fido_a },
{"tpfw", 4, one(0050772), one(0177777), "#w", mcfisa_a},
-{"trapfw", 4, one(0050772), one(0177777), "#w", m68020up|cpu32|mcfisa_a},
-{"trapgew", 4, one(0056372), one(0177777), "#w", m68020up|cpu32 },
-{"trapgtw", 4, one(0057372), one(0177777), "#w", m68020up|cpu32 },
-{"traphiw", 4, one(0051372), one(0177777), "#w", m68020up|cpu32 },
-{"traplew", 4, one(0057772), one(0177777), "#w", m68020up|cpu32 },
-{"traplsw", 4, one(0051772), one(0177777), "#w", m68020up|cpu32 },
-{"trapltw", 4, one(0056772), one(0177777), "#w", m68020up|cpu32 },
-{"trapmiw", 4, one(0055772), one(0177777), "#w", m68020up|cpu32 },
-{"trapnew", 4, one(0053372), one(0177777), "#w", m68020up|cpu32 },
-{"trapplw", 4, one(0055372), one(0177777), "#w", m68020up|cpu32 },
-{"traptw", 4, one(0050372), one(0177777), "#w", m68020up|cpu32 },
-{"trapvcw", 4, one(0054372), one(0177777), "#w", m68020up|cpu32 },
-{"trapvsw", 4, one(0054772), one(0177777), "#w", m68020up|cpu32 },
-
-{"trapccl", 6, one(0052373), one(0177777), "#l", m68020up|cpu32 },
-{"trapcsl", 6, one(0052773), one(0177777), "#l", m68020up|cpu32 },
-{"trapeql", 6, one(0053773), one(0177777), "#l", m68020up|cpu32 },
+{"trapfw", 4, one(0050772), one(0177777), "#w", m68020up | cpu32 | fido_a | mcfisa_a},
+{"trapgew", 4, one(0056372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapgtw", 4, one(0057372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"traphiw", 4, one(0051372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"traplew", 4, one(0057772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"traplsw", 4, one(0051772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapltw", 4, one(0056772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapmiw", 4, one(0055772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapnew", 4, one(0053372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapplw", 4, one(0055372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"traptw", 4, one(0050372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapvcw", 4, one(0054372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapvsw", 4, one(0054772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+
+{"trapccl", 6, one(0052373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapcsl", 6, one(0052773), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapeql", 6, one(0053773), one(0177777), "#l", m68020up | cpu32 | fido_a },
{"tpfl", 6, one(0050773), one(0177777), "#l", mcfisa_a},
-{"trapfl", 6, one(0050773), one(0177777), "#l", m68020up|cpu32|mcfisa_a},
-{"trapgel", 6, one(0056373), one(0177777), "#l", m68020up|cpu32 },
-{"trapgtl", 6, one(0057373), one(0177777), "#l", m68020up|cpu32 },
-{"traphil", 6, one(0051373), one(0177777), "#l", m68020up|cpu32 },
-{"traplel", 6, one(0057773), one(0177777), "#l", m68020up|cpu32 },
-{"traplsl", 6, one(0051773), one(0177777), "#l", m68020up|cpu32 },
-{"trapltl", 6, one(0056773), one(0177777), "#l", m68020up|cpu32 },
-{"trapmil", 6, one(0055773), one(0177777), "#l", m68020up|cpu32 },
-{"trapnel", 6, one(0053373), one(0177777), "#l", m68020up|cpu32 },
-{"trappll", 6, one(0055373), one(0177777), "#l", m68020up|cpu32 },
-{"traptl", 6, one(0050373), one(0177777), "#l", m68020up|cpu32 },
-{"trapvcl", 6, one(0054373), one(0177777), "#l", m68020up|cpu32 },
-{"trapvsl", 6, one(0054773), one(0177777), "#l", m68020up|cpu32 },
+{"trapfl", 6, one(0050773), one(0177777), "#l", m68020up | cpu32 | fido_a | mcfisa_a},
+{"trapgel", 6, one(0056373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapgtl", 6, one(0057373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"traphil", 6, one(0051373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"traplel", 6, one(0057773), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"traplsl", 6, one(0051773), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapltl", 6, one(0056773), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapmil", 6, one(0055773), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapnel", 6, one(0053373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trappll", 6, one(0055373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"traptl", 6, one(0050373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapvcl", 6, one(0054373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapvsl", 6, one(0054773), one(0177777), "#l", m68020up | cpu32 | fido_a },
{"trapv", 2, one(0047166), one(0177777), "", m68000up },
{"svs", 2, one(0054700), one(0177700), "$s", m68000up },
{"svs", 2, one(0054700), one(0177770), "Ds", mcfisa_a },
+{"sleep", 2, one(0047170), one(0177777), "", fido_a },
+
{"stop", 4, one(0047162), one(0177777), "#w", m68000up | mcfisa_a },
{"strldsr", 4, two(0040347,0043374), two(0177777,0177777), "#w", mcfisa_aa},
{"swbeg", 4, one(0045374), one(0177777), "#w", m68000up | mcfisa_a },
{"swbegl", 6, one(0045375), one(0177777), "#l", m68000up | mcfisa_a },
-{"tas", 2, one(0045300), one(0177700), "$s", m68000up | mcfisa_b},
+{"tas", 2, one(0045300), one(0177700), "$s", m68000up | mcfisa_b | mcfisa_c},
#define TBL1(name,insn_size,signed,round,size) \
{name, insn_size, two(0174000, (signed<<11)|(!round<<10)|(size<<6)|0000400), \
two(0177770,0107770), "DsD3D1", cpu32 }
#define TBL(name1, name2, name3, s, r) \
TBL1(name1, 4, s, r, 0), TBL1(name2, 4, s, r, 1), TBL1(name3, 4, s, r, 2)
-TBL("tblsb", "tblsw", "tblsl", 2, 1),
-TBL("tblsnb", "tblsnw", "tblsnl", 2, 0),
+TBL("tblsb", "tblsw", "tblsl", 1, 1),
+TBL("tblsnb", "tblsnw", "tblsnl", 1, 0),
TBL("tblub", "tbluw", "tblul", 0, 1),
TBL("tblunb", "tblunw", "tblunl", 0, 0),
{"trap", 2, one(0047100), one(0177760), "Ts", m68000up | mcfisa_a },
-{"tstb", 2, one(0045000), one(0177700), ";b", m68020up|cpu32|mcfisa_a },
+{"trapx", 2, one(0047060), one(0177760), "Ts", fido_a },
+
+{"tstb", 2, one(0045000), one(0177700), ";b", m68020up | cpu32 | fido_a | mcfisa_a },
{"tstb", 2, one(0045000), one(0177700), "$b", m68000up },
-{"tstw", 2, one(0045100), one(0177700), "*w", m68020up|cpu32|mcfisa_a },
+{"tstw", 2, one(0045100), one(0177700), "*w", m68020up | cpu32 | fido_a | mcfisa_a },
{"tstw", 2, one(0045100), one(0177700), "$w", m68000up },
-{"tstl", 2, one(0045200), one(0177700), "*l", m68020up|cpu32|mcfisa_a },
+{"tstl", 2, one(0045200), one(0177700), "*l", m68020up | cpu32 | fido_a | mcfisa_a },
{"tstl", 2, one(0045200), one(0177700), "$l", m68000up },
{"unlk", 2, one(0047130), one(0177770), "As", m68000up | mcfisa_a },
projects / deliverable / binutils-gdb.git / blobdiff