i386: Also check R12-R15 registers when optimizing testq to testb

[deliverable/binutils-gdb.git] / opcodes / mcore-dis.c

diff --git a/opcodes/mcore-dis.c b/opcodes/mcore-dis.c
index dc62099e7aee11f091f174837e68814efb895b3c..5c0eb084f79f3d59dc76f6757e45dd4b0d88774f 100644 (file)
--- a/opcodes/mcore-dis.c
+++ b/opcodes/mcore-dis.c
@@ -1,5 +1,5 @@
 /* Disassemble Motorola M*Core instructions.
-   Copyright (C) 1993-2015 Free Software Foundation, Inc.
+   Copyright (C) 1993-2019 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -20,11 +20,12 @@
 
 #include "sysdep.h"
 #include <stdio.h>
+#include "libiberty.h"
 #define STATIC_TABLE
 #define DEFINE_TABLE
 
 #include "mcore-opc.h"
-#include "dis-asm.h"
+#include "disassemble.h"
 
 /* Mask for each mcore_opclass: */
 static const unsigned short imsk[] = {
@@ -88,15 +89,14 @@ static const char *crname[] = {
 static const unsigned isiz[] = { 2, 0, 1, 0 };
 
 int
-print_insn_mcore (memaddr, info)
-     bfd_vma memaddr;
-     struct disassemble_info *info;
+print_insn_mcore (bfd_vma memaddr,
+                 struct disassemble_info *info)
 {
   unsigned char ibytes[4];
   fprintf_ftype print_func = info->fprintf_func;
   void *stream = info->stream;
   unsigned short inst;
-  const mcore_opcode_info *op;
+  unsigned int i;
   int status;
 
   info->bytes_per_chunk = 2;
@@ -117,19 +117,19 @@ print_insn_mcore (memaddr, info)
     abort ();
 
   /* Just a linear search of the table.  */
-  for (op = mcore_table; op->name != 0; op++)
-    if (op->inst == (inst & imsk[op->opclass]))
+  for (i = 0; i < ARRAY_SIZE (mcore_table); i++)
+    if (mcore_table[i].inst == (inst & imsk[mcore_table[i].opclass]))
       break;
 
-  if (op->name == 0)
+  if (i == ARRAY_SIZE (mcore_table))
     (*print_func) (stream, ".short 0x%04x", inst);
   else
     {
       const char *name = grname[inst & 0x0F];
 
-      (*print_func) (stream, "%s", op->name);
+      (*print_func) (stream, "%s", mcore_table[i].name);
 
-      switch (op->opclass)
+      switch (mcore_table[i].opclass)
        {
        case O0:
          break;
@@ -203,7 +203,7 @@ print_insn_mcore (memaddr, info)
 
            (*print_func) (stream, "\t0x%lx", (long)(memaddr + 2 + (val << 1)));
 
-           if (strcmp (op->name, "bsr") == 0)
+           if (strcmp (mcore_table[i].name, "bsr") == 0)
              {
                /* For bsr, we'll try to get a symbol for the target.  */
                val = memaddr + 2 + (val << 1);
@@ -233,6 +233,9 @@ print_insn_mcore (memaddr, info)
 
            val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC;
 
+           /* We are not reading an instruction, so allow
+              reads to extend beyond the next symbol.  */
+           info->stop_vma = 0;
            status = info->read_memory_func (val, ibytes, 4, info);
            if (status != 0)
              {
@@ -263,6 +266,9 @@ print_insn_mcore (memaddr, info)
 
            val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC;
 
+           /* We are not reading an instruction, so allow
+              reads to extend beyond the next symbol.  */
+           info->stop_vma = 0;
            status = info->read_memory_func (val, ibytes, 4, info);
            if (status != 0)
              {