AArch64: Add SVE constraints verifier.

[deliverable/binutils-gdb.git] / opcodes / microblaze-dis.c

diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
index b4723c20e1b0e12034964b4f16bff41d63d7db66..3b676d8b3961ca8ef60ad5ef3fcf1e27dcc2d50e 100644 (file)
--- a/opcodes/microblaze-dis.c
+++ b/opcodes/microblaze-dis.c
@@ -1,6 +1,6 @@
 /* Disassemble Xilinx microblaze instructions.
 
-   Copyright 2009 Free Software Foundation, Inc.
+   Copyright (C) 2009-2018 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -24,7 +24,7 @@
 #define STATIC_TABLE
 #define DEFINE_TABLE
 
-#include "dis-asm.h"
+#include "disassemble.h"
 #include <strings.h>
 #include "microblaze-opc.h"
 #include "microblaze-dis.h"
@@ -64,6 +64,15 @@ get_field_imm5 (long instr)
   return (strdup (tmpstr));
 }
 
+static char *
+get_field_imm5_mbar (long instr)
+{
+  char tmpstr[25];
+
+  sprintf(tmpstr, "%d", (short)((instr & IMM5_MBAR_MASK) >> IMM_MBAR));
+  return(strdup(tmpstr));
+}
+
 static char *
 get_field_rfsl (long instr)
 {
@@ -130,6 +139,12 @@ get_field_special (long instr, struct op_code_struct * op)
     case REG_TLBSX_MASK :
       strcpy (spr, "tlbsx");
       break;
+    case REG_SHR_MASK :
+      strcpy (spr, "shr");
+      break;
+    case REG_SLR_MASK :
+      strcpy (spr, "slr");
+      break;
     default :
       if (((((instr & IMM_MASK) >> IMM_LOW) ^ op->immval_mask) & 0xE000)
           == REG_PVR_MASK)
@@ -186,7 +201,7 @@ read_insn_microblaze (bfd_vma memaddr,
 int
 print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
 {
-  fprintf_ftype       fprintf = info->fprintf_func;
+  fprintf_ftype       print_func = info->fprintf_func;
   void *              stream = info->stream;
   unsigned long       inst, prev_inst;
   struct op_code_struct * op, *pop;
@@ -227,19 +242,19 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
   prev_insn_vma = curr_insn_vma;
 
   if (op->name == NULL)
-    fprintf (stream, ".short 0x%04x", inst);
+    print_func (stream, ".short 0x%04x", (unsigned int) inst);
   else
     {
-      fprintf (stream, "%s", op->name);
+      print_func (stream, "%s", op->name);
 
       switch (op->inst_type)
        {
         case INST_TYPE_RD_R1_R2:
-          fprintf (stream, "\t%s, %s, %s", get_field_rd (inst),
+          print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
                   get_field_r1(inst), get_field_r2 (inst));
           break;
         case INST_TYPE_RD_R1_IMM:
-         fprintf (stream, "\t%s, %s, %s", get_field_rd (inst),
+         print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
                   get_field_r1(inst), get_field_imm (inst));
          if (info->print_address_func && get_int_field_r1 (inst) == 0
              && info->symbol_at_address_func)
@@ -254,37 +269,37 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
                }
              if (immval > 0 && info->symbol_at_address_func (immval, info))
                {
-                 fprintf (stream, "\t// ");
+                 print_func (stream, "\t// ");
                  info->print_address_func (immval, info);
                }
            }
          break;
        case INST_TYPE_RD_R1_IMM5:
-         fprintf (stream, "\t%s, %s, %s", get_field_rd (inst),
+         print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
                   get_field_r1(inst), get_field_imm5 (inst));
          break;
        case INST_TYPE_RD_RFSL:
-         fprintf (stream, "\t%s, %s", get_field_rd (inst), get_field_rfsl (inst));
+         print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_rfsl (inst));
          break;
        case INST_TYPE_R1_RFSL:
-         fprintf (stream, "\t%s, %s", get_field_r1 (inst), get_field_rfsl (inst));
+         print_func (stream, "\t%s, %s", get_field_r1 (inst), get_field_rfsl (inst));
          break;
        case INST_TYPE_RD_SPECIAL:
-         fprintf (stream, "\t%s, %s", get_field_rd (inst),
+         print_func (stream, "\t%s, %s", get_field_rd (inst),
                   get_field_special (inst, op));
          break;
        case INST_TYPE_SPECIAL_R1:
-         fprintf (stream, "\t%s, %s", get_field_special (inst, op),
+         print_func (stream, "\t%s, %s", get_field_special (inst, op),
                   get_field_r1(inst));
          break;
        case INST_TYPE_RD_R1:
-         fprintf (stream, "\t%s, %s", get_field_rd (inst), get_field_r1 (inst));
+         print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r1 (inst));
          break;
        case INST_TYPE_R1_R2:
-         fprintf (stream, "\t%s, %s", get_field_r1 (inst), get_field_r2 (inst));
+         print_func (stream, "\t%s, %s", get_field_r1 (inst), get_field_r2 (inst));
          break;
        case INST_TYPE_R1_IMM:
-         fprintf (stream, "\t%s, %s", get_field_r1 (inst), get_field_imm (inst));
+         print_func (stream, "\t%s, %s", get_field_r1 (inst), get_field_imm (inst));
          /* The non-pc relative instructions are returns, which shouldn't
             have a label printed.  */
          if (info->print_address_func && op->inst_offset_type == INST_PC_OFFSET
@@ -301,18 +316,18 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
              immval += memaddr;
              if (immval > 0 && info->symbol_at_address_func (immval, info))
                {
-                 fprintf (stream, "\t// ");
+                 print_func (stream, "\t// ");
                  info->print_address_func (immval, info);
                }
              else
                {
-                 fprintf (stream, "\t\t// ");
-                 fprintf (stream, "%x", immval);
+                 print_func (stream, "\t\t// ");
+                 print_func (stream, "%x", immval);
                }
            }
          break;
         case INST_TYPE_RD_IMM:
-         fprintf (stream, "\t%s, %s", get_field_rd (inst), get_field_imm (inst));
+         print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm (inst));
          if (info->print_address_func && info->symbol_at_address_func)
            {
            if (immfound)
@@ -327,13 +342,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
              immval += (int) memaddr;
            if (info->symbol_at_address_func (immval, info))
              {
-               fprintf (stream, "\t// ");
+               print_func (stream, "\t// ");
                info->print_address_func (immval, info);
              }
            }
          break;
         case INST_TYPE_IMM:
-         fprintf (stream, "\t%s", get_field_imm (inst));
+         print_func (stream, "\t%s", get_field_imm (inst));
          if (info->print_address_func && info->symbol_at_address_func
              && op->instr != imm)
            {
@@ -349,41 +364,48 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
                immval += (int) memaddr;
              if (immval > 0 && info->symbol_at_address_func (immval, info))
                {
-                 fprintf (stream, "\t// ");
+                 print_func (stream, "\t// ");
                  info->print_address_func (immval, info);
                }
              else if (op->inst_offset_type == INST_PC_OFFSET)
                {
-                 fprintf (stream, "\t\t// ");
-                 fprintf (stream, "%x", immval);
+                 print_func (stream, "\t\t// ");
+                 print_func (stream, "%x", immval);
                }
            }
          break;
         case INST_TYPE_RD_R2:
-         fprintf (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst));
+         print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst));
          break;
        case INST_TYPE_R2:
-         fprintf (stream, "\t%s", get_field_r2 (inst));
+         print_func (stream, "\t%s", get_field_r2 (inst));
          break;
        case INST_TYPE_R1:
-         fprintf (stream, "\t%s", get_field_r1 (inst));
+         print_func (stream, "\t%s", get_field_r1 (inst));
          break;
-       case INST_TYPE_RD_R1_SPECIAL:
-         fprintf (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst));
+       case INST_TYPE_R1_R2_SPECIAL:
+         print_func (stream, "\t%s, %s", get_field_r1 (inst), get_field_r2 (inst));
          break;
        case INST_TYPE_RD_IMM15:
-         fprintf (stream, "\t%s, %s", get_field_rd (inst), get_field_imm15 (inst));
+         print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm15 (inst));
          break;
+        /* For mbar insn.  */
+        case INST_TYPE_IMM5:
+          print_func (stream, "\t%s", get_field_imm5_mbar (inst));
+          break;
+        /* For mbar 16 or sleep insn.  */
+        case INST_TYPE_NONE:
+          break;
        /* For tuqula instruction */
        case INST_TYPE_RD:
-         fprintf (stream, "\t%s", get_field_rd (inst));
+         print_func (stream, "\t%s", get_field_rd (inst));
          break;
        case INST_TYPE_RFSL:
-         fprintf (stream, "\t%s", get_field_rfsl (inst));
+         print_func (stream, "\t%s", get_field_rfsl (inst));
          break;
        default:
          /* If the disassembler lags the instruction set.  */
-         fprintf (stream, "\tundecoded operands, inst is 0x%04x", inst);
+         print_func (stream, "\tundecoded operands, inst is 0x%04x", (unsigned int) inst);
          break;
        }
     }
@@ -418,7 +440,7 @@ get_insn_microblaze (long inst,
 }
 
 enum microblaze_instr
-microblaze_decode_insn (long insn, int *rd, int *ra, int *rb, int *imm)
+microblaze_decode_insn (long insn, int *rd, int *ra, int *rb, int *immed)
 {
   enum microblaze_instr op;
   bfd_boolean t1;
@@ -430,7 +452,7 @@ microblaze_decode_insn (long insn, int *rd, int *ra, int *rb, int *imm)
   *ra = (insn & RA_MASK) >> RA_LOW;
   *rb = (insn & RB_MASK) >> RB_LOW;
   t3 = (insn & IMM_MASK) >> IMM_LOW;
-  *imm = (int) t3;
+  *immed = (int) t3;
   return (op);
 }