[AArch64][4/6] LD support TLSLD move/add relocation types

[deliverable/binutils-gdb.git] / opcodes / msp430-dis.c

diff --git a/opcodes/msp430-dis.c b/opcodes/msp430-dis.c
index 46da3ccc653eba259b1a60c92149e0bde9691518..a398ca43c73a55e07493568f13d40fbf2dd18302 100644 (file)
--- a/opcodes/msp430-dis.c
+++ b/opcodes/msp430-dis.c
@@ -1,8 +1,8 @@
 /* Disassemble MSP430 instructions.
-   Copyright (C) 2002-2013 Free Software Foundation, Inc.
+   Copyright (C) 2002-2015 Free Software Foundation, Inc.
 
    Contributed by Dmitry Diky <diwil@mail.ru>
-        
+
    This file is part of the GNU opcodes library.
 
    This library is free software; you can redistribute it and/or modify
@@ -66,7 +66,7 @@ msp430_nooperands (struct msp430_opcode_s *opcode,
 
   if (opcode->fmt == 0)
     {
-      if ((insn & 0x0f00) != 3 || (insn & 0x0f00) != 2)
+      if ((insn & 0x0f00) != 0x0300 || (insn & 0x0f00) != 0x0200)
        return 0;
 
       strcpy (comm, "emulated...");
@@ -397,7 +397,7 @@ msp430_doubleoperand (disassemble_info *info,
         Rm             Register,
          x(Rm)         Indexed,
          0xXXXX        Relative,
-         &0xXXXX       Absolute 
+         &0xXXXX       Absolute
          emulated_ins   dst
          basic_ins      dst, dst.  */
 
@@ -427,7 +427,7 @@ msp430_doubleoperand (disassemble_info *info,
              sprintf (op1, "0x%04x", PS (dst));
              sprintf (comm1, "PC rel. 0x%04x",
                       PS ((short) addr + 2 + dst));
-             if (extended_dst)
+             if (extension_word)
                {
                  dst |= extended_dst << 16;
                  if (dst & 0x80000)
@@ -448,7 +448,7 @@ msp430_doubleoperand (disassemble_info *info,
              cmd_len += 4;
              *cycles = 6;
              sprintf (op1, "&0x%04x", PS (dst));
-             if (extended_dst)
+             if (extension_word)
                {
                  dst |= extended_dst << 16;
                  sprintf (op1, "&0x%05x", dst & 0xfffff);
@@ -458,7 +458,7 @@ msp430_doubleoperand (disassemble_info *info,
            {
              /* Indexed.  */
              dst = msp430dis_opcode (addr + 2, info);
-             if (extended_dst)
+             if (extension_word)
                {
                  dst |= extended_dst << 16;
                  if (dst & 0x80000)
@@ -519,7 +519,7 @@ msp430_doubleoperand (disassemble_info *info,
          sprintf (op1, "#%d", dst);
          if (dst > 9 || dst < 0)
            sprintf (comm1, "#0x%04x", PS (dst));
-         if (extended_src)
+         if (extension_word)
            {
              dst |= extended_src << 16;
              if (dst & 0x80000)
@@ -543,7 +543,7 @@ msp430_doubleoperand (disassemble_info *info,
          sprintf (op1, "0x%04x", PS (dst));
          sprintf (comm1, "PC rel. 0x%04x",
                   PS ((short) addr + 2 + dst));
-         if (extended_src)
+         if (extension_word)
            {
              dst |= extended_src << 16;
              if (dst & 0x80000)
@@ -561,7 +561,7 @@ msp430_doubleoperand (disassemble_info *info,
          cmd_len += 2;
          sprintf (op1, "&0x%04x", PS (dst));
          sprintf (comm1, "0x%04x", PS (dst));
-         if (extended_src)
+         if (extension_word)
            {
              dst |= extended_src << 16;
              sprintf (op1, "&0x%05x", dst & 0xfffff);
@@ -580,7 +580,7 @@ msp430_doubleoperand (disassemble_info *info,
          /* Indexed.  */
          dst = msp430dis_opcode (addr + 2, info);
          cmd_len += 2;
-         if (extended_src)
+         if (extension_word)
            {
              dst |= extended_src << 16;
              if (dst & 0x80000)
@@ -625,7 +625,7 @@ msp430_doubleoperand (disassemble_info *info,
          sprintf (op2, "0x%04x", PS (dst));
          sprintf (comm2, "PC rel. 0x%04x",
                   PS ((short) addr + cmd_len + dst));
-         if (extended_dst)
+         if (extension_word)
            {
              dst |= extended_dst << 16;
              if (dst & 0x80000)
@@ -642,7 +642,7 @@ msp430_doubleoperand (disassemble_info *info,
          dst = msp430dis_opcode (addr + cmd_len, info);
          cmd_len += 2;
          sprintf (op2, "&0x%04x", PS (dst));
-         if (extended_dst)
+         if (extension_word)
            {
              dst |= extended_dst << 16;
              sprintf (op2, "&0x%05x", dst & 0xfffff);
@@ -656,7 +656,7 @@ msp430_doubleoperand (disassemble_info *info,
            dst |= -1 << 16;
          if (dst > 9 || dst < 0)
            sprintf (comm2, "0x%04x", PS (dst));
-         if (extended_dst)
+         if (extension_word)
            {
              dst |= extended_dst << 16;
              if (dst & 0x80000)
@@ -836,7 +836,7 @@ msp430x_calla_instr (disassemble_info * info,
       break;
 
     default:
-      strcpy (comm1, _("unercognised CALLA addressing mode"));
+      strcpy (comm1, _("unrecognised CALLA addressing mode"));
       return -1;
     }
 
@@ -936,7 +936,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
                  sprintf (comm1, "20-bit words");
                  bc =".a";
                }
-             
+
              cycles = 2; /*FIXME*/
              cmd_len = 2;
              break;
@@ -984,7 +984,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
                  if (strcmp (opcode->name, "bra") != 0)
                    sprintf (op2, "r%d", reg);
                  break;
-                 
+
                case 1: /* MOVA @Rsrc+, Rdst */
                  cmd_len = 2;
                  if (strcmp (opcode->name, "reta") != 0)
@@ -994,7 +994,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
                        sprintf (op2, "r%d", reg);
                    }
                  break;
-                 
+
                case 2: /* MOVA &abs20, Rdst */
                  cmd_len = 4;
                  n <<= 16;
@@ -1005,7 +1005,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
                  if (strcmp (opcode->name, "bra") != 0)
                    sprintf (op2, "r%d", reg);
                  break;
-                 
+
                case 3: /* MOVA x(Rsrc), Rdst */
                  cmd_len = 4;
                  if (strcmp (opcode->name, "bra") != 0)
@@ -1051,7 +1051,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
                        sprintf (comm2, "0x%05x", n);
                    }
                  break;
-                 
+
                case 8: /* MOVA #imm20, Rdst */
                  cmd_len = 4;
                  n <<= 16;
@@ -1064,7 +1064,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
                  if (strcmp (opcode->name, "bra") != 0)
                    sprintf (op2, "r%d", reg);
                  break;
-                 
+
                case 12: /* MOVA Rsrc, Rdst */
                  cmd_len = 2;
                  sprintf (op1, "r%d", n);
@@ -1110,7 +1110,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
                      sprintf (comm2, _("Reserved use of A/L and B/W bits detected"));
                    }
                }
-             
+
              break;
            case 1:
              cmd_len +=