or1k: Add the l.adrp insn and supporting relocations

[deliverable/binutils-gdb.git] / opcodes / or1k-desc.c

diff --git a/opcodes/or1k-desc.c b/opcodes/or1k-desc.c
index 3a9fdb73ddc00a66d233f93f4c78791f92df5657..91c2fbd73d6b71d895bf6fd9c93db1ee0d3e7f19 100644 (file)
--- a/opcodes/or1k-desc.c
+++ b/opcodes/or1k-desc.c
@@ -1,8 +1,9 @@
+/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
 /* CPU data for or1k.
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright (C) 1996-2017 Free Software Foundation, Inc.
+Copyright (C) 1996-2018 Free Software Foundation, Inc.
 
 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 
@@ -966,6 +967,7 @@ const CGEN_IFLD or1k_cgen_ifld_table[] =
   { OR1K_F_IMM16_25_5, "f-imm16-25-5", 0, 32, 25, 5, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }  },
   { OR1K_F_IMM16_10_11, "f-imm16-10-11", 0, 32, 10, 11, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }  },
   { OR1K_F_DISP26, "f-disp26", 0, 32, 25, 26, { 0|A(PCREL_ADDR), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }  },
+  { OR1K_F_DISP21, "f-disp21", 0, 32, 20, 21, { 0|A(ABS_ADDR), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }  },
   { OR1K_F_UIMM16, "f-uimm16", 0, 32, 15, 16, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }  },
   { OR1K_F_SIMM16, "f-simm16", 0, 32, 15, 16, { 0|A(SIGN_OPT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }  },
   { OR1K_F_UIMM6, "f-uimm6", 0, 32, 5, 6, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }  },
@@ -1090,6 +1092,10 @@ const CGEN_OPERAND or1k_cgen_operand_table[] =
   { "disp26", OR1K_OPERAND_DISP26, HW_H_IADDR, 25, 26,
     { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_DISP26] } },
     { 0|A(PCREL_ADDR), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }  },
+/* disp21: pc-rel 21 bit */
+  { "disp21", OR1K_OPERAND_DISP21, HW_H_IADDR, 20, 21,
+    { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_DISP21] } },
+    { 0|A(ABS_ADDR), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }  },
 /* simm16: 16-bit signed immediate */
   { "simm16", OR1K_OPERAND_SIMM16, HW_H_SIMM16, 15, 16,
     { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_SIMM16] } },
@@ -1155,6 +1161,11 @@ static const CGEN_IBASE or1k_cgen_insn_table[MAX_INSNS] =
     OR1K_INSN_L_J, "l-j", "l.j", 32,
     { 0|A(UNCOND_CTI)|A(NOT_IN_DELAY_SLOT)|A(DELAYED_CTI)|A(SKIP_CTI)|A(DELAY_SLOT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
   },
+/* l.adrp $rD,${disp21} */
+  {
+    OR1K_INSN_L_ADRP, "l-adrp", "l.adrp", 32,
+    { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+  },
 /* l.jal ${disp26} */
   {
     OR1K_INSN_L_JAL, "l-jal", "l.jal", 32,
@@ -1777,6 +1788,11 @@ init_tables (void)
 {
 }
 
+#ifndef opcodes_error_handler
+#define opcodes_error_handler(...) \
+  fprintf (stderr, __VA_ARGS__); fputc ('\n', stderr)
+#endif
+
 static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
 static void build_hw_table      (CGEN_CPU_TABLE *);
 static void build_ifield_table  (CGEN_CPU_TABLE *);
@@ -1795,7 +1811,7 @@ lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
        return table;
       ++table;
     }
-  abort ();
+  return NULL;
 }
 
 /* Subroutine of or1k_cgen_cpu_open to build the hardware table.  */
@@ -1937,8 +1953,11 @@ or1k_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
        {
          if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
            {
-             fprintf (stderr, "or1k_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\n",
-                      cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
+             opcodes_error_handler
+               (/* xgettext:c-format */
+                _("internal error: or1k_cgen_rebuild_tables: "
+                  "conflicting insn-chunk-bitsize values: `%d' vs. `%d'"),
+                cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
              abort ();
            }
 
@@ -2009,15 +2028,19 @@ or1k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
            const CGEN_MACH *mach =
              lookup_mach_via_bfd_name (or1k_cgen_mach_table, name);
 
-           machs |= 1 << mach->num;
+           if (mach != NULL)
+             machs |= 1 << mach->num;
            break;
          }
        case CGEN_CPU_OPEN_ENDIAN :
          endian = va_arg (ap, enum cgen_endian);
          break;
        default :
-         fprintf (stderr, "or1k_cgen_cpu_open: unsupported argument `%d'\n",
-                  arg_type);
+         opcodes_error_handler
+           (/* xgettext:c-format */
+            _("internal error: or1k_cgen_cpu_open: "
+              "unsupported argument `%d'"),
+            arg_type);
          abort (); /* ??? return NULL? */
        }
       arg_type = va_arg (ap, enum cgen_cpu_open_arg);
@@ -2032,7 +2055,9 @@ or1k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
   if (endian == CGEN_ENDIAN_UNKNOWN)
     {
       /* ??? If target has only one, could have a default.  */
-      fprintf (stderr, "or1k_cgen_cpu_open: no endianness specified\n");
+      opcodes_error_handler
+       (/* xgettext:c-format */
+        _("internal error: or1k_cgen_cpu_open: no endianness specified"));
       abort ();
     }