/* ppc-dis.c -- Disassemble PowerPC instructions
- Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
- 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+ Copyright (C) 1994-2016 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support
This file is part of the GNU opcodes library.
};
struct ppc_mopt ppc_opts[] = {
- { "403", (PPC_OPCODE_PPC | PPC_OPCODE_403),
+ { "403", PPC_OPCODE_PPC | PPC_OPCODE_403,
0 },
- { "405", (PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405),
+ { "405", PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405,
0 },
{ "440", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
| PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
{ "476", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_440
| PPC_OPCODE_476 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
0 },
- { "601", (PPC_OPCODE_PPC | PPC_OPCODE_601),
+ { "601", PPC_OPCODE_PPC | PPC_OPCODE_601,
0 },
- { "603", (PPC_OPCODE_PPC),
+ { "603", PPC_OPCODE_PPC,
0 },
- { "604", (PPC_OPCODE_PPC),
+ { "604", PPC_OPCODE_PPC,
0 },
- { "620", (PPC_OPCODE_PPC | PPC_OPCODE_64),
+ { "620", PPC_OPCODE_PPC | PPC_OPCODE_64,
0 },
- { "7400", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
+ { "7400", PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
0 },
- { "7410", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
+ { "7410", PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
0 },
- { "7450", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
+ { "7450", PPC_OPCODE_PPC | PPC_OPCODE_7450 | PPC_OPCODE_ALTIVEC,
0 },
- { "7455", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
+ { "7455", PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
0 },
- { "750cl", (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS)
+ { "750cl", PPC_OPCODE_PPC | PPC_OPCODE_750 | PPC_OPCODE_PPCPS
, 0 },
+ { "821", PPC_OPCODE_PPC | PPC_OPCODE_860,
+ 0 },
+ { "850", PPC_OPCODE_PPC | PPC_OPCODE_860,
+ 0 },
+ { "860", PPC_OPCODE_PPC | PPC_OPCODE_860,
+ 0 },
{ "a2", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK | PPC_OPCODE_64
| PPC_OPCODE_A2),
0 },
- { "altivec", (PPC_OPCODE_PPC),
+ { "altivec", PPC_OPCODE_PPC,
PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 },
{ "any", 0,
PPC_OPCODE_ANY },
- { "booke", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),
+ { "booke", PPC_OPCODE_PPC | PPC_OPCODE_BOOKE,
0 },
- { "booke32", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),
+ { "booke32", PPC_OPCODE_PPC | PPC_OPCODE_BOOKE,
0 },
{ "cell", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
| PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
0 },
- { "com", (PPC_OPCODE_COMMON),
+ { "com", PPC_OPCODE_COMMON,
0 },
- { "e300", (PPC_OPCODE_PPC | PPC_OPCODE_E300),
+ { "e200z4", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE| PPC_OPCODE_SPE
+ | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500 | PPC_OPCODE_E200Z4),
+ PPC_OPCODE_VLE },
+ { "e300", PPC_OPCODE_PPC | PPC_OPCODE_E300,
0 },
{ "e500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
| PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
| PPC_OPCODE_E500),
0 },
- { "efs", (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
+ { "efs", PPC_OPCODE_PPC | PPC_OPCODE_EFS,
0 },
- { "power4", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4),
+ { "power4", PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4,
0 },
{ "power5", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5),
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
- { "ppc", (PPC_OPCODE_PPC),
+ { "power8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
+ | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX),
+ 0 },
+ { "power9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
+ | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
+ | PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ),
0 },
- { "ppc32", (PPC_OPCODE_PPC),
+ { "ppc", PPC_OPCODE_PPC,
0 },
- { "ppc64", (PPC_OPCODE_PPC | PPC_OPCODE_64),
+ { "ppc32", PPC_OPCODE_PPC,
0 },
- { "ppc64bridge", (PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE),
+ { "ppc64", PPC_OPCODE_PPC | PPC_OPCODE_64,
0 },
- { "ppcps", (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS),
+ { "ppc64bridge", PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE,
0 },
- { "pwr", (PPC_OPCODE_POWER),
+ { "ppcps", PPC_OPCODE_PPC | PPC_OPCODE_PPCPS,
0 },
- { "pwr2", (PPC_OPCODE_POWER | PPC_OPCODE_POWER2),
+ { "pwr", PPC_OPCODE_POWER,
0 },
- { "pwr4", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4),
+ { "pwr2", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
+ 0 },
+ { "pwr4", PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4,
0 },
{ "pwr5", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5),
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
- { "pwrx", (PPC_OPCODE_POWER | PPC_OPCODE_POWER2),
+ { "pwr8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
+ | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX),
0 },
- { "spe", (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
+ { "pwr9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
+ | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
+ | PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ),
+ 0 },
+ { "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
+ 0 },
+ { "spe", PPC_OPCODE_PPC | PPC_OPCODE_EFS,
PPC_OPCODE_SPE },
{ "titan", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
| PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN),
0 },
- { "vle", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_VLE),
+ { "vle", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE| PPC_OPCODE_SPE
+ | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500),
PPC_OPCODE_VLE },
- { "vsx", (PPC_OPCODE_PPC),
- PPC_OPCODE_VSX },
+ { "vsx", PPC_OPCODE_PPC,
+ PPC_OPCODE_VSX | PPC_OPCODE_VSX3 },
+ { "htm", PPC_OPCODE_PPC,
+ PPC_OPCODE_HTM },
};
/* Switch between Booke and VLE dialects for interlinked dumps. */
/* Disassemble according to the section headers flags for VLE-mode. */
if (dialect & PPC_OPCODE_VLE
- && info->section->owner != NULL
+ && info->section != NULL && info->section->owner != NULL
&& bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour
&& elf_object_id (info->section->owner) == PPC32_ELF_DATA
&& (elf_section_flags (info->section) & SHF_PPC_VLE) != 0)
/* Handle -m and -M options that set cpu type, and .machine arg. */
ppc_cpu_t
-ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
+ppc_parse_cpu (ppc_cpu_t ppc_cpu, ppc_cpu_t *sticky, const char *arg)
{
- const ppc_cpu_t retain_mask = (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
- | PPC_OPCODE_SPE | PPC_OPCODE_ANY
- | PPC_OPCODE_VLE | PPC_OPCODE_PMR);
- /* Sticky bits. */
- ppc_cpu_t retain_flags = ppc_cpu & retain_mask;
unsigned int i;
for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
{
if (ppc_opts[i].sticky)
{
- retain_flags |= ppc_opts[i].sticky;
- if ((ppc_cpu & ~retain_mask) != 0)
+ *sticky |= ppc_opts[i].sticky;
+ if ((ppc_cpu & ~*sticky) != 0)
break;
}
ppc_cpu = ppc_opts[i].cpu;
if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
return 0;
- ppc_cpu |= retain_flags;
+ ppc_cpu |= *sticky;
return ppc_cpu;
}
powerpc_init_dialect (struct disassemble_info *info)
{
ppc_cpu_t dialect = 0;
+ ppc_cpu_t sticky = 0;
char *arg;
struct dis_private *priv = calloc (sizeof (*priv), 1);
if (priv == NULL)
priv = &private;
+ switch (info->mach)
+ {
+ case bfd_mach_ppc_403:
+ case bfd_mach_ppc_403gc:
+ dialect = ppc_parse_cpu (dialect, &sticky, "403");
+ break;
+ case bfd_mach_ppc_405:
+ dialect = ppc_parse_cpu (dialect, &sticky, "405");
+ break;
+ case bfd_mach_ppc_601:
+ dialect = ppc_parse_cpu (dialect, &sticky, "601");
+ break;
+ case bfd_mach_ppc_a35:
+ case bfd_mach_ppc_rs64ii:
+ case bfd_mach_ppc_rs64iii:
+ dialect = ppc_parse_cpu (dialect, &sticky, "pwr2") | PPC_OPCODE_64;
+ break;
+ case bfd_mach_ppc_e500:
+ dialect = ppc_parse_cpu (dialect, &sticky, "e500");
+ break;
+ case bfd_mach_ppc_e500mc:
+ dialect = ppc_parse_cpu (dialect, &sticky, "e500mc");
+ break;
+ case bfd_mach_ppc_e500mc64:
+ dialect = ppc_parse_cpu (dialect, &sticky, "e500mc64");
+ break;
+ case bfd_mach_ppc_e5500:
+ dialect = ppc_parse_cpu (dialect, &sticky, "e5500");
+ break;
+ case bfd_mach_ppc_e6500:
+ dialect = ppc_parse_cpu (dialect, &sticky, "e6500");
+ break;
+ case bfd_mach_ppc_titan:
+ dialect = ppc_parse_cpu (dialect, &sticky, "titan");
+ break;
+ case bfd_mach_ppc_vle:
+ dialect = ppc_parse_cpu (dialect, &sticky, "vle");
+ break;
+ default:
+ dialect = ppc_parse_cpu (dialect, &sticky, "power9") | PPC_OPCODE_ANY;
+ }
+
arg = info->disassembler_options;
while (arg != NULL)
{
if (end != NULL)
*end = 0;
- if ((new_cpu = ppc_parse_cpu (dialect, arg)) != 0)
+ if ((new_cpu = ppc_parse_cpu (dialect, &sticky, arg)) != 0)
dialect = new_cpu;
else if (strcmp (arg, "32") == 0)
dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
arg = end;
}
- if ((dialect & ~(ppc_cpu_t) PPC_OPCODE_64) == 0)
- {
- if (info->mach == bfd_mach_ppc64)
- dialect |= PPC_OPCODE_64;
- else
- dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
- if (info->mach == bfd_mach_ppc_vle)
- dialect |= PPC_OPCODE_PPC | PPC_OPCODE_VLE;
- else
- /* Choose a reasonable default. */
- dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_601
- | PPC_OPCODE_ALTIVEC);
- }
-
info->private_data = priv;
POWERPC_DIALECT(info) = dialect;
}
int i;
unsigned short last;
- i = powerpc_num_opcodes;
- while (--i >= 0)
+ if (powerpc_opcd_indices[PPC_OPCD_SEGS] == 0)
{
- unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
- powerpc_opcd_indices[op] = i;
- }
+ i = powerpc_num_opcodes;
+ while (--i >= 0)
+ {
+ unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
- last = powerpc_num_opcodes;
- for (i = PPC_OPCD_SEGS; i > 0; --i)
- {
- if (powerpc_opcd_indices[i] == 0)
- powerpc_opcd_indices[i] = last;
- last = powerpc_opcd_indices[i];
- }
+ powerpc_opcd_indices[op] = i;
+ }
- i = vle_num_opcodes;
- while (--i >= 0)
- {
- unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask);
- unsigned seg = VLE_OP_TO_SEG (op);
+ last = powerpc_num_opcodes;
+ for (i = PPC_OPCD_SEGS; i > 0; --i)
+ {
+ if (powerpc_opcd_indices[i] == 0)
+ powerpc_opcd_indices[i] = last;
+ last = powerpc_opcd_indices[i];
+ }
- vle_opcd_indices[seg] = i;
- }
+ i = vle_num_opcodes;
+ while (--i >= 0)
+ {
+ unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask);
+ unsigned seg = VLE_OP_TO_SEG (op);
- last = vle_num_opcodes;
- for (i = VLE_OPCD_SEGS; i > 0; --i)
- {
- if (vle_opcd_indices[i] == 0)
- vle_opcd_indices[i] = last;
- last = vle_opcd_indices[i];
+ vle_opcd_indices[seg] = i;
+ }
+
+ last = vle_num_opcodes;
+ for (i = VLE_OPCD_SEGS; i > 0; --i)
+ {
+ if (vle_opcd_indices[i] == 0)
+ vle_opcd_indices[i] = last;
+ last = vle_opcd_indices[i];
+ }
}
if (info->arch == bfd_arch_powerpc)
operand = &powerpc_operands[*opindex];
if ((operand->flags & PPC_OPERAND_NEXT) != 0
|| ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
- && operand_value_powerpc (operand, insn, dialect) != 0))
+ && operand_value_powerpc (operand, insn, dialect) !=
+ ppc_optional_operand_value (operand)))
return 0;
}
(*info->print_address_func) (memaddr + value, info);
else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
- else if ((operand->flags & PPC_OPERAND_FSL) != 0)
+ else if ((operand->flags & PPC_OPERAND_FSL) != 0)
(*info->fprintf_func) (info->stream, "fsl%ld", value);
else if ((operand->flags & PPC_OPERAND_FCR) != 0)
(*info->fprintf_func) (info->stream, "fcr%ld", value);
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