#line 1 "rl78-decode.opc"
/* -*- c -*- */
-/* Copyright (C) 2012-2015 Free Software Foundation, Inc.
+/* Copyright (C) 2012-2016 Free Software Foundation, Inc.
Contributed by Red Hat.
Written by DJ Delorie.
op[0]);
}
SYNTAX("nop");
-#line 912 "rl78-decode.opc"
+#line 911 "rl78-decode.opc"
ID(nop);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x01:
SYNTAX("addw %0, %1");
#line 274 "rl78-decode.opc"
ID(add); W(); DR(AX); SRW(rw); Fzac;
-
+
}
break;
case 0x02:
SYNTAX("addw %0, %e!1");
#line 265 "rl78-decode.opc"
ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
-
+
}
break;
case 0x04:
SYNTAX("addw %0, #%1");
#line 271 "rl78-decode.opc"
ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
-
+
}
break;
case 0x06:
SYNTAX("addw %0, %1");
#line 277 "rl78-decode.opc"
ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
-
+
}
break;
case 0x08:
op[0]);
}
SYNTAX("xch a, x");
-#line 1235 "rl78-decode.opc"
+#line 1234 "rl78-decode.opc"
ID(xch); DR(A); SR(X);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x09:
SYNTAX("mov %0, %e1");
#line 678 "rl78-decode.opc"
ID(mov); DR(A); SM(B, IMMU(2));
-
+
}
break;
case 0x0a:
SYNTAX("add %0, #%1");
#line 228 "rl78-decode.opc"
ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x0b:
SYNTAX("add %0, %1");
#line 222 "rl78-decode.opc"
ID(add); DR(A); SM(None, SADDR); Fzac;
-
+
}
break;
case 0x0c:
SYNTAX("add %0, #%1");
#line 216 "rl78-decode.opc"
ID(add); DR(A); SC(IMMU(1)); Fzac;
-
+
}
break;
case 0x0d:
SYNTAX("add %0, %e1");
#line 204 "rl78-decode.opc"
ID(add); DR(A); SM(HL, 0); Fzac;
-
+
}
break;
case 0x0e:
SYNTAX("add %0, %ea1");
#line 210 "rl78-decode.opc"
ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
-
+
}
break;
case 0x0f:
SYNTAX("add %0, %e!1");
#line 201 "rl78-decode.opc"
ID(add); DR(A); SM(None, IMMU(2)); Fzac;
-
+
}
break;
case 0x10:
SYNTAX("addw %0, #%1");
#line 280 "rl78-decode.opc"
ID(add); W(); DR(SP); SC(IMMU(1)); Fzac;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x11:
op ++;
pc ++;
goto start_again;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x12:
SYNTAX("movw %0, %1");
#line 859 "rl78-decode.opc"
ID(mov); W(); DRW(ra); SR(AX);
-
+
}
break;
case 0x13:
SYNTAX("movw %0, %1");
#line 856 "rl78-decode.opc"
ID(mov); W(); DR(AX); SRW(ra);
-
+
}
break;
case 0x18:
}
SYNTAX("mov %e0, %1");
#line 729 "rl78-decode.opc"
- ID(mov); DM(B, IMMU(2)); SR(A);
-
+ ID(mov); DM(B, IMMU(2)); SR(A);
+
}
break;
case 0x19:
}
SYNTAX("mov %e0, #%1");
#line 726 "rl78-decode.opc"
- ID(mov); DM(B, IMMU(2)); SC(IMMU(1));
-
+ ID(mov); DM(B, IMMU(2)); SC(IMMU(1));
+
}
break;
case 0x1a:
SYNTAX("addc %0, #%1");
#line 260 "rl78-decode.opc"
ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x1b:
SYNTAX("addc %0, %1");
#line 257 "rl78-decode.opc"
ID(addc); DR(A); SM(None, SADDR); Fzac;
-
+
}
break;
case 0x1c:
SYNTAX("addc %0, #%1");
#line 248 "rl78-decode.opc"
ID(addc); DR(A); SC(IMMU(1)); Fzac;
-
+
}
break;
case 0x1d:
SYNTAX("addc %0, %e1");
#line 236 "rl78-decode.opc"
ID(addc); DR(A); SM(HL, 0); Fzac;
-
+
}
break;
case 0x1e:
SYNTAX("addc %0, %ea1");
#line 245 "rl78-decode.opc"
ID(addc); DR(A); SM(HL, IMMU(1)); Fzac;
-
+
}
break;
case 0x1f:
SYNTAX("addc %0, %e!1");
#line 233 "rl78-decode.opc"
ID(addc); DR(A); SM(None, IMMU(2)); Fzac;
-
+
}
break;
case 0x20:
op[0]);
}
SYNTAX("subw %0, #%1");
-#line 1199 "rl78-decode.opc"
+#line 1198 "rl78-decode.opc"
ID(sub); W(); DR(SP); SC(IMMU(1)); Fzac;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x21:
case 0x27:
{
/** 0010 0rw1 subw %0, %1 */
-#line 1193 "rl78-decode.opc"
+#line 1192 "rl78-decode.opc"
int rw AU = (op[0] >> 1) & 0x03;
if (trace)
{
printf (" rw = 0x%x\n", rw);
}
SYNTAX("subw %0, %1");
-#line 1193 "rl78-decode.opc"
+#line 1192 "rl78-decode.opc"
ID(sub); W(); DR(AX); SRW(rw); Fzac;
-
+
}
break;
case 0x22:
op[0]);
}
SYNTAX("subw %0, %e!1");
-#line 1184 "rl78-decode.opc"
+#line 1183 "rl78-decode.opc"
ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
-
+
}
break;
case 0x24:
op[0]);
}
SYNTAX("subw %0, #%1");
-#line 1190 "rl78-decode.opc"
+#line 1189 "rl78-decode.opc"
ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac;
-
+
}
break;
case 0x26:
op[0]);
}
SYNTAX("subw %0, %1");
-#line 1196 "rl78-decode.opc"
+#line 1195 "rl78-decode.opc"
ID(sub); W(); DR(AX); SM(None, SADDR); Fzac;
-
+
}
break;
case 0x28:
SYNTAX("mov %e0, %1");
#line 741 "rl78-decode.opc"
ID(mov); DM(C, IMMU(2)); SR(A);
-
+
}
break;
case 0x29:
SYNTAX("mov %0, %e1");
#line 684 "rl78-decode.opc"
ID(mov); DR(A); SM(C, IMMU(2));
-
+
}
break;
case 0x2a:
op[0]);
}
SYNTAX("sub %0, #%1");
-#line 1147 "rl78-decode.opc"
+#line 1146 "rl78-decode.opc"
ID(sub); DM(None, SADDR); SC(IMMU(1)); Fzac;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x2b:
op[0]);
}
SYNTAX("sub %0, %1");
-#line 1141 "rl78-decode.opc"
+#line 1140 "rl78-decode.opc"
ID(sub); DR(A); SM(None, SADDR); Fzac;
-
+
}
break;
case 0x2c:
op[0]);
}
SYNTAX("sub %0, #%1");
-#line 1135 "rl78-decode.opc"
+#line 1134 "rl78-decode.opc"
ID(sub); DR(A); SC(IMMU(1)); Fzac;
-
+
}
break;
case 0x2d:
op[0]);
}
SYNTAX("sub %0, %e1");
-#line 1123 "rl78-decode.opc"
+#line 1122 "rl78-decode.opc"
ID(sub); DR(A); SM(HL, 0); Fzac;
-
+
}
break;
case 0x2e:
op[0]);
}
SYNTAX("sub %0, %ea1");
-#line 1129 "rl78-decode.opc"
+#line 1128 "rl78-decode.opc"
ID(sub); DR(A); SM(HL, IMMU(1)); Fzac;
-
+
}
break;
case 0x2f:
op[0]);
}
SYNTAX("sub %0, %e!1");
-#line 1120 "rl78-decode.opc"
+#line 1119 "rl78-decode.opc"
ID(sub); DR(A); SM(None, IMMU(2)); Fzac;
-
+
}
break;
case 0x30:
SYNTAX("movw %0, #%1");
#line 853 "rl78-decode.opc"
ID(mov); W(); DRW(rg); SC(IMMU(2));
-
+
}
break;
case 0x31:
SYNTAX("btclr %s1, $%a0");
#line 416 "rl78-decode.opc"
ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x01:
SYNTAX("btclr %1, $%a0");
#line 410 "rl78-decode.opc"
ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
-
+
}
break;
case 0x02:
SYNTAX("bt %s1, $%a0");
#line 402 "rl78-decode.opc"
ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x03:
SYNTAX("bt %1, $%a0");
#line 396 "rl78-decode.opc"
ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
-
+
}
break;
case 0x04:
SYNTAX("bf %s1, $%a0");
#line 363 "rl78-decode.opc"
ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x05:
SYNTAX("bf %1, $%a0");
#line 357 "rl78-decode.opc"
ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F);
-
+
}
break;
case 0x07:
{
/** 0011 0001 0cnt 0111 shl %0, %1 */
-#line 1076 "rl78-decode.opc"
+#line 1075 "rl78-decode.opc"
int cnt AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" cnt = 0x%x\n", cnt);
}
SYNTAX("shl %0, %1");
-#line 1076 "rl78-decode.opc"
+#line 1075 "rl78-decode.opc"
ID(shl); DR(C); SC(cnt);
-
+
}
break;
case 0x08:
{
/** 0011 0001 0cnt 1000 shl %0, %1 */
-#line 1073 "rl78-decode.opc"
+#line 1072 "rl78-decode.opc"
int cnt AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" cnt = 0x%x\n", cnt);
}
SYNTAX("shl %0, %1");
-#line 1073 "rl78-decode.opc"
+#line 1072 "rl78-decode.opc"
ID(shl); DR(B); SC(cnt);
-
+
}
break;
case 0x09:
{
/** 0011 0001 0cnt 1001 shl %0, %1 */
-#line 1070 "rl78-decode.opc"
+#line 1069 "rl78-decode.opc"
int cnt AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" cnt = 0x%x\n", cnt);
}
SYNTAX("shl %0, %1");
-#line 1070 "rl78-decode.opc"
+#line 1069 "rl78-decode.opc"
ID(shl); DR(A); SC(cnt);
-
+
}
break;
case 0x0a:
{
/** 0011 0001 0cnt 1010 shr %0, %1 */
-#line 1087 "rl78-decode.opc"
+#line 1086 "rl78-decode.opc"
int cnt AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" cnt = 0x%x\n", cnt);
}
SYNTAX("shr %0, %1");
-#line 1087 "rl78-decode.opc"
+#line 1086 "rl78-decode.opc"
ID(shr); DR(A); SC(cnt);
-
+
}
break;
case 0x0b:
{
/** 0011 0001 0cnt 1011 sar %0, %1 */
-#line 1034 "rl78-decode.opc"
+#line 1033 "rl78-decode.opc"
int cnt AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" cnt = 0x%x\n", cnt);
}
SYNTAX("sar %0, %1");
-#line 1034 "rl78-decode.opc"
+#line 1033 "rl78-decode.opc"
ID(sar); DR(A); SC(cnt);
-
+
}
break;
case 0x0c:
case 0x8c:
{
/** 0011 0001 wcnt 1100 shlw %0, %1 */
-#line 1082 "rl78-decode.opc"
+#line 1081 "rl78-decode.opc"
int wcnt AU = (op[1] >> 4) & 0x0f;
if (trace)
{
printf (" wcnt = 0x%x\n", wcnt);
}
SYNTAX("shlw %0, %1");
-#line 1082 "rl78-decode.opc"
+#line 1081 "rl78-decode.opc"
ID(shl); W(); DR(BC); SC(wcnt);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x0d:
case 0x8d:
{
/** 0011 0001 wcnt 1101 shlw %0, %1 */
-#line 1079 "rl78-decode.opc"
+#line 1078 "rl78-decode.opc"
int wcnt AU = (op[1] >> 4) & 0x0f;
if (trace)
{
printf (" wcnt = 0x%x\n", wcnt);
}
SYNTAX("shlw %0, %1");
-#line 1079 "rl78-decode.opc"
+#line 1078 "rl78-decode.opc"
ID(shl); W(); DR(AX); SC(wcnt);
-
+
}
break;
case 0x0e:
case 0x8e:
{
/** 0011 0001 wcnt 1110 shrw %0, %1 */
-#line 1090 "rl78-decode.opc"
+#line 1089 "rl78-decode.opc"
int wcnt AU = (op[1] >> 4) & 0x0f;
if (trace)
{
printf (" wcnt = 0x%x\n", wcnt);
}
SYNTAX("shrw %0, %1");
-#line 1090 "rl78-decode.opc"
+#line 1089 "rl78-decode.opc"
ID(shr); W(); DR(AX); SC(wcnt);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x0f:
case 0x8f:
{
/** 0011 0001 wcnt 1111 sarw %0, %1 */
-#line 1037 "rl78-decode.opc"
+#line 1036 "rl78-decode.opc"
int wcnt AU = (op[1] >> 4) & 0x0f;
if (trace)
{
printf (" wcnt = 0x%x\n", wcnt);
}
SYNTAX("sarw %0, %1");
-#line 1037 "rl78-decode.opc"
+#line 1036 "rl78-decode.opc"
ID(sar); W(); DR(AX); SC(wcnt);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x80:
SYNTAX("btclr %s1, $%a0");
#line 413 "rl78-decode.opc"
ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
-
+
}
break;
case 0x81:
SYNTAX("btclr %e1, $%a0");
#line 407 "rl78-decode.opc"
ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
-
+
}
break;
case 0x82:
SYNTAX("bt %s1, $%a0");
#line 399 "rl78-decode.opc"
ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
-
+
}
break;
case 0x83:
SYNTAX("bt %e1, $%a0");
#line 393 "rl78-decode.opc"
ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
-
+
}
break;
case 0x84:
SYNTAX("bf %s1, $%a0");
#line 360 "rl78-decode.opc"
ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
-
+
}
break;
case 0x85:
SYNTAX("bf %e1, $%a0");
#line 354 "rl78-decode.opc"
ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F);
-
+
}
break;
default: UNSUPPORTED(); break;
case 0x37:
{
/** 0011 0ra1 xchw %0, %1 */
-#line 1240 "rl78-decode.opc"
+#line 1239 "rl78-decode.opc"
int ra AU = (op[0] >> 1) & 0x03;
if (trace)
{
printf (" ra = 0x%x\n", ra);
}
SYNTAX("xchw %0, %1");
-#line 1240 "rl78-decode.opc"
+#line 1239 "rl78-decode.opc"
ID(xch); W(); DR(AX); SRW(ra);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x38:
}
SYNTAX("mov %e0, #%1");
#line 738 "rl78-decode.opc"
- ID(mov); DM(C, IMMU(2)); SC(IMMU(1));
-
+ ID(mov); DM(C, IMMU(2)); SC(IMMU(1));
+
}
break;
case 0x39:
}
SYNTAX("mov %e0, #%1");
#line 732 "rl78-decode.opc"
- ID(mov); DM(BC, IMMU(2)); SC(IMMU(1));
-
+ ID(mov); DM(BC, IMMU(2)); SC(IMMU(1));
+
}
break;
case 0x3a:
op[0]);
}
SYNTAX("subc %0, #%1");
-#line 1179 "rl78-decode.opc"
+#line 1178 "rl78-decode.opc"
ID(subc); DM(None, SADDR); SC(IMMU(1)); Fzac;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x3b:
op[0]);
}
SYNTAX("subc %0, %1");
-#line 1176 "rl78-decode.opc"
+#line 1175 "rl78-decode.opc"
ID(subc); DR(A); SM(None, SADDR); Fzac;
-
+
}
break;
case 0x3c:
op[0]);
}
SYNTAX("subc %0, #%1");
-#line 1167 "rl78-decode.opc"
+#line 1166 "rl78-decode.opc"
ID(subc); DR(A); SC(IMMU(1)); Fzac;
-
+
}
break;
case 0x3d:
op[0]);
}
SYNTAX("subc %0, %e1");
-#line 1155 "rl78-decode.opc"
+#line 1154 "rl78-decode.opc"
ID(subc); DR(A); SM(HL, 0); Fzac;
-
+
}
break;
case 0x3e:
op[0]);
}
SYNTAX("subc %0, %ea1");
-#line 1164 "rl78-decode.opc"
+#line 1163 "rl78-decode.opc"
ID(subc); DR(A); SM(HL, IMMU(1)); Fzac;
-
+
}
break;
case 0x3f:
op[0]);
}
SYNTAX("subc %0, %e!1");
-#line 1152 "rl78-decode.opc"
+#line 1151 "rl78-decode.opc"
ID(subc); DR(A); SM(None, IMMU(2)); Fzac;
-
+
}
break;
case 0x40:
SYNTAX("cmp %e!0, #%1");
#line 480 "rl78-decode.opc"
ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac;
-
+
}
break;
case 0x41:
}
SYNTAX("mov %0, #%1");
#line 717 "rl78-decode.opc"
- ID(mov); DR(ES); SC(IMMU(1));
-
+ ID(mov); DR(ES); SC(IMMU(1));
+
}
break;
case 0x42:
SYNTAX("cmpw %0, %e!1");
#line 531 "rl78-decode.opc"
ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac;
-
+
}
break;
case 0x43:
SYNTAX("cmpw %0, %1");
#line 540 "rl78-decode.opc"
ID(cmp); W(); DR(AX); SRW(ra); Fzac;
-
+
}
break;
case 0x44:
SYNTAX("cmpw %0, #%1");
#line 537 "rl78-decode.opc"
ID(cmp); W(); DR(AX); SC(IMMU(2)); Fzac;
-
+
}
break;
case 0x46:
SYNTAX("cmpw %0, %1");
#line 543 "rl78-decode.opc"
ID(cmp); W(); DR(AX); SM(None, SADDR); Fzac;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x48:
}
SYNTAX("mov %e0, %1");
#line 735 "rl78-decode.opc"
- ID(mov); DM(BC, IMMU(2)); SR(A);
-
+ ID(mov); DM(BC, IMMU(2)); SR(A);
+
}
break;
case 0x49:
SYNTAX("mov %0, %e1");
#line 681 "rl78-decode.opc"
ID(mov); DR(A); SM(BC, IMMU(2));
-
+
}
break;
case 0x4a:
SYNTAX("cmp %0, #%1");
#line 483 "rl78-decode.opc"
ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac;
-
+
}
break;
case 0x4b:
SYNTAX("cmp %0, %1");
#line 510 "rl78-decode.opc"
ID(cmp); DR(A); SM(None, SADDR); Fzac;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x4c:
SYNTAX("cmp %0, #%1");
#line 501 "rl78-decode.opc"
ID(cmp); DR(A); SC(IMMU(1)); Fzac;
-
+
}
break;
case 0x4d:
SYNTAX("cmp %0, %e1");
#line 489 "rl78-decode.opc"
ID(cmp); DR(A); SM(HL, 0); Fzac;
-
+
}
break;
case 0x4e:
SYNTAX("cmp %0, %ea1");
#line 498 "rl78-decode.opc"
ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac;
-
+
}
break;
case 0x4f:
SYNTAX("cmp %0, %e!1");
#line 486 "rl78-decode.opc"
ID(cmp); DR(A); SM(None, IMMU(2)); Fzac;
-
+
}
break;
case 0x50:
SYNTAX("mov %0, #%1");
#line 669 "rl78-decode.opc"
ID(mov); DRB(reg); SC(IMMU(1));
-
+
}
break;
case 0x58:
SYNTAX("movw %e0, %1");
#line 871 "rl78-decode.opc"
ID(mov); W(); DM(B, IMMU(2)); SR(AX);
-
+
}
break;
case 0x59:
SYNTAX("movw %0, %e1");
#line 862 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(B, IMMU(2));
-
+
}
break;
case 0x5a:
SYNTAX("and %0, #%1");
#line 312 "rl78-decode.opc"
ID(and); DM(None, SADDR); SC(IMMU(1)); Fz;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x5b:
SYNTAX("and %0, %1");
#line 309 "rl78-decode.opc"
ID(and); DR(A); SM(None, SADDR); Fz;
-
+
}
break;
case 0x5c:
SYNTAX("and %0, #%1");
#line 300 "rl78-decode.opc"
ID(and); DR(A); SC(IMMU(1)); Fz;
-
+
}
break;
case 0x5d:
SYNTAX("and %0, %e1");
#line 288 "rl78-decode.opc"
ID(and); DR(A); SM(HL, 0); Fz;
-
+
}
break;
case 0x5e:
SYNTAX("and %0, %ea1");
#line 294 "rl78-decode.opc"
ID(and); DR(A); SM(HL, IMMU(1)); Fz;
-
+
}
break;
case 0x5f:
SYNTAX("and %0, %e!1");
#line 285 "rl78-decode.opc"
ID(and); DR(A); SM(None, IMMU(2)); Fz;
-
+
}
break;
case 0x60:
SYNTAX("mov %0, %1");
#line 672 "rl78-decode.opc"
ID(mov); DR(A); SRB(rba);
-
+
}
break;
case 0x61:
SYNTAX("add %0, %1");
#line 225 "rl78-decode.opc"
ID(add); DRB(reg); SR(A); Fzac;
-
+
}
break;
case 0x08:
SYNTAX("add %0, %1");
#line 219 "rl78-decode.opc"
ID(add); DR(A); SRB(rba); Fzac;
-
+
}
break;
case 0x09:
SYNTAX("addw %0, %ea1");
#line 268 "rl78-decode.opc"
ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
-
+
}
break;
case 0x10:
SYNTAX("addc %0, %1");
#line 254 "rl78-decode.opc"
ID(addc); DRB(reg); SR(A); Fzac;
-
+
}
break;
case 0x18:
SYNTAX("addc %0, %1");
#line 251 "rl78-decode.opc"
ID(addc); DR(A); SRB(rba); Fzac;
-
+
}
break;
case 0x20:
case 0x27:
{
/** 0110 0001 0010 0reg sub %0, %1 */
-#line 1144 "rl78-decode.opc"
+#line 1143 "rl78-decode.opc"
int reg AU = op[1] & 0x07;
if (trace)
{
printf (" reg = 0x%x\n", reg);
}
SYNTAX("sub %0, %1");
-#line 1144 "rl78-decode.opc"
+#line 1143 "rl78-decode.opc"
ID(sub); DRB(reg); SR(A); Fzac;
-
+
}
break;
case 0x28:
case 0x2f:
{
/** 0110 0001 0010 1rba sub %0, %1 */
-#line 1138 "rl78-decode.opc"
+#line 1137 "rl78-decode.opc"
int rba AU = op[1] & 0x07;
if (trace)
{
printf (" rba = 0x%x\n", rba);
}
SYNTAX("sub %0, %1");
-#line 1138 "rl78-decode.opc"
+#line 1137 "rl78-decode.opc"
ID(sub); DR(A); SRB(rba); Fzac;
-
+
}
break;
case 0x29:
op[0], op[1]);
}
SYNTAX("subw %0, %ea1");
-#line 1187 "rl78-decode.opc"
+#line 1186 "rl78-decode.opc"
ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
-
+
}
break;
case 0x30:
case 0x37:
{
/** 0110 0001 0011 0reg subc %0, %1 */
-#line 1173 "rl78-decode.opc"
+#line 1172 "rl78-decode.opc"
int reg AU = op[1] & 0x07;
if (trace)
{
printf (" reg = 0x%x\n", reg);
}
SYNTAX("subc %0, %1");
-#line 1173 "rl78-decode.opc"
+#line 1172 "rl78-decode.opc"
ID(subc); DRB(reg); SR(A); Fzac;
-
+
}
break;
case 0x38:
case 0x3f:
{
/** 0110 0001 0011 1rba subc %0, %1 */
-#line 1170 "rl78-decode.opc"
+#line 1169 "rl78-decode.opc"
int rba AU = op[1] & 0x07;
if (trace)
{
printf (" rba = 0x%x\n", rba);
}
SYNTAX("subc %0, %1");
-#line 1170 "rl78-decode.opc"
+#line 1169 "rl78-decode.opc"
ID(subc); DR(A); SRB(rba); Fzac;
-
+
}
break;
case 0x40:
SYNTAX("cmp %0, %1");
#line 507 "rl78-decode.opc"
ID(cmp); DRB(reg); SR(A); Fzac;
-
+
}
break;
case 0x48:
SYNTAX("cmp %0, %1");
#line 504 "rl78-decode.opc"
ID(cmp); DR(A); SRB(rba); Fzac;
-
+
}
break;
case 0x49:
SYNTAX("cmpw %0, %ea1");
#line 534 "rl78-decode.opc"
ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
-
+
}
break;
case 0x50:
SYNTAX("and %0, %1");
#line 306 "rl78-decode.opc"
ID(and); DRB(reg); SR(A); Fz;
-
+
}
break;
case 0x58:
SYNTAX("and %0, %1");
#line 303 "rl78-decode.opc"
ID(and); DR(A); SRB(rba); Fz;
-
+
}
break;
case 0x59:
SYNTAX("inc %ea0");
#line 584 "rl78-decode.opc"
ID(add); DM(HL, IMMU(1)); SC(1); Fza;
-
+
}
break;
case 0x60:
case 0x67:
{
/** 0110 0001 0110 0reg or %0, %1 */
-#line 962 "rl78-decode.opc"
+#line 961 "rl78-decode.opc"
int reg AU = op[1] & 0x07;
if (trace)
{
printf (" reg = 0x%x\n", reg);
}
SYNTAX("or %0, %1");
-#line 962 "rl78-decode.opc"
+#line 961 "rl78-decode.opc"
ID(or); DRB(reg); SR(A); Fz;
-
+
}
break;
case 0x68:
case 0x6f:
{
/** 0110 0001 0110 1rba or %0, %1 */
-#line 959 "rl78-decode.opc"
+#line 958 "rl78-decode.opc"
int rba AU = op[1] & 0x07;
if (trace)
{
printf (" rba = 0x%x\n", rba);
}
SYNTAX("or %0, %1");
-#line 959 "rl78-decode.opc"
+#line 958 "rl78-decode.opc"
ID(or); DR(A); SRB(rba); Fz;
-
+
}
break;
case 0x69:
SYNTAX("dec %ea0");
#line 551 "rl78-decode.opc"
ID(sub); DM(HL, IMMU(1)); SC(1); Fza;
-
+
}
break;
case 0x70:
case 0x77:
{
/** 0110 0001 0111 0reg xor %0, %1 */
-#line 1266 "rl78-decode.opc"
+#line 1265 "rl78-decode.opc"
int reg AU = op[1] & 0x07;
if (trace)
{
printf (" reg = 0x%x\n", reg);
}
SYNTAX("xor %0, %1");
-#line 1266 "rl78-decode.opc"
+#line 1265 "rl78-decode.opc"
ID(xor); DRB(reg); SR(A); Fz;
-
+
}
break;
case 0x78:
case 0x7f:
{
/** 0110 0001 0111 1rba xor %0, %1 */
-#line 1263 "rl78-decode.opc"
+#line 1262 "rl78-decode.opc"
int rba AU = op[1] & 0x07;
if (trace)
{
printf (" rba = 0x%x\n", rba);
}
SYNTAX("xor %0, %1");
-#line 1263 "rl78-decode.opc"
+#line 1262 "rl78-decode.opc"
ID(xor); DR(A); SRB(rba); Fz;
-
+
}
break;
case 0x79:
SYNTAX("incw %ea0");
#line 598 "rl78-decode.opc"
ID(add); W(); DM(HL, IMMU(1)); SC(1);
-
+
}
break;
case 0x80:
SYNTAX("add %0, %e1");
#line 207 "rl78-decode.opc"
ID(add); DR(A); SM2(HL, B, 0); Fzac;
-
+
}
break;
case 0x82:
SYNTAX("add %0, %e1");
#line 213 "rl78-decode.opc"
ID(add); DR(A); SM2(HL, C, 0); Fzac;
-
+
}
break;
case 0x84:
SYNTAX("callt [%x0]");
#line 433 "rl78-decode.opc"
ID(call); DM(None, 0x80 + mm*16 + nnn*2);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x88:
case 0x8f:
{
/** 0110 0001 1000 1reg xch %0, %1 */
-#line 1225 "rl78-decode.opc"
+#line 1224 "rl78-decode.opc"
int reg AU = op[1] & 0x07;
if (trace)
{
printf (" reg = 0x%x\n", reg);
}
SYNTAX("xch %0, %1");
-#line 1225 "rl78-decode.opc"
+#line 1224 "rl78-decode.opc"
/* Note: DECW uses reg == X, so this must follow DECW */
ID(xch); DR(A); SRB(reg);
-
+
}
break;
case 0x89:
SYNTAX("decw %ea0");
#line 565 "rl78-decode.opc"
ID(sub); W(); DM(HL, IMMU(1)); SC(1);
-
+
}
break;
case 0x90:
SYNTAX("addc %0, %e1");
#line 239 "rl78-decode.opc"
ID(addc); DR(A); SM2(HL, B, 0); Fzac;
-
+
}
break;
case 0x92:
SYNTAX("addc %0, %e1");
#line 242 "rl78-decode.opc"
ID(addc); DR(A); SM2(HL, C, 0); Fzac;
-
+
}
break;
case 0xa0:
op[0], op[1]);
}
SYNTAX("sub %0, %e1");
-#line 1126 "rl78-decode.opc"
+#line 1125 "rl78-decode.opc"
ID(sub); DR(A); SM2(HL, B, 0); Fzac;
-
+
}
break;
case 0xa2:
op[0], op[1]);
}
SYNTAX("sub %0, %e1");
-#line 1132 "rl78-decode.opc"
+#line 1131 "rl78-decode.opc"
ID(sub); DR(A); SM2(HL, C, 0); Fzac;
-
+
}
break;
case 0xa8:
op[0], op[1]);
}
SYNTAX("xch %0, %1");
-#line 1229 "rl78-decode.opc"
+#line 1228 "rl78-decode.opc"
ID(xch); DR(A); SM(None, SADDR);
-
+
}
break;
case 0xa9:
op[0], op[1]);
}
SYNTAX("xch %0, %e1");
-#line 1222 "rl78-decode.opc"
+#line 1221 "rl78-decode.opc"
ID(xch); DR(A); SM2(HL, C, 0);
-
+
}
break;
case 0xaa:
op[0], op[1]);
}
SYNTAX("xch %0, %e!1");
-#line 1204 "rl78-decode.opc"
+#line 1203 "rl78-decode.opc"
ID(xch); DR(A); SM(None, IMMU(2));
-
+
}
break;
case 0xab:
{
- /** 0110 0001 1010 1011 xch %0, %1 */
+ /** 0110 0001 1010 1011 xch %0, %s1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x %02x\n",
- "/** 0110 0001 1010 1011 xch %0, %1 */",
+ "/** 0110 0001 1010 1011 xch %0, %s1 */",
op[0], op[1]);
}
- SYNTAX("xch %0, %1");
-#line 1232 "rl78-decode.opc"
+ SYNTAX("xch %0, %s1");
+#line 1231 "rl78-decode.opc"
ID(xch); DR(A); SM(None, SFR);
-
+
}
break;
case 0xac:
op[0], op[1]);
}
SYNTAX("xch %0, %e1");
-#line 1213 "rl78-decode.opc"
+#line 1212 "rl78-decode.opc"
ID(xch); DR(A); SM(HL, 0);
-
+
}
break;
case 0xad:
op[0], op[1]);
}
SYNTAX("xch %0, %ea1");
-#line 1219 "rl78-decode.opc"
+#line 1218 "rl78-decode.opc"
ID(xch); DR(A); SM(HL, IMMU(1));
-
+
}
break;
case 0xae:
op[0], op[1]);
}
SYNTAX("xch %0, %e1");
-#line 1207 "rl78-decode.opc"
+#line 1206 "rl78-decode.opc"
ID(xch); DR(A); SM(DE, 0);
-
+
}
break;
case 0xaf:
{
- /** 0110 0001 1010 1111 xch %0, %e1 */
+ /** 0110 0001 1010 1111 xch %0, %ea1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x %02x\n",
- "/** 0110 0001 1010 1111 xch %0, %e1 */",
+ "/** 0110 0001 1010 1111 xch %0, %ea1 */",
op[0], op[1]);
}
- SYNTAX("xch %0, %e1");
-#line 1210 "rl78-decode.opc"
+ SYNTAX("xch %0, %ea1");
+#line 1209 "rl78-decode.opc"
ID(xch); DR(A); SM(DE, IMMU(1));
-
+
}
break;
case 0xb0:
op[0], op[1]);
}
SYNTAX("subc %0, %e1");
-#line 1158 "rl78-decode.opc"
+#line 1157 "rl78-decode.opc"
ID(subc); DR(A); SM2(HL, B, 0); Fzac;
-
+
}
break;
case 0xb2:
op[0], op[1]);
}
SYNTAX("subc %0, %e1");
-#line 1161 "rl78-decode.opc"
+#line 1160 "rl78-decode.opc"
ID(subc); DR(A); SM2(HL, C, 0); Fzac;
-
+
}
break;
case 0xb8:
}
SYNTAX("mov %0, %1");
#line 723 "rl78-decode.opc"
- ID(mov); DR(ES); SM(None, SADDR);
-
+ ID(mov); DR(ES); SM(None, SADDR);
+
}
break;
case 0xb9:
op[0], op[1]);
}
SYNTAX("xch %0, %e1");
-#line 1216 "rl78-decode.opc"
+#line 1215 "rl78-decode.opc"
ID(xch); DR(A); SM2(HL, B, 0);
-
+
}
break;
case 0xc0:
SYNTAX("cmp %0, %e1");
#line 492 "rl78-decode.opc"
ID(cmp); DR(A); SM2(HL, B, 0); Fzac;
-
+
}
break;
case 0xc2:
SYNTAX("cmp %0, %e1");
#line 495 "rl78-decode.opc"
ID(cmp); DR(A); SM2(HL, C, 0); Fzac;
-
+
}
break;
case 0xc3:
SYNTAX("bh $%a0");
#line 340 "rl78-decode.opc"
ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H);
-
+
}
break;
case 0xc8:
op[0], op[1]);
}
SYNTAX("sk%c1");
-#line 1095 "rl78-decode.opc"
+#line 1094 "rl78-decode.opc"
ID(skip); COND(C);
-
+
}
break;
case 0xc9:
SYNTAX("mov %0, %e1");
#line 660 "rl78-decode.opc"
ID(mov); DR(A); SM2(HL, B, 0);
-
+
}
break;
case 0xca:
SYNTAX("call %0");
#line 430 "rl78-decode.opc"
ID(call); DRW(rg);
-
+
}
break;
case 0xcb:
SYNTAX("br ax");
#line 380 "rl78-decode.opc"
ID(branch); DR(AX);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xcc:
SYNTAX("brk");
#line 388 "rl78-decode.opc"
ID(break);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xcd:
op[0], op[1]);
}
SYNTAX("pop %s0");
-#line 990 "rl78-decode.opc"
+#line 989 "rl78-decode.opc"
ID(mov); W(); DR(PSW); SPOP();
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xce:
SYNTAX("movs %ea0, %1");
#line 811 "rl78-decode.opc"
ID(mov); DM(HL, IMMU(1)); SR(X); Fzc;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xcf:
case 0xff:
{
/** 0110 0001 11rb 1111 sel rb%1 */
-#line 1042 "rl78-decode.opc"
+#line 1041 "rl78-decode.opc"
int rb AU = (op[1] >> 4) & 0x03;
if (trace)
{
printf (" rb = 0x%x\n", rb);
}
SYNTAX("sel rb%1");
-#line 1042 "rl78-decode.opc"
+#line 1041 "rl78-decode.opc"
ID(sel); SC(rb);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xd0:
SYNTAX("and %0, %e1");
#line 291 "rl78-decode.opc"
ID(and); DR(A); SM2(HL, B, 0); Fz;
-
+
}
break;
case 0xd2:
SYNTAX("and %0, %e1");
#line 297 "rl78-decode.opc"
ID(and); DR(A); SM2(HL, C, 0); Fz;
-
+
}
break;
case 0xd3:
SYNTAX("bnh $%a0");
#line 343 "rl78-decode.opc"
ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH);
-
+
}
break;
case 0xd8:
op[0], op[1]);
}
SYNTAX("sk%c1");
-#line 1101 "rl78-decode.opc"
+#line 1100 "rl78-decode.opc"
ID(skip); COND(NC);
-
+
}
break;
case 0xd9:
SYNTAX("mov %e0, %1");
#line 627 "rl78-decode.opc"
ID(mov); DM2(HL, B, 0); SR(A);
-
+
}
break;
case 0xdb:
op[0], op[1]);
}
SYNTAX("ror %0, %1");
-#line 1023 "rl78-decode.opc"
+#line 1022 "rl78-decode.opc"
ID(ror); DR(A); SC(1);
-
+
}
break;
case 0xdc:
op[0], op[1]);
}
SYNTAX("rolc %0, %1");
-#line 1017 "rl78-decode.opc"
+#line 1016 "rl78-decode.opc"
ID(rolc); DR(A); SC(1);
-
+
}
break;
case 0xdd:
op[0], op[1]);
}
SYNTAX("push %s1");
-#line 998 "rl78-decode.opc"
+#line 997 "rl78-decode.opc"
ID(mov); W(); DPUSH(); SR(PSW);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xde:
SYNTAX("cmps %0, %ea1");
#line 526 "rl78-decode.opc"
ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xe0:
op[0], op[1]);
}
SYNTAX("or %0, %e1");
-#line 947 "rl78-decode.opc"
+#line 946 "rl78-decode.opc"
ID(or); DR(A); SM2(HL, B, 0); Fz;
-
+
}
break;
case 0xe2:
op[0], op[1]);
}
SYNTAX("or %0, %e1");
-#line 953 "rl78-decode.opc"
+#line 952 "rl78-decode.opc"
ID(or); DR(A); SM2(HL, C, 0); Fz;
-
+
}
break;
case 0xe3:
op[0], op[1]);
}
SYNTAX("sk%c1");
-#line 1098 "rl78-decode.opc"
+#line 1097 "rl78-decode.opc"
ID(skip); COND(H);
-
+
}
break;
case 0xe8:
op[0], op[1]);
}
SYNTAX("sk%c1");
-#line 1110 "rl78-decode.opc"
+#line 1109 "rl78-decode.opc"
ID(skip); COND(Z);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xe9:
SYNTAX("mov %0, %e1");
#line 663 "rl78-decode.opc"
ID(mov); DR(A); SM2(HL, C, 0);
-
+
}
break;
case 0xeb:
op[0], op[1]);
}
SYNTAX("rol %0, %1");
-#line 1014 "rl78-decode.opc"
+#line 1013 "rl78-decode.opc"
ID(rol); DR(A); SC(1);
-
+
}
break;
case 0xec:
op[0], op[1]);
}
SYNTAX("retb");
-#line 1009 "rl78-decode.opc"
+#line 1008 "rl78-decode.opc"
ID(reti);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xed:
SYNTAX("halt");
#line 576 "rl78-decode.opc"
ID(halt);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xee:
case 0xfe:
{
/** 0110 0001 111r 1110 rolwc %0, %1 */
-#line 1020 "rl78-decode.opc"
+#line 1019 "rl78-decode.opc"
int r AU = (op[1] >> 4) & 0x01;
if (trace)
{
printf (" r = 0x%x\n", r);
}
SYNTAX("rolwc %0, %1");
-#line 1020 "rl78-decode.opc"
+#line 1019 "rl78-decode.opc"
ID(rolc); W(); DRW(r); SC(1);
-
+
}
break;
case 0xf0:
op[0], op[1]);
}
SYNTAX("xor %0, %e1");
-#line 1251 "rl78-decode.opc"
+#line 1250 "rl78-decode.opc"
ID(xor); DR(A); SM2(HL, B, 0); Fz;
-
+
}
break;
case 0xf2:
op[0], op[1]);
}
SYNTAX("xor %0, %e1");
-#line 1257 "rl78-decode.opc"
+#line 1256 "rl78-decode.opc"
ID(xor); DR(A); SM2(HL, C, 0); Fz;
-
+
}
break;
case 0xf3:
op[0], op[1]);
}
SYNTAX("sk%c1");
-#line 1104 "rl78-decode.opc"
+#line 1103 "rl78-decode.opc"
ID(skip); COND(NH);
-
+
}
break;
case 0xf8:
op[0], op[1]);
}
SYNTAX("sk%c1");
-#line 1107 "rl78-decode.opc"
+#line 1106 "rl78-decode.opc"
ID(skip); COND(NZ);
-
+
}
break;
case 0xf9:
SYNTAX("mov %e0, %1");
#line 636 "rl78-decode.opc"
ID(mov); DM2(HL, C, 0); SR(A);
-
+
}
break;
case 0xfb:
op[0], op[1]);
}
SYNTAX("rorc %0, %1");
-#line 1026 "rl78-decode.opc"
+#line 1025 "rl78-decode.opc"
ID(rorc); DR(A); SC(1);
-
+
/*----------------------------------------------------------------------*/
-
+
/* Note that the branch insns need to be listed before the shift
ones, as "shift count of zero" means "branch insn" */
-
+
}
break;
case 0xfc:
op[0], op[1]);
}
SYNTAX("reti");
-#line 1006 "rl78-decode.opc"
+#line 1005 "rl78-decode.opc"
ID(reti);
-
+
}
break;
case 0xfd:
op[0], op[1]);
}
SYNTAX("stop");
-#line 1115 "rl78-decode.opc"
+#line 1114 "rl78-decode.opc"
ID(stop);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
default: UNSUPPORTED(); break;
SYNTAX("movw %e0, %1");
#line 874 "rl78-decode.opc"
ID(mov); W(); DM(C, IMMU(2)); SR(AX);
-
+
}
break;
case 0x69:
SYNTAX("movw %0, %e1");
#line 865 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(C, IMMU(2));
-
+
}
break;
case 0x6a:
op[0]);
}
SYNTAX("or %0, #%1");
-#line 968 "rl78-decode.opc"
+#line 967 "rl78-decode.opc"
ID(or); DM(None, SADDR); SC(IMMU(1)); Fz;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x6b:
op[0]);
}
SYNTAX("or %0, %1");
-#line 965 "rl78-decode.opc"
+#line 964 "rl78-decode.opc"
ID(or); DR(A); SM(None, SADDR); Fz;
-
+
}
break;
case 0x6c:
op[0]);
}
SYNTAX("or %0, #%1");
-#line 956 "rl78-decode.opc"
+#line 955 "rl78-decode.opc"
ID(or); DR(A); SC(IMMU(1)); Fz;
-
+
}
break;
case 0x6d:
op[0]);
}
SYNTAX("or %0, %e1");
-#line 944 "rl78-decode.opc"
+#line 943 "rl78-decode.opc"
ID(or); DR(A); SM(HL, 0); Fz;
-
+
}
break;
case 0x6e:
op[0]);
}
SYNTAX("or %0, %ea1");
-#line 950 "rl78-decode.opc"
+#line 949 "rl78-decode.opc"
ID(or); DR(A); SM(HL, IMMU(1)); Fz;
-
+
}
break;
case 0x6f:
op[0]);
}
SYNTAX("or %0, %e!1");
-#line 941 "rl78-decode.opc"
+#line 940 "rl78-decode.opc"
ID(or); DR(A); SM(None, IMMU(2)); Fz;
-
+
}
break;
case 0x70:
SYNTAX("mov %0, %1");
#line 696 "rl78-decode.opc"
ID(mov); DRB(rba); SR(A);
-
+
}
break;
case 0x71:
case 0x70:
{
/** 0111 0001 0bit 0000 set1 %e!0 */
-#line 1047 "rl78-decode.opc"
+#line 1046 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("set1 %e!0");
-#line 1047 "rl78-decode.opc"
+#line 1046 "rl78-decode.opc"
ID(mov); DM(None, IMMU(2)); DB(bit); SC(1);
-
+
}
break;
case 0x01:
SYNTAX("mov1 %0, cy");
#line 803 "rl78-decode.opc"
ID(mov); DM(None, SADDR); DB(bit); SCY();
-
+
}
break;
case 0x02:
case 0x72:
{
/** 0111 0001 0bit 0010 set1 %0 */
-#line 1065 "rl78-decode.opc"
+#line 1064 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("set1 %0");
-#line 1065 "rl78-decode.opc"
+#line 1064 "rl78-decode.opc"
ID(mov); DM(None, SADDR); DB(bit); SC(1);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x03:
SYNTAX("clr1 %0");
#line 456 "rl78-decode.opc"
ID(mov); DM(None, SADDR); DB(bit); SC(0);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x04:
SYNTAX("mov1 cy, %1");
#line 797 "rl78-decode.opc"
ID(mov); DCY(); SM(None, SADDR); SB(bit);
-
+
}
break;
case 0x05:
SYNTAX("and1 cy, %s1");
#line 326 "rl78-decode.opc"
ID(and); DCY(); SM(None, SADDR); SB(bit);
-
+
/*----------------------------------------------------------------------*/
-
+
/* Note that the branch insns need to be listed before the shift
ones, as "shift count of zero" means "branch insn" */
-
+
}
break;
case 0x06:
case 0x76:
{
/** 0111 0001 0bit 0110 or1 cy, %s1 */
-#line 982 "rl78-decode.opc"
+#line 981 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("or1 cy, %s1");
-#line 982 "rl78-decode.opc"
+#line 981 "rl78-decode.opc"
ID(or); DCY(); SM(None, SADDR); SB(bit);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x07:
case 0x77:
{
/** 0111 0001 0bit 0111 xor1 cy, %s1 */
-#line 1286 "rl78-decode.opc"
+#line 1285 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("xor1 cy, %s1");
-#line 1286 "rl78-decode.opc"
+#line 1285 "rl78-decode.opc"
ID(xor); DCY(); SM(None, SADDR); SB(bit);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x08:
SYNTAX("clr1 %e!0");
#line 438 "rl78-decode.opc"
ID(mov); DM(None, IMMU(2)); DB(bit); SC(0);
-
+
}
break;
case 0x09:
SYNTAX("mov1 %s0, cy");
#line 806 "rl78-decode.opc"
ID(mov); DM(None, SFR); DB(bit); SCY();
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x0a:
case 0x7a:
{
/** 0111 0001 0bit 1010 set1 %s0 */
-#line 1059 "rl78-decode.opc"
+#line 1058 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("set1 %s0");
-#line 1059 "rl78-decode.opc"
+#line 1058 "rl78-decode.opc"
op0 = SFR;
ID(mov); DM(None, op0); DB(bit); SC(1);
if (op0 == RL78_SFR_PSW && bit == 7)
rl78->syntax = "ei";
-
+
}
break;
case 0x0b:
ID(mov); DM(None, op0); DB(bit); SC(0);
if (op0 == RL78_SFR_PSW && bit == 7)
rl78->syntax = "di";
-
+
}
break;
case 0x0c:
SYNTAX("mov1 cy, %s1");
#line 800 "rl78-decode.opc"
ID(mov); DCY(); SM(None, SFR); SB(bit);
-
+
}
break;
case 0x0d:
SYNTAX("and1 cy, %s1");
#line 323 "rl78-decode.opc"
ID(and); DCY(); SM(None, SFR); SB(bit);
-
+
}
break;
case 0x0e:
case 0x7e:
{
/** 0111 0001 0bit 1110 or1 cy, %s1 */
-#line 979 "rl78-decode.opc"
+#line 978 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("or1 cy, %s1");
-#line 979 "rl78-decode.opc"
+#line 978 "rl78-decode.opc"
ID(or); DCY(); SM(None, SFR); SB(bit);
-
+
}
break;
case 0x0f:
case 0x7f:
{
/** 0111 0001 0bit 1111 xor1 cy, %s1 */
-#line 1283 "rl78-decode.opc"
+#line 1282 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("xor1 cy, %s1");
-#line 1283 "rl78-decode.opc"
+#line 1282 "rl78-decode.opc"
ID(xor); DCY(); SM(None, SFR); SB(bit);
-
+
}
break;
case 0x80:
op[0], op[1]);
}
SYNTAX("set1 cy");
-#line 1056 "rl78-decode.opc"
+#line 1055 "rl78-decode.opc"
ID(mov); DCY(); SC(1);
-
+
}
break;
case 0x81:
SYNTAX("mov1 %e0, cy");
#line 785 "rl78-decode.opc"
ID(mov); DM(HL, 0); DB(bit); SCY();
-
+
}
break;
case 0x82:
case 0xf2:
{
/** 0111 0001 1bit 0010 set1 %e0 */
-#line 1050 "rl78-decode.opc"
+#line 1049 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("set1 %e0");
-#line 1050 "rl78-decode.opc"
+#line 1049 "rl78-decode.opc"
ID(mov); DM(HL, 0); DB(bit); SC(1);
-
+
}
break;
case 0x83:
SYNTAX("clr1 %e0");
#line 441 "rl78-decode.opc"
ID(mov); DM(HL, 0); DB(bit); SC(0);
-
+
}
break;
case 0x84:
SYNTAX("mov1 cy, %e1");
#line 791 "rl78-decode.opc"
ID(mov); DCY(); SM(HL, 0); SB(bit);
-
+
}
break;
case 0x85:
SYNTAX("and1 cy, %e1");
#line 317 "rl78-decode.opc"
ID(and); DCY(); SM(HL, 0); SB(bit);
-
+
}
break;
case 0x86:
case 0xf6:
{
/** 0111 0001 1bit 0110 or1 cy, %e1 */
-#line 973 "rl78-decode.opc"
+#line 972 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("or1 cy, %e1");
-#line 973 "rl78-decode.opc"
+#line 972 "rl78-decode.opc"
ID(or); DCY(); SM(HL, 0); SB(bit);
-
+
}
break;
case 0x87:
case 0xf7:
{
/** 0111 0001 1bit 0111 xor1 cy, %e1 */
-#line 1277 "rl78-decode.opc"
+#line 1276 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("xor1 cy, %e1");
-#line 1277 "rl78-decode.opc"
+#line 1276 "rl78-decode.opc"
ID(xor); DCY(); SM(HL, 0); SB(bit);
-
+
}
break;
case 0x88:
SYNTAX("clr1 cy");
#line 447 "rl78-decode.opc"
ID(mov); DCY(); SC(0);
-
+
}
break;
case 0x89:
SYNTAX("mov1 %e0, cy");
#line 788 "rl78-decode.opc"
ID(mov); DR(A); DB(bit); SCY();
-
+
}
break;
case 0x8a:
case 0xfa:
{
/** 0111 0001 1bit 1010 set1 %0 */
-#line 1053 "rl78-decode.opc"
+#line 1052 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("set1 %0");
-#line 1053 "rl78-decode.opc"
+#line 1052 "rl78-decode.opc"
ID(mov); DR(A); DB(bit); SC(1);
-
+
}
break;
case 0x8b:
SYNTAX("clr1 %0");
#line 444 "rl78-decode.opc"
ID(mov); DR(A); DB(bit); SC(0);
-
+
}
break;
case 0x8c:
SYNTAX("mov1 cy, %e1");
#line 794 "rl78-decode.opc"
ID(mov); DCY(); SR(A); SB(bit);
-
+
}
break;
case 0x8d:
SYNTAX("and1 cy, %1");
#line 320 "rl78-decode.opc"
ID(and); DCY(); SR(A); SB(bit);
-
+
}
break;
case 0x8e:
case 0xfe:
{
/** 0111 0001 1bit 1110 or1 cy, %1 */
-#line 976 "rl78-decode.opc"
+#line 975 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("or1 cy, %1");
-#line 976 "rl78-decode.opc"
+#line 975 "rl78-decode.opc"
ID(or); DCY(); SR(A); SB(bit);
-
+
}
break;
case 0x8f:
case 0xff:
{
/** 0111 0001 1bit 1111 xor1 cy, %1 */
-#line 1280 "rl78-decode.opc"
+#line 1279 "rl78-decode.opc"
int bit AU = (op[1] >> 4) & 0x07;
if (trace)
{
printf (" bit = 0x%x\n", bit);
}
SYNTAX("xor1 cy, %1");
-#line 1280 "rl78-decode.opc"
+#line 1279 "rl78-decode.opc"
ID(xor); DCY(); SR(A); SB(bit);
-
+
}
break;
case 0xc0:
op[0], op[1]);
}
SYNTAX("not1 cy");
-#line 917 "rl78-decode.opc"
+#line 916 "rl78-decode.opc"
ID(xor); DCY(); SC(1);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
default: UNSUPPORTED(); break;
SYNTAX("movw %e0, %1");
#line 877 "rl78-decode.opc"
ID(mov); W(); DM(BC, IMMU(2)); SR(AX);
-
+
}
break;
case 0x79:
SYNTAX("movw %0, %e1");
#line 868 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(BC, IMMU(2));
-
+
}
break;
case 0x7a:
op[0]);
}
SYNTAX("xor %0, #%1");
-#line 1272 "rl78-decode.opc"
+#line 1271 "rl78-decode.opc"
ID(xor); DM(None, SADDR); SC(IMMU(1)); Fz;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x7b:
op[0]);
}
SYNTAX("xor %0, %1");
-#line 1269 "rl78-decode.opc"
+#line 1268 "rl78-decode.opc"
ID(xor); DR(A); SM(None, SADDR); Fz;
-
+
}
break;
case 0x7c:
op[0]);
}
SYNTAX("xor %0, #%1");
-#line 1260 "rl78-decode.opc"
+#line 1259 "rl78-decode.opc"
ID(xor); DR(A); SC(IMMU(1)); Fz;
-
+
}
break;
case 0x7d:
op[0]);
}
SYNTAX("xor %0, %e1");
-#line 1248 "rl78-decode.opc"
+#line 1247 "rl78-decode.opc"
ID(xor); DR(A); SM(HL, 0); Fz;
-
+
}
break;
case 0x7e:
op[0]);
}
SYNTAX("xor %0, %ea1");
-#line 1254 "rl78-decode.opc"
+#line 1253 "rl78-decode.opc"
ID(xor); DR(A); SM(HL, IMMU(1)); Fz;
-
+
}
break;
case 0x7f:
op[0]);
}
SYNTAX("xor %0, %e!1");
-#line 1245 "rl78-decode.opc"
+#line 1244 "rl78-decode.opc"
ID(xor); DR(A); SM(None, IMMU(2)); Fz;
-
+
}
break;
case 0x80:
SYNTAX("inc %0");
#line 587 "rl78-decode.opc"
ID(add); DRB(reg); SC(1); Fza;
-
+
}
break;
case 0x88:
{
- /** 1000 1000 mov %0, %e1 */
+ /** 1000 1000 mov %0, %ea1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1000 1000 mov %0, %e1 */",
+ "/** 1000 1000 mov %0, %ea1 */",
op[0]);
}
- SYNTAX("mov %0, %e1");
+ SYNTAX("mov %0, %ea1");
#line 666 "rl78-decode.opc"
ID(mov); DR(A); SM(SP, IMMU(1));
-
+
}
break;
case 0x89:
SYNTAX("mov %0, %e1");
#line 648 "rl78-decode.opc"
ID(mov); DR(A); SM(DE, 0);
-
+
}
break;
case 0x8a:
{
- /** 1000 1010 mov %0, %e1 */
+ /** 1000 1010 mov %0, %ea1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1000 1010 mov %0, %e1 */",
+ "/** 1000 1010 mov %0, %ea1 */",
op[0]);
}
- SYNTAX("mov %0, %e1");
+ SYNTAX("mov %0, %ea1");
#line 651 "rl78-decode.opc"
ID(mov); DR(A); SM(DE, IMMU(1));
-
+
}
break;
case 0x8b:
SYNTAX("mov %0, %e1");
#line 654 "rl78-decode.opc"
ID(mov); DR(A); SM(HL, 0);
-
+
}
break;
case 0x8c:
SYNTAX("mov %0, %ea1");
#line 657 "rl78-decode.opc"
ID(mov); DR(A); SM(HL, IMMU(1));
-
+
}
break;
case 0x8d:
SYNTAX("mov %0, %1");
#line 690 "rl78-decode.opc"
ID(mov); DR(A); SM(None, SADDR);
-
+
}
break;
case 0x8e:
SYNTAX("mov %0, %s1");
#line 687 "rl78-decode.opc"
ID(mov); DR(A); SM(None, SFR);
-
+
}
break;
case 0x8f:
SYNTAX("mov %0, %e!1");
#line 645 "rl78-decode.opc"
ID(mov); DR(A); SM(None, IMMU(2));
-
+
}
break;
case 0x90:
SYNTAX("dec %0");
#line 554 "rl78-decode.opc"
ID(sub); DRB(reg); SC(1); Fza;
-
+
}
break;
case 0x98:
{
- /** 1001 1000 mov %0, %1 */
+ /** 1001 1000 mov %a0, %1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1001 1000 mov %0, %1 */",
+ "/** 1001 1000 mov %a0, %1 */",
op[0]);
}
- SYNTAX("mov %0, %1");
+ SYNTAX("mov %a0, %1");
#line 642 "rl78-decode.opc"
ID(mov); DM(SP, IMMU(1)); SR(A);
-
+
}
break;
case 0x99:
SYNTAX("mov %e0, %1");
#line 615 "rl78-decode.opc"
ID(mov); DM(DE, 0); SR(A);
-
+
}
break;
case 0x9a:
{
- /** 1001 1010 mov %e0, %1 */
+ /** 1001 1010 mov %ea0, %1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1001 1010 mov %e0, %1 */",
+ "/** 1001 1010 mov %ea0, %1 */",
op[0]);
}
- SYNTAX("mov %e0, %1");
+ SYNTAX("mov %ea0, %1");
#line 621 "rl78-decode.opc"
ID(mov); DM(DE, IMMU(1)); SR(A);
-
+
}
break;
case 0x9b:
SYNTAX("mov %e0, %1");
#line 624 "rl78-decode.opc"
ID(mov); DM(HL, 0); SR(A);
-
+
}
break;
case 0x9c:
SYNTAX("mov %ea0, %1");
#line 633 "rl78-decode.opc"
ID(mov); DM(HL, IMMU(1)); SR(A);
-
+
}
break;
case 0x9d:
SYNTAX("mov %0, %1");
#line 747 "rl78-decode.opc"
ID(mov); DM(None, SADDR); SR(A);
-
+
}
break;
case 0x9e:
{
- /** 1001 1110 mov %0, %1 */
+ /** 1001 1110 mov %s0, %1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1001 1110 mov %0, %1 */",
+ "/** 1001 1110 mov %s0, %1 */",
op[0]);
}
- SYNTAX("mov %0, %1");
+ SYNTAX("mov %s0, %1");
#line 780 "rl78-decode.opc"
ID(mov); DM(None, SFR); SR(A);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0x9f:
SYNTAX("mov %e!0, %1");
#line 612 "rl78-decode.opc"
ID(mov); DM(None, IMMU(2)); SR(A);
-
+
}
break;
case 0xa0:
SYNTAX("inc %e!0");
#line 581 "rl78-decode.opc"
ID(add); DM(None, IMMU(2)); SC(1); Fza;
-
+
}
break;
case 0xa1:
SYNTAX("incw %0");
#line 601 "rl78-decode.opc"
ID(add); W(); DRW(rg); SC(1);
-
+
}
break;
case 0xa2:
SYNTAX("incw %e!0");
#line 595 "rl78-decode.opc"
ID(add); W(); DM(None, IMMU(2)); SC(1);
-
+
}
break;
case 0xa4:
SYNTAX("inc %0");
#line 590 "rl78-decode.opc"
ID(add); DM(None, SADDR); SC(1); Fza;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xa6:
SYNTAX("incw %0");
#line 604 "rl78-decode.opc"
ID(add); W(); DM(None, SADDR); SC(1);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xa8:
{
- /** 1010 1000 movw %0, %1 */
+ /** 1010 1000 movw %0, %a1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1010 1000 movw %0, %1 */",
+ "/** 1010 1000 movw %0, %a1 */",
op[0]);
}
- SYNTAX("movw %0, %1");
+ SYNTAX("movw %0, %a1");
#line 850 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(SP, IMMU(1));
-
+
}
break;
case 0xa9:
SYNTAX("movw %0, %e1");
#line 838 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(DE, 0);
-
+
}
break;
case 0xaa:
{
- /** 1010 1010 movw %0, %e1 */
+ /** 1010 1010 movw %0, %ea1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1010 1010 movw %0, %e1 */",
+ "/** 1010 1010 movw %0, %ea1 */",
op[0]);
}
- SYNTAX("movw %0, %e1");
+ SYNTAX("movw %0, %ea1");
#line 841 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(DE, IMMU(1));
-
+
}
break;
case 0xab:
SYNTAX("movw %0, %e1");
#line 844 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(HL, 0);
-
+
}
break;
case 0xac:
SYNTAX("movw %0, %ea1");
#line 847 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(HL, IMMU(1));
-
+
}
break;
case 0xad:
SYNTAX("movw %0, %1");
#line 880 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(None, SADDR);
-
+
}
break;
case 0xae:
SYNTAX("movw %0, %s1");
#line 883 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(None, SFR);
-
+
}
break;
case 0xaf:
SYNTAX("movw %0, %e!1");
#line 834 "rl78-decode.opc"
ID(mov); W(); DR(AX); SM(None, IMMU(2));
-
-
+
+
}
break;
case 0xb0:
SYNTAX("dec %e!0");
#line 548 "rl78-decode.opc"
ID(sub); DM(None, IMMU(2)); SC(1); Fza;
-
+
}
break;
case 0xb1:
SYNTAX("decw %0");
#line 568 "rl78-decode.opc"
ID(sub); W(); DRW(rg); SC(1);
-
+
}
break;
case 0xb2:
SYNTAX("decw %e!0");
#line 562 "rl78-decode.opc"
ID(sub); W(); DM(None, IMMU(2)); SC(1);
-
+
}
break;
case 0xb4:
SYNTAX("dec %0");
#line 557 "rl78-decode.opc"
ID(sub); DM(None, SADDR); SC(1); Fza;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xb6:
SYNTAX("decw %0");
#line 571 "rl78-decode.opc"
ID(sub); W(); DM(None, SADDR); SC(1);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xb8:
{
- /** 1011 1000 movw %0, %1 */
+ /** 1011 1000 movw %a0, %1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1011 1000 movw %0, %1 */",
+ "/** 1011 1000 movw %a0, %1 */",
op[0]);
}
- SYNTAX("movw %0, %1");
+ SYNTAX("movw %a0, %1");
#line 831 "rl78-decode.opc"
ID(mov); W(); DM(SP, IMMU(1)); SR(AX);
-
+
}
break;
case 0xb9:
SYNTAX("movw %e0, %1");
#line 819 "rl78-decode.opc"
ID(mov); W(); DM(DE, 0); SR(AX);
-
+
}
break;
case 0xba:
{
- /** 1011 1010 movw %e0, %1 */
+ /** 1011 1010 movw %ea0, %1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1011 1010 movw %e0, %1 */",
+ "/** 1011 1010 movw %ea0, %1 */",
op[0]);
}
- SYNTAX("movw %e0, %1");
+ SYNTAX("movw %ea0, %1");
#line 822 "rl78-decode.opc"
ID(mov); W(); DM(DE, IMMU(1)); SR(AX);
-
+
}
break;
case 0xbb:
SYNTAX("movw %e0, %1");
#line 825 "rl78-decode.opc"
ID(mov); W(); DM(HL, 0); SR(AX);
-
+
}
break;
case 0xbc:
SYNTAX("movw %ea0, %1");
#line 828 "rl78-decode.opc"
ID(mov); W(); DM(HL, IMMU(1)); SR(AX);
-
+
}
break;
case 0xbd:
SYNTAX("movw %0, %1");
#line 895 "rl78-decode.opc"
ID(mov); W(); DM(None, SADDR); SR(AX);
-
+
}
break;
case 0xbe:
{
- /** 1011 1110 movw %0, %1 */
+ /** 1011 1110 movw %s0, %1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1011 1110 movw %0, %1 */",
+ "/** 1011 1110 movw %s0, %1 */",
op[0]);
}
- SYNTAX("movw %0, %1");
+ SYNTAX("movw %s0, %1");
#line 901 "rl78-decode.opc"
ID(mov); W(); DM(None, SFR); SR(AX);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xbf:
SYNTAX("movw %e!0, %1");
#line 816 "rl78-decode.opc"
ID(mov); W(); DM(None, IMMU(2)); SR(AX);
-
+
}
break;
case 0xc0:
case 0xc6:
{
/** 1100 0rg0 pop %0 */
-#line 987 "rl78-decode.opc"
+#line 986 "rl78-decode.opc"
int rg AU = (op[0] >> 1) & 0x03;
if (trace)
{
printf (" rg = 0x%x\n", rg);
}
SYNTAX("pop %0");
-#line 987 "rl78-decode.opc"
+#line 986 "rl78-decode.opc"
ID(mov); W(); DRW(rg); SPOP();
-
+
}
break;
case 0xc1:
case 0xc7:
{
/** 1100 0rg1 push %1 */
-#line 995 "rl78-decode.opc"
+#line 994 "rl78-decode.opc"
int rg AU = (op[0] >> 1) & 0x03;
if (trace)
{
printf (" rg = 0x%x\n", rg);
}
SYNTAX("push %1");
-#line 995 "rl78-decode.opc"
+#line 994 "rl78-decode.opc"
ID(mov); W(); DPUSH(); SRW(rg);
-
+
}
break;
case 0xc8:
{
- /** 1100 1000 mov %0, #%1 */
+ /** 1100 1000 mov %a0, #%1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1100 1000 mov %0, #%1 */",
+ "/** 1100 1000 mov %a0, #%1 */",
op[0]);
}
- SYNTAX("mov %0, #%1");
+ SYNTAX("mov %a0, #%1");
#line 639 "rl78-decode.opc"
ID(mov); DM(SP, IMMU(1)); SC(IMMU(1));
-
+
}
break;
case 0xc9:
SYNTAX("movw %0, #%1");
#line 892 "rl78-decode.opc"
ID(mov); W(); DM(None, SADDR); SC(IMMU(2));
-
+
}
break;
case 0xca:
{
- /** 1100 1010 mov %e0, #%1 */
+ /** 1100 1010 mov %ea0, #%1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1100 1010 mov %e0, #%1 */",
+ "/** 1100 1010 mov %ea0, #%1 */",
op[0]);
}
- SYNTAX("mov %e0, #%1");
+ SYNTAX("mov %ea0, #%1");
#line 618 "rl78-decode.opc"
ID(mov); DM(DE, IMMU(1)); SC(IMMU(1));
-
+
}
break;
case 0xcb:
{
- /** 1100 1011 movw %0, #%1 */
+ /** 1100 1011 movw %s0, #%1 */
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 1100 1011 movw %0, #%1 */",
+ "/** 1100 1011 movw %s0, #%1 */",
op[0]);
}
- SYNTAX("movw %0, #%1");
+ SYNTAX("movw %s0, #%1");
#line 898 "rl78-decode.opc"
ID(mov); W(); DM(None, SFR); SC(IMMU(2));
-
+
}
break;
case 0xcc:
SYNTAX("mov %ea0, #%1");
#line 630 "rl78-decode.opc"
ID(mov); DM(HL, IMMU(1)); SC(IMMU(1));
-
+
}
break;
case 0xcd:
SYNTAX("mov %0, #%1");
#line 744 "rl78-decode.opc"
ID(mov); DM(None, SADDR); SC(IMMU(1));
-
+
}
break;
case 0xce:
rl78->syntax = "divwu"; ID(divwu);
break;
}
-
+
}
break;
case 0xcf:
SYNTAX("mov %e!0, #%1");
#line 609 "rl78-decode.opc"
ID(mov); DM(None, IMMU(2)); SC(IMMU(1));
-
+
}
break;
case 0xd0:
SYNTAX("cmp0 %0");
#line 518 "rl78-decode.opc"
ID(cmp); DRB(rg); SC(0); Fzac;
-
+
}
break;
case 0xd4:
SYNTAX("cmp0 %0");
#line 521 "rl78-decode.opc"
ID(cmp); DM(None, SADDR); SC(0); Fzac;
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xd5:
SYNTAX("cmp0 %e!0");
#line 515 "rl78-decode.opc"
ID(cmp); DM(None, IMMU(2)); SC(0); Fzac;
-
+
}
break;
case 0xd6:
}
SYNTAX("mulu x");
#line 906 "rl78-decode.opc"
- if (isa == RL78_ISA_G14)
- ID(mulu);
-
+ ID(mulu);
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xd7:
op[0]);
}
SYNTAX("ret");
-#line 1003 "rl78-decode.opc"
+#line 1002 "rl78-decode.opc"
ID(ret);
-
+
}
break;
case 0xd8:
SYNTAX("mov %0, %1");
#line 711 "rl78-decode.opc"
ID(mov); DR(X); SM(None, SADDR);
-
+
}
break;
case 0xd9:
SYNTAX("mov %0, %e!1");
#line 708 "rl78-decode.opc"
ID(mov); DR(X); SM(None, IMMU(2));
-
+
}
break;
case 0xda:
SYNTAX("movw %0, %1");
#line 889 "rl78-decode.opc"
ID(mov); W(); DRW(ra); SM(None, SADDR);
-
+
}
break;
case 0xdb:
case 0xeb:
case 0xfb:
{
- /** 11ra 1011 movw %0, %e!1 */
+ /** 11ra 1011 movw %0, %es!1 */
#line 886 "rl78-decode.opc"
int ra AU = (op[0] >> 4) & 0x03;
if (trace)
{
printf ("\033[33m%s\033[0m %02x\n",
- "/** 11ra 1011 movw %0, %e!1 */",
+ "/** 11ra 1011 movw %0, %es!1 */",
op[0]);
printf (" ra = 0x%x\n", ra);
}
- SYNTAX("movw %0, %e!1");
+ SYNTAX("movw %0, %es!1");
#line 886 "rl78-decode.opc"
ID(mov); W(); DRW(ra); SM(None, IMMU(2));
-
+
}
break;
case 0xdc:
SYNTAX("bc $%a0");
#line 334 "rl78-decode.opc"
ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C);
-
+
}
break;
case 0xdd:
SYNTAX("bz $%a0");
#line 346 "rl78-decode.opc"
ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z);
-
+
}
break;
case 0xde:
SYNTAX("bnc $%a0");
#line 337 "rl78-decode.opc"
ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC);
-
+
}
break;
case 0xdf:
SYNTAX("bnz $%a0");
#line 349 "rl78-decode.opc"
ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xe0:
case 0xe3:
{
/** 1110 00rg oneb %0 */
-#line 925 "rl78-decode.opc"
+#line 924 "rl78-decode.opc"
int rg AU = op[0] & 0x03;
if (trace)
{
printf (" rg = 0x%x\n", rg);
}
SYNTAX("oneb %0");
-#line 925 "rl78-decode.opc"
+#line 924 "rl78-decode.opc"
ID(mov); DRB(rg); SC(1);
-
+
}
break;
case 0xe4:
op[0]);
}
SYNTAX("oneb %0");
-#line 928 "rl78-decode.opc"
+#line 927 "rl78-decode.opc"
ID(mov); DM(None, SADDR); SC(1);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xe5:
op[0]);
}
SYNTAX("oneb %e!0");
-#line 922 "rl78-decode.opc"
+#line 921 "rl78-decode.opc"
ID(mov); DM(None, IMMU(2)); SC(1);
-
+
}
break;
case 0xe6:
op[0]);
}
SYNTAX("onew %0");
-#line 933 "rl78-decode.opc"
+#line 932 "rl78-decode.opc"
ID(mov); DR(AX); SC(1);
-
+
}
break;
case 0xe7:
op[0]);
}
SYNTAX("onew %0");
-#line 936 "rl78-decode.opc"
+#line 935 "rl78-decode.opc"
ID(mov); DR(BC); SC(1);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xe8:
SYNTAX("mov %0, %1");
#line 699 "rl78-decode.opc"
ID(mov); DR(B); SM(None, SADDR);
-
+
}
break;
case 0xe9:
SYNTAX("mov %0, %e!1");
#line 693 "rl78-decode.opc"
ID(mov); DR(B); SM(None, IMMU(2));
-
+
}
break;
case 0xec:
SYNTAX("br !%!a0");
#line 368 "rl78-decode.opc"
ID(branch); DC(IMMU(3));
-
+
}
break;
case 0xed:
SYNTAX("br %!a0");
#line 371 "rl78-decode.opc"
ID(branch); DC(IMMU(2));
-
+
}
break;
case 0xee:
SYNTAX("br $%!a0");
#line 374 "rl78-decode.opc"
ID(branch); DC(pc+IMMS(2)+3);
-
+
}
break;
case 0xef:
SYNTAX("br $%a0");
#line 377 "rl78-decode.opc"
ID(branch); DC(pc+IMMS(1)+2);
-
+
}
break;
case 0xf0:
SYNTAX("clrb %0");
#line 464 "rl78-decode.opc"
ID(mov); DRB(rg); SC(0);
-
+
}
break;
case 0xf4:
SYNTAX("clrb %0");
#line 467 "rl78-decode.opc"
ID(mov); DM(None, SADDR); SC(0);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xf5:
SYNTAX("clrb %e!0");
#line 461 "rl78-decode.opc"
ID(mov); DM(None, IMMU(2)); SC(0);
-
+
}
break;
case 0xf6:
SYNTAX("clrw %0");
#line 472 "rl78-decode.opc"
ID(mov); DR(AX); SC(0);
-
+
}
break;
case 0xf7:
SYNTAX("clrw %0");
#line 475 "rl78-decode.opc"
ID(mov); DR(BC); SC(0);
-
+
/*----------------------------------------------------------------------*/
-
+
}
break;
case 0xf8:
SYNTAX("mov %0, %1");
#line 705 "rl78-decode.opc"
ID(mov); DR(C); SM(None, SADDR);
-
+
}
break;
case 0xf9:
SYNTAX("mov %0, %e!1");
#line 702 "rl78-decode.opc"
ID(mov); DR(C); SM(None, IMMU(2));
-
+
}
break;
case 0xfc:
SYNTAX("call !%!a0");
#line 421 "rl78-decode.opc"
ID(call); DC(IMMU(3));
-
+
}
break;
case 0xfd:
SYNTAX("call %!a0");
#line 424 "rl78-decode.opc"
ID(call); DC(IMMU(2));
-
+
}
break;
case 0xfe:
SYNTAX("call $%!a0");
#line 427 "rl78-decode.opc"
ID(call); DC(pc+IMMS(2)+3);
-
+
}
break;
case 0xff:
SYNTAX("brk1");
#line 385 "rl78-decode.opc"
ID(break);
-
+
}
break;
}
-#line 1291 "rl78-decode.opc"
+#line 1290 "rl78-decode.opc"
return rl78->n_bytes;
}
projects / deliverable / binutils-gdb.git / blobdiff