Check all inline frames if they are marked for skip

[deliverable/binutils-gdb.git] / opcodes / score7-dis.c

diff --git a/opcodes/score7-dis.c b/opcodes/score7-dis.c
index b48d1786b772e45807208fe1e943d49a8c7eef63..5d74c8bf051dcef4ea3e864b573ad148e90713f1 100644 (file)
--- a/opcodes/score7-dis.c
+++ b/opcodes/score7-dis.c
@@ -1,5 +1,5 @@
 /* Instruction printing code for Score
-   Copyright 2009 Free Software Foundation, Inc.
+   Copyright (C) 2009-2019 Free Software Foundation, Inc.
    Contributed by:
    Brain.lin (brain.lin@sunplusct.com)
    Mei Ligang (ligang@sunnorth.com.cn)
@@ -59,7 +59,7 @@ static struct score_opcode score_opcodes[] =
 {
   /* Score Instructions.  */
   {0x3800000a, 0x3e007fff, "abs\t\t%20-24r, %15-19r"},
-  {0x3800004b, 0x3e007fff, "abs.s\t\t%20-24r, %15-19r"},        
+  {0x3800004b, 0x3e007fff, "abs.s\t\t%20-24r, %15-19r"},
   {0x00000010, 0x3e0003ff, "add\t\t%20-24r, %15-19r, %10-14r"},
   {0x00000011, 0x3e0003ff, "add.c\t\t%20-24r, %15-19r, %10-14r"},
   {0x38000048, 0x3e0003ff, "add.s\t\t%20-24r, %15-19r, %10-14r"},
@@ -226,32 +226,32 @@ static struct score_opcode score_opcodes[] =
   {0x31e00000, 0x3ff00000, "cache\t\t%20-24d, [%15-19r, %0-14i]"},
   {0x31f00000, 0x3ff00000, "cache\t\t%20-24d, [%15-19r, %0-14i]"},
   {0x38000000, 0x3ff003ff, "mad\t\t%15-19r, %10-14r"},
-  {0x38000020, 0x3ff003ff, "madu\t\t%15-19r, %10-14r"},        
+  {0x38000020, 0x3ff003ff, "madu\t\t%15-19r, %10-14r"},
   {0x38000080, 0x3ff003ff, "mad.f\t\t%15-19r, %10-14r"},
-  {0x38000001, 0x3ff003ff, "msb\t\t%15-19r, %10-14r"},    
+  {0x38000001, 0x3ff003ff, "msb\t\t%15-19r, %10-14r"},
   {0x38000021, 0x3ff003ff, "msbu\t\t%15-19r, %10-14r"},
   {0x38000081, 0x3ff003ff, "msb.f\t\t%15-19r, %10-14r"},
-  {0x38000102, 0x3ff003ff, "mazl\t\t%15-19r, %10-14r"},        
-  {0x38000182, 0x3ff003ff, "mazl.f\t\t%15-19r, %10-14r"},        
-  {0x38000002, 0x3ff003ff, "madl\t\t%15-19r, %10-14r"},    
-  {0x380000c2, 0x3ff003ff, "madl.fs\t\t%15-19r, %10-14r"},        
-  {0x38000303, 0x3ff003ff, "mazh\t\t%15-19r, %10-14r"},    
-  {0x38000383, 0x3ff003ff, "mazh.f\t\t%15-19r, %10-14r"},    
-  {0x38000203, 0x3ff003ff, "madh\t\t%15-19r, %10-14r"},    
-  {0x380002c3, 0x3ff003ff, "madh.fs\t\t%15-19r, %10-14r"},    
-  {0x38000007, 0x3e0003ff, "max\t\t%20-24r, %15-19r, %10-14r"},    
+  {0x38000102, 0x3ff003ff, "mazl\t\t%15-19r, %10-14r"},
+  {0x38000182, 0x3ff003ff, "mazl.f\t\t%15-19r, %10-14r"},
+  {0x38000002, 0x3ff003ff, "madl\t\t%15-19r, %10-14r"},
+  {0x380000c2, 0x3ff003ff, "madl.fs\t\t%15-19r, %10-14r"},
+  {0x38000303, 0x3ff003ff, "mazh\t\t%15-19r, %10-14r"},
+  {0x38000383, 0x3ff003ff, "mazh.f\t\t%15-19r, %10-14r"},
+  {0x38000203, 0x3ff003ff, "madh\t\t%15-19r, %10-14r"},
+  {0x380002c3, 0x3ff003ff, "madh.fs\t\t%15-19r, %10-14r"},
+  {0x38000007, 0x3e0003ff, "max\t\t%20-24r, %15-19r, %10-14r"},
   {0x38000006, 0x3e0003ff, "min\t\t%20-24r, %15-19r, %10-14r"},
-  {0x38000104, 0x3ff003ff, "mszl\t\t%15-19r, %10-14r"},    
-  {0x38000184, 0x3ff003ff, "mszl.f\t\t%15-19r, %10-14r"},    
-  {0x38000004, 0x3ff003ff, "msbl\t\t%15-19r, %10-14r"},        
+  {0x38000104, 0x3ff003ff, "mszl\t\t%15-19r, %10-14r"},
+  {0x38000184, 0x3ff003ff, "mszl.f\t\t%15-19r, %10-14r"},
+  {0x38000004, 0x3ff003ff, "msbl\t\t%15-19r, %10-14r"},
   {0x380000c4, 0x3ff003ff, "msbl.fs\t\t%15-19r, %10-14r"},
-  {0x38000305, 0x3ff003ff, "mszh\t\t%15-19r, %10-14r"},        
-  {0x38000385, 0x3ff003ff, "mszh.f\t\t%15-19r, %10-14r"},    
-  {0x38000205, 0x3ff003ff, "msbh\t\t%15-19r, %10-14r"},        
-  {0x380002c5, 0x3ff003ff, "msbh.fs\t\t%15-19r, %10-14r"},        
-  {0x3800004e, 0x3e0003ff, "sll.s\t\t%20-24r, %15-19r, %10-14r"},                
-  {0x38000049, 0x3e0003ff, "sub.s\t\t%20-24r, %15-19r, %10-14r"},    
-  {0x3800000d, 0x3e007fff, "clz\t\t%20-24r, %15-19r"},    
+  {0x38000305, 0x3ff003ff, "mszh\t\t%15-19r, %10-14r"},
+  {0x38000385, 0x3ff003ff, "mszh.f\t\t%15-19r, %10-14r"},
+  {0x38000205, 0x3ff003ff, "msbh\t\t%15-19r, %10-14r"},
+  {0x380002c5, 0x3ff003ff, "msbh.fs\t\t%15-19r, %10-14r"},
+  {0x3800004e, 0x3e0003ff, "sll.s\t\t%20-24r, %15-19r, %10-14r"},
+  {0x38000049, 0x3e0003ff, "sub.s\t\t%20-24r, %15-19r, %10-14r"},
+  {0x3800000d, 0x3e007fff, "clz\t\t%20-24r, %15-19r"},
   {0x38000000, 0x3e000000, "ceinst\t\t%20-24d, %15-19r, %10-14r, %5-9d, %0-4d"},
   {0x00000019, 0x3ff003ff, "cmpteq.c\t\t%15-19r, %10-14r"},
   {0x00100019, 0x3ff003ff, "cmptmi.c\t\t%15-19r, %10-14r"},
@@ -310,16 +310,16 @@ static struct score_opcode score_opcodes[] =
   {0x0e000000, 0x3e000007, "lw\t\t%20-24r, [%15-19r]+, %3-14i"},
   {0x00002008, 0x0000700f, "lw!\t\t%8-11r, [%4-7r]"},
   {0x00007000, 0x00007007, "lwp!\t\t%8-11r, %3-7d2"},
-  {0x0000100b, 0x0000700f, "madh.fs!\t\t%8-11r, %4-7r"}, 
-  {0x0000100a, 0x0000700f, "madl.fs!\t\t%8-11r, %4-7r"}, 
-  {0x00001005, 0x0000700f, "madu!\t\t%8-11r, %4-7r"}, 
+  {0x0000100b, 0x0000700f, "madh.fs!\t\t%8-11r, %4-7r"},
+  {0x0000100a, 0x0000700f, "madl.fs!\t\t%8-11r, %4-7r"},
+  {0x00001005, 0x0000700f, "madu!\t\t%8-11r, %4-7r"},
   {0x00001004, 0x0000700f, "mad.f!\t\t%8-11r, %4-7r"},
-  {0x00001009, 0x0000700f, "mazh.f!\t\t%8-11r, %4-7r"}, 
+  {0x00001009, 0x0000700f, "mazh.f!\t\t%8-11r, %4-7r"},
   {0x00001008, 0x0000700f, "mazl.f!\t\t%8-11r, %4-7r"},
   {0x00000448, 0x3e007fff, "mfcel\t\t%20-24r"},
   {0x00001001, 0x00007f0f, "mfcel!\t\t%4-7r"},
-  {0x00000848, 0x3e007fff, "mfceh\t\t%20-24r"},  
-  {0x00001101, 0x00007f0f, "mfceh!\t\t%4-7r"},        
+  {0x00000848, 0x3e007fff, "mfceh\t\t%20-24r"},
+  {0x00001101, 0x00007f0f, "mfceh!\t\t%4-7r"},
   {0x00000c48, 0x3e007fff, "mfcehl\t\t%20-24r, %15-19r"},
   {0x00000048, 0x3e0003ff, "mfce\t\t%20-24r, er%10-14d"},
   {0x00000050, 0x3e0003ff, "mfsr\t\t%20-24r, sr%10-14d"},
@@ -331,10 +331,10 @@ static struct score_opcode score_opcodes[] =
   {0x0c000017, 0x3e00001f, "mfcc2\t\t%20-24r, c%15-19r"},
   {0x0c00001f, 0x3e00001f, "mfcc3\t\t%20-24r, c%15-19r"},
   {0x00000002, 0x0000700f, "mhfl!\t\t%8-11R, %4-7r"},
-  {0x00000001, 0x0000700f, "mlfh!\t\t%8-11r, %4-7R"},  
+  {0x00000001, 0x0000700f, "mlfh!\t\t%8-11r, %4-7R"},
   {0x00001006, 0x0000700f, "msb.f!\t\t%8-11r, %4-7r"},
   {0x0000100f, 0x0000700f, "msbh.fs!\t\t%8-11r, %4-7r"},
-  {0x0000100e, 0x0000700f, "msbl.fs!\t\t%8-11r, %4-7r"}, 
+  {0x0000100e, 0x0000700f, "msbl.fs!\t\t%8-11r, %4-7r"},
   {0x00001007, 0x0000700f, "msbu!\t\t%8-11r, %4-7r"},
   {0x0000100d, 0x0000700f, "mszh.f!\t\t%8-11r, %4-7r"},
   {0x0000100c, 0x0000700f, "mszl.f!\t\t%8-11r, %4-7r"},
@@ -355,11 +355,11 @@ static struct score_opcode score_opcodes[] =
   {0x00000040, 0x3e0003ff, "mul\t\t%15-19r, %10-14r"},
   {0x00000040, 0x3e0003ff, "maz\t\t%15-19r, %10-14r"},
   {0x00000041, 0x3e0003ff, "mul.f\t\t%15-19r, %10-14r"},
-  {0x00000041, 0x3e0003ff, "maz.f\t\t%15-19r, %10-14r"},    
+  {0x00000041, 0x3e0003ff, "maz.f\t\t%15-19r, %10-14r"},
   {0x00001002, 0x0000700f, "mul.f!\t\t%8-11r, %4-7r"},
   {0x00000042, 0x3e0003ff, "mulu\t\t%15-19r, %10-14r"},
   {0x00000042, 0x3e0003ff, "mazu\t\t%15-19r, %10-14r"},
-  {0x00001003, 0x0000700f, "mulu!\t\t%8-11r, %4-7r"},    
+  {0x00001003, 0x0000700f, "mulu!\t\t%8-11r, %4-7r"},
   {0x00000056, 0x3e007fff, "mvcs\t\t%20-24r, %15-19r"},
   {0x00000456, 0x3e007fff, "mvcc\t\t%20-24r, %15-19r"},
   {0x00000856, 0x3e007fff, "mvgtu\t\t%20-24r, %15-19r"},
@@ -386,8 +386,8 @@ static struct score_opcode score_opcodes[] =
   {0x00002006, 0x0000700f, "not!\t\t%8-11r, %4-7r"},
   {0x00000022, 0x3e0003ff, "or\t\t%20-24r, %15-19r, %10-14r"},
   {0x00000023, 0x3e0003ff, "or.c\t\t%20-24r, %15-19r, %10-14r"},
-  {0x020a0000, 0x3e0e0001, "ori\t\t%20-24r, 0x%1-16x"},    
-  {0x020a0001, 0x3e0e0001, "ori.c\t\t%20-24r, 0x%1-16x"},    
+  {0x020a0000, 0x3e0e0001, "ori\t\t%20-24r, 0x%1-16x"},
+  {0x020a0001, 0x3e0e0001, "ori.c\t\t%20-24r, 0x%1-16x"},
   {0x0a0a0000, 0x3e0e0001, "oris\t\t%20-24r, 0x%1-16x"},
   {0x0a0a0001, 0x3e0e0001, "oris.c\t\t%20-24r, 0x%1-16x"},
   {0x1a000000, 0x3e000001, "orri\t\t%20-24r, %15-19r, 0x%1-14x"},
@@ -513,7 +513,8 @@ static struct score_opcode score_opcodes[] =
   {0x00000d05, 0x00007f0f, "tvc!"},
   {0x00000026, 0x3e0003ff, "xor\t\t%20-24r, %15-19r, %10-14r"},
   {0x00000027, 0x3e0003ff, "xor.c\t\t%20-24r, %15-19r, %10-14r"},
-  {0x00002007, 0x0000700f, "xor!\t\t%8-11r, %4-7r"}
+  {0x00002007, 0x0000700f, "xor!\t\t%8-11r, %4-7r"},
+  { 0, 0, NULL }
 };
 
 typedef struct
@@ -537,7 +538,7 @@ static unsigned int regname_selected = 0;
 #define score_regnames      regnames[regname_selected].reg_names
 
 /* s3_s7: opcodes and export prototypes.  */
-int 
+int
 s7_print_insn (bfd_vma pc, struct disassemble_info *info, bfd_boolean little);
 
 /* Print one instruction from PC on INFO->STREAM.