binutils: support for the SPARC M8 processor

[deliverable/binutils-gdb.git] / opcodes / sparc-dis.c

diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c
index 739deb1660d7879187f0dba9d63964d10dd4b4f4..1742bb1bde875147a398333d632c7fb29f6d5fe9 100644 (file)
--- a/opcodes/sparc-dis.c
+++ b/opcodes/sparc-dis.c
@@ -33,7 +33,8 @@
                 | (1 << SPARC_OPCODE_ARCH_V9D) \
                 | (1 << SPARC_OPCODE_ARCH_V9E) \
                 | (1 << SPARC_OPCODE_ARCH_V9V) \
-                | (1 << SPARC_OPCODE_ARCH_V9M))
+                | (1 << SPARC_OPCODE_ARCH_V9M) \
+                | (1 << SPARC_OPCODE_ARCH_M8))
 /* 1 if INSN is for v9 only.  */
 #define V9_ONLY_P(insn) (! ((insn)->architecture & ~MASK_V9))
 /* 1 if INSN is for v9.  */
@@ -128,6 +129,7 @@ static char *v9a_asr_reg_names[] =
 #define X_DISP22(i)  (((i) >> 0) & 0x3fffff)
 #define X_IMM22(i)   X_DISP22 (i)
 #define X_DISP30(i)  (((i) >> 0) & 0x3fffffff)
+#define X_IMM2(i)    (((i & 0x10) >> 3) | (i & 0x1))
 
 /* These are for v9.  */
 #define X_DISP16(i)  (((((i) >> 20) & 3) << 14) | (((i) >> 0) & 0x3fff))
@@ -261,6 +263,9 @@ compute_arch_mask (unsigned long mach)
     case bfd_mach_sparc_v8plusm :
     case bfd_mach_sparc_v9m :
       return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9M);
+    case bfd_mach_sparc_v8plusm8 :
+    case bfd_mach_sparc_v9m8 :
+      return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_M8);
     }
   abort ();
 }
@@ -653,6 +658,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
                    break;
                  case 'v':     /* Double/even.  */
                  case 'V':     /* Quad/multiple of 4.  */
+                  case ';':    /* Double/even multiple of 8 doubles.  */
                    fregx (X_RS1 (insn));
                    break;
 
@@ -661,6 +667,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
                    break;
                  case 'B':     /* Double/even.  */
                  case 'R':     /* Quad/multiple of 4.  */
+                  case ':':    /* Double/even multiple of 8 doubles.  */
                    fregx (X_RS2 (insn));
                    break;
 
@@ -679,6 +686,15 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
                  case '}':     /* Double/even.  */
                    fregx (X_RD (insn));
                    break;
+                    
+                  case '^':    /* Double/even multiple of 8 doubles.  */
+                    fregx (X_RD (insn) & ~0x6);
+                    break;
+                    
+                  case '\'':   /* Double/even in FPCMPSHL.  */
+                    fregx (X_RS2 (insn | 0x11));
+                    break;
+                    
 #undef freg
 #undef fregx
 
@@ -818,6 +834,10 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
                    (*info->fprintf_func) (stream, "%%mcdper");
                    break;
 
+                  case '&':
+                    (*info->fprintf_func) (stream, "%%entropy");
+                    break;
+
                  case 'o':
                    (*info->fprintf_func) (stream, "%%asi");
                    break;
@@ -969,6 +989,10 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
                                            + X_ASI (insn)));
                    break;
 
+                  case '|': /* 2-bit immediate  */
+                    (*info->fprintf_func) (stream, "%ld", X_IMM2 (insn));
+                    break;
+
                  case 'y':
                    (*info->fprintf_func) (stream, "%%y");
                    break;