[AArch64, Binutils] Add missing TSB instruction

[deliverable/binutils-gdb.git] / opcodes / sparc-dis.c

diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c
index 1742bb1bde875147a398333d632c7fb29f6d5fe9..c825c863b2ec69d81afa37e214185941dde14e79 100644 (file)
--- a/opcodes/sparc-dis.c
+++ b/opcodes/sparc-dis.c
@@ -1,5 +1,5 @@
 /* Print SPARC instructions.
-   Copyright (C) 1989-2017 Free Software Foundation, Inc.
+   Copyright (C) 1989-2020 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -63,8 +63,8 @@ static sparc_opcode_hash *opcode_hash_table[HASH_SIZE];
 
 /* Sign-extend a value which is N bits long.  */
 #define        SEX(value, bits) \
-       ((((int)(value)) << ((8 * sizeof (int)) - bits))        \
-                        >> ((8 * sizeof (int)) - bits) )
+  ((int) (((value & ((1u << (bits - 1) << 1) - 1))     \
+          ^ (1u << (bits - 1))) - (1u << (bits - 1))))
 
 static  char *reg_names[] =
 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
@@ -303,10 +303,9 @@ compare_opcodes (const void * a, const void * b)
      wrong with the opcode table.  */
   if (match0 & lose0)
     {
-      fprintf
-       (stderr,
-        /* xgettext:c-format */
-        _("Internal error:  bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"),
+      opcodes_error_handler
+       /* xgettext:c-format */
+       (_("internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"),
         op0->name, match0, lose0);
       op0->lose &= ~op0->match;
       lose0 = op0->lose;
@@ -314,10 +313,9 @@ compare_opcodes (const void * a, const void * b)
 
   if (match1 & lose1)
     {
-      fprintf
-       (stderr,
-        /* xgettext:c-format */
-        _("Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"),
+      opcodes_error_handler
+       /* xgettext:c-format */
+       (_("internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"),
         op1->name, match1, lose1);
       op1->lose &= ~op1->match;
       lose1 = op1->lose;
@@ -327,7 +325,7 @@ compare_opcodes (const void * a, const void * b)
      another, it is important to order the opcodes in the right order.  */
   for (i = 0; i < 32; ++i)
     {
-      unsigned long int x = 1 << i;
+      unsigned long int x = 1ul << i;
       int x0 = (match0 & x) != 0;
       int x1 = (match1 & x) != 0;
 
@@ -337,7 +335,7 @@ compare_opcodes (const void * a, const void * b)
 
   for (i = 0; i < 32; ++i)
     {
-      unsigned long int x = 1 << i;
+      unsigned long int x = 1ul << i;
       int x0 = (lose0 & x) != 0;
       int x1 = (lose1 & x) != 0;
 
@@ -374,10 +372,10 @@ compare_opcodes (const void * a, const void * b)
          return i;
        }
       else
-       fprintf (stderr,
-                /* xgettext:c-format */
-                _("Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"),
-                op0->name, op1->name);
+       opcodes_error_handler
+         /* xgettext:c-format */
+         (_("internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"),
+          op0->name, op1->name);
     }
 
   /* Fewer arguments are preferred.  */
@@ -714,8 +712,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
 
                  case 'h':
                    (*info->fprintf_func) (stream, "%%hi(%#x)",
-                                          ((unsigned) 0xFFFFFFFF
-                                           & ((int) X_IMM22 (insn) << 10)));
+                                          (unsigned) X_IMM22 (insn) << 10);
                    break;
 
                  case 'i':     /* 13 bit immediate.  */
@@ -1064,9 +1061,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
                      && X_RD (prev_insn) == X_RS1 (insn))
                    {
                      (*info->fprintf_func) (stream, "\t! ");
-                     info->target =
-                       ((unsigned) 0xFFFFFFFF
-                        & ((int) X_IMM22 (prev_insn) << 10));
+                     info->target = (unsigned) X_IMM22 (prev_insn) << 10;
                      if (imm_added_to_rs1)
                        info->target += X_SIMM (insn, 13);
                      else