/* Single instruction disassembler for the Visium.
- Copyright (C) 2002-2019 Free Software Foundation, Inc.
+ Copyright (C) 2002-2020 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
/* BRR instruction. */
{
unsigned cbf = (ins >> 27) & 0x000f;
- int displacement = ((int) (ins << 16)) >> 16;
+ int displacement = ((ins & 0xffff) ^ 0x8000) - 0x8000;
if (ins == 0)
(*info->fprintf_func) (info->stream, "nop");
}
return 0;
-illegal_opcode:
+ illegal_opcode:
return -1;
}
return 0;
-illegal_opcode:
+ illegal_opcode:
return -1;
}
return 0;
-illegal_opcode:
+ illegal_opcode:
return -1;
}
return 0;
-illegal_opcode:
+ illegal_opcode:
return -1;
}
/* Get 32-bit instruction word. */
FETCH_DATA (info, buffer + 4);
- ins = buffer[0] << 24;
+ ins = (unsigned) buffer[0] << 24;
ins |= buffer[1] << 16;
ins |= buffer[2] << 8;
ins |= buffer[3];