[ARC][committed] Update int_vector_base aux register.

[deliverable/binutils-gdb.git] / opcodes / xc16x-ibld.c

diff --git a/opcodes/xc16x-ibld.c b/opcodes/xc16x-ibld.c
index 9871663e77180db0d8ff17fb9f32e00a448c11b1..6b228bcdfcdefeb02f7981ca51bbc0561429f5d0 100644 (file)
--- a/opcodes/xc16x-ibld.c
+++ b/opcodes/xc16x-ibld.c
@@ -4,7 +4,7 @@
    THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
    - the resultant file is machine generated, cgen-ibld.in isn't
 
-   Copyright (C) 1996-2018 Free Software Foundation, Inc.
+   Copyright (C) 1996-2020 Free Software Foundation, Inc.
 
    This file is part of libopcodes.
 
@@ -480,7 +480,10 @@ extract_normal (CGEN_CPU_DESC cd,
        abort ();
 
       if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
-       return 0;
+       {
+         *valuep = 0;
+         return 0;
+       }
 
       value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
     }