This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with this program; if not, see <http://www.gnu.org/licenses/>. */
+
+#include <string.h>
#include "armdefs.h"
#include "armemu.h"
+#include "dbg_rdi.h"
/***************************************************************************\
* Definitions for the emulator architecture *
}
for (i = 0; i < 7; i++)
state->Spsr[i] = 0;
-
- state->Mode = USER26MODE;
+
+ /* state->Mode = USER26MODE; */
+ state->Mode = USER32MODE;
state->CallDebug = FALSE;
state->Debug = FALSE;
state->OSptr = NULL;
state->CommandLine = NULL;
+ state->CP14R0_CCD = -1;
+ state->LastTime = 0;
+
state->EventSet = 0;
state->Now = 0;
state->EventPtr = (struct EventNode **) malloc ((unsigned) EVENTLISTSIZE *
for (i = 0; i < EVENTLISTSIZE; i++)
*(state->EventPtr + i) = NULL;
-#ifdef ARM61
- state->prog32Sig = LOW;
- state->data32Sig = LOW;
-#else
state->prog32Sig = HIGH;
state->data32Sig = HIGH;
-#endif
state->lateabtSig = LOW;
state->bigendSig = LOW;
- state->is_StrongARM = LOW;
+ state->is_v4 = LOW;
+ state->is_v5 = LOW;
+ state->is_v5e = LOW;
+ state->is_XScale = LOW;
+ state->is_iWMMXt = LOW;
+ state->is_v6 = LOW;
ARMul_Reset (state);
- return (state);
+
+ return state;
}
/***************************************************************************\
-* Call this routine to set ARMulator to model a certain processor *
+ Call this routine to set ARMulator to model certain processor properities
\***************************************************************************/
void
-ARMul_SelectProcessor (ARMul_State * state, unsigned processor)
+ARMul_SelectProcessor (ARMul_State * state, unsigned properties)
{
- if (processor & ARM_Fix26_Prop)
+ if (properties & ARM_Fix26_Prop)
{
state->prog32Sig = LOW;
state->data32Sig = LOW;
state->lateabtSig = LOW;
- state->is_StrongARM = (processor & ARM_Strong_Prop) ? HIGH : LOW;
+ state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW;
+ state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW;
+ state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW;
+ state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW;
+ state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) ? HIGH : LOW;
+ state->is_ep9312 = (properties & ARM_ep9312_Prop) ? HIGH : LOW;
+ state->is_v6 = (properties & ARM_v6_Prop) ? HIGH : LOW;
+
+ /* Only initialse the coprocessor support once we
+ know what kind of chip we are dealing with. */
+ ARMul_CoProInit (state);
}
/***************************************************************************\
{
ARMword temp;
int isize = INSN_SIZE;
+ int esize = (TFLAG ? 0 : 4);
+ int e2size = (TFLAG ? -4 : 0);
state->Aborted = FALSE;
break;
case ARMul_PrefetchAbortV: /* Prefetch Abort */
state->AbortAddr = 1;
- SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, isize);
+ SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, esize);
break;
case ARMul_DataAbortV: /* Data Abort */
- SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, isize);
+ SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, e2size);
break;
case ARMul_AddrExceptnV: /* Address Exception */
SETABORT (IBIT, SVC26MODE, isize);
break;
case ARMul_IRQV: /* IRQ */
- SETABORT (IBIT, state->prog32Sig ? IRQ32MODE : IRQ26MODE, isize);
+ if ( ! state->is_XScale
+ || ! state->CPRead[13] (state, 0, & temp)
+ || (temp & ARMul_CP13_R0_IRQ))
+ SETABORT (IBIT, state->prog32Sig ? IRQ32MODE : IRQ26MODE, esize);
break;
case ARMul_FIQV: /* FIQ */
- SETABORT (INTBITS, state->prog32Sig ? FIQ32MODE : FIQ26MODE, isize);
+ if ( ! state->is_XScale
+ || ! state->CPRead[13] (state, 0, & temp)
+ || (temp & ARMul_CP13_R0_FIQ))
+ SETABORT (INTBITS, state->prog32Sig ? FIQ32MODE : FIQ26MODE, esize);
break;
}
if (ARMul_MODE32BIT)
ARMul_SetR15 (state, vector);
else
ARMul_SetR15 (state, R15CCINTMODE | vector);
+
+ if (ARMul_ReadWord (state, ARMul_GetPC (state)) == 0)
+ {
+ /* No vector has been installed. Rather than simulating whatever
+ random bits might happen to be at address 0x20 onwards we elect
+ to stop. */
+ switch (vector)
+ {
+ case ARMul_ResetV: state->EndCondition = RDIError_Reset; break;
+ case ARMul_UndefinedInstrV: state->EndCondition = RDIError_UndefinedInstruction; break;
+ case ARMul_SWIV: state->EndCondition = RDIError_SoftwareInterrupt; break;
+ case ARMul_PrefetchAbortV: state->EndCondition = RDIError_PrefetchAbort; break;
+ case ARMul_DataAbortV: state->EndCondition = RDIError_DataAbort; break;
+ case ARMul_AddrExceptnV: state->EndCondition = RDIError_AddressException; break;
+ case ARMul_IRQV: state->EndCondition = RDIError_IRQ; break;
+ case ARMul_FIQV: state->EndCondition = RDIError_FIQ; break;
+ default: break;
+ }
+ state->Emulate = FALSE;
+ }
}
projects / deliverable / binutils-gdb.git / blobdiff