Fix parameters passed to CPRead[13] and CPRead[14].

[deliverable/binutils-gdb.git] / sim / arm / arminit.c

diff --git a/sim/arm/arminit.c b/sim/arm/arminit.c
index 3ee4c698201a2407f9acfe885e9b271631178d40..c0312e95239d79ec82e174a1986b0d34ceebda6a 100644 (file)
--- a/sim/arm/arminit.c
+++ b/sim/arm/arminit.c
@@ -85,8 +85,9 @@ ARMul_NewState (void)
     }
   for (i = 0; i < 7; i++)
     state->Spsr[i] = 0;
-  
-  state->Mode = USER26MODE;
+
+  /* state->Mode = USER26MODE;  */
+  state->Mode = USER32MODE;
 
   state->CallDebug = FALSE;
   state->Debug = FALSE;
@@ -105,6 +106,9 @@ ARMul_NewState (void)
   state->OSptr = NULL;
   state->CommandLine = NULL;
 
+  state->CP14R0_CCD = -1;
+  state->LastTime = 0;
+
   state->EventSet = 0;
   state->Now = 0;
   state->EventPtr = (struct EventNode **) malloc ((unsigned) EVENTLISTSIZE *
@@ -113,31 +117,30 @@ ARMul_NewState (void)
   for (i = 0; i < EVENTLISTSIZE; i++)
     *(state->EventPtr + i) = NULL;
 
-#ifdef ARM61
-  state->prog32Sig = LOW;
-  state->data32Sig = LOW;
-#else
   state->prog32Sig = HIGH;
   state->data32Sig = HIGH;
-#endif
 
   state->lateabtSig = LOW;
   state->bigendSig = LOW;
 
-  state->is_StrongARM = LOW;
+  state->is_v4 = LOW;
+  state->is_v5 = LOW;
+  state->is_v5e = LOW;
+  state->is_XScale = LOW;
 
   ARMul_Reset (state);
-  return (state);
+
+  return state;
 }
 
 /***************************************************************************\
-*       Call this routine to set ARMulator to model a certain processor     *
+  Call this routine to set ARMulator to model certain processor properities
 \***************************************************************************/
 
 void
-ARMul_SelectProcessor (ARMul_State * state, unsigned processor)
+ARMul_SelectProcessor (ARMul_State * state, unsigned properties)
 {
-  if (processor & ARM_Fix26_Prop)
+  if (properties & ARM_Fix26_Prop)
     {
       state->prog32Sig = LOW;
       state->data32Sig = LOW;
@@ -150,7 +153,10 @@ ARMul_SelectProcessor (ARMul_State * state, unsigned processor)
 
   state->lateabtSig = LOW;
 
-  state->is_StrongARM = (processor & ARM_Strong_Prop) ? HIGH : LOW;
+  state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW;
+  state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW;
+  state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW;
+  state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW;
 }
 
 /***************************************************************************\
@@ -258,6 +264,8 @@ ARMul_Abort (ARMul_State * state, ARMword vector)
 {
   ARMword temp;
   int isize = INSN_SIZE;
+  int esize = (TFLAG ? 0 : 4);
+  int e2size = (TFLAG ? -4 : 0);
 
   state->Aborted = FALSE;
 
@@ -285,19 +293,25 @@ ARMul_Abort (ARMul_State * state, ARMword vector)
       break;
     case ARMul_PrefetchAbortV: /* Prefetch Abort */
       state->AbortAddr = 1;
-      SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, isize);
+      SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, esize);
       break;
     case ARMul_DataAbortV:     /* Data Abort */
-      SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, isize);
+      SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, e2size);
       break;
     case ARMul_AddrExceptnV:   /* Address Exception */
       SETABORT (IBIT, SVC26MODE, isize);
       break;
     case ARMul_IRQV:           /* IRQ */
-      SETABORT (IBIT, state->prog32Sig ? IRQ32MODE : IRQ26MODE, isize);
+      if (   ! state->is_XScale
+         || ! state->CPRead[13] (state, 0, & temp)
+         || (temp & ARMul_CP13_R0_IRQ))
+        SETABORT (IBIT, state->prog32Sig ? IRQ32MODE : IRQ26MODE, esize);
       break;
     case ARMul_FIQV:           /* FIQ */
-      SETABORT (INTBITS, state->prog32Sig ? FIQ32MODE : FIQ26MODE, isize);
+      if (   ! state->is_XScale
+         || ! state->CPRead[13] (state, 0, & temp)
+         || (temp & ARMul_CP13_R0_FIQ))
+        SETABORT (INTBITS, state->prog32Sig ? FIQ32MODE : FIQ26MODE, esize);
       break;
     }
   if (ARMul_MODE32BIT)