/* Blackfin External Bus Interface Unit (EBIU) Asynchronous Memory Controller
(AMC) model.
- Copyright (C) 2010-2016 Free Software Foundation, Inc.
+ Copyright (C) 2010-2019 Free Software Foundation, Inc.
Contributed by Analog Devices, Inc.
This file is part of simulators.
{
bu32 amben_old, amben, addr, i;
- amben_old = MIN ((amc->amgctl >> 1) & 0x7, 4);
- amben = MIN ((amgctl >> 1) & 0x7, 4);
+ amben_old = min ((amc->amgctl >> 1) & 0x7, 4);
+ amben = min ((amgctl >> 1) & 0x7, 4);
HW_TRACE ((me, "reattaching banks: AMGCTL 0x%04x[%u] -> 0x%04x[%u]",
amc->amgctl, amben_old, amgctl, amben));