ubsan: aarch64: left shift cannot be represented in type 'int64_t'

[deliverable/binutils-gdb.git] / sim / bfin / dv-bfin_otp.c

diff --git a/sim/bfin/dv-bfin_otp.c b/sim/bfin/dv-bfin_otp.c
index fdda463fbf73849293767b01db0ab80c8e128328..6e13179b36e801386696ce366917a506dd9126eb 100644 (file)
--- a/sim/bfin/dv-bfin_otp.c
+++ b/sim/bfin/dv-bfin_otp.c
@@ -1,6 +1,6 @@
 /* Blackfin One-Time Programmable Memory (OTP) model
 
-   Copyright (C) 2010-2013 Free Software Foundation, Inc.
+   Copyright (C) 2010-2019 Free Software Foundation, Inc.
    Contributed by Analog Devices, Inc.
 
    This file is part of simulators.
@@ -104,6 +104,10 @@ bfin_otp_io_write_buffer (struct hw *me, const void *source, int space,
   bu32 *value32p;
   void *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true))
+    return 0;
+
   if (nr_bytes == 4)
     value = dv_load_4 (source);
   else
@@ -122,7 +126,8 @@ bfin_otp_io_write_buffer (struct hw *me, const void *source, int space,
       {
        int page;
 
-       dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
+       if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
+         return 0;
        /* XXX: Seems like these bits aren't writable.  */
        *value16p = value & 0x39FF;
 
@@ -142,12 +147,14 @@ bfin_otp_io_write_buffer (struct hw *me, const void *source, int space,
        break;
       }
     case mmr_offset(ben):
-      dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
+      if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
+       return 0;
       /* XXX: All bits seem to be writable.  */
       *value16p = value;
       break;
     case mmr_offset(status):
-      dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
+      if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
+       return 0;
       /* XXX: All bits seem to be W1C.  */
       dv_w1c_2 (value16p, value, -1);
       break;
@@ -156,12 +163,13 @@ bfin_otp_io_write_buffer (struct hw *me, const void *source, int space,
     case mmr_offset(data1):
     case mmr_offset(data2):
     case mmr_offset(data3):
-      dv_bfin_mmr_require_32 (me, addr, nr_bytes, true);
+      if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true))
+       return 0;
       *value32p = value;
       break;
     default:
       dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
-      break;
+      return 0;
     }
 
   return nr_bytes;
@@ -177,6 +185,10 @@ bfin_otp_io_read_buffer (struct hw *me, void *dest, int space,
   bu32 *value32p;
   void *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false))
+    return 0;
+
   mmr_off = addr - otp->base;
   valuep = (void *)((unsigned long)otp + mmr_base() + mmr_off);
   value16p = valuep;
@@ -189,7 +201,8 @@ bfin_otp_io_read_buffer (struct hw *me, void *dest, int space,
     case mmr_offset(control):
     case mmr_offset(ben):
     case mmr_offset(status):
-      dv_bfin_mmr_require_16 (me, addr, nr_bytes, false);
+      if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false))
+       return 0;
       dv_store_2 (dest, *value16p);
       break;
     case mmr_offset(timing):
@@ -197,12 +210,13 @@ bfin_otp_io_read_buffer (struct hw *me, void *dest, int space,
     case mmr_offset(data1):
     case mmr_offset(data2):
     case mmr_offset(data3):
-      dv_bfin_mmr_require_32 (me, addr, nr_bytes, false);
+      if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false))
+       return 0;
       dv_store_4 (dest, *value32p);
       break;
     default:
       dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
-      break;
+      return 0;
     }
 
   return nr_bytes;