sim: bfin: add support disasm tracing

[deliverable/binutils-gdb.git] / sim / bfin / interp.c

diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c
index accf5f33fc63f5a5125f2cc19535b7e6270de816..ccd6a8a8c79aa44b63cdc4aa415cfdadd679fb12 100644 (file)
--- a/sim/bfin/interp.c
+++ b/sim/bfin/interp.c
@@ -606,6 +606,8 @@ step_once (SIM_CPU *cpu)
     trace_prefix (sd, cpu, NULL_CIA, oldpc, TRACE_LINENUM_P (cpu),
                  NULL, 0, " "); /* Use a space for gcc warnings.  */
 
+  TRACE_DISASM (cpu, oldpc);
+
   /* Handle hardware single stepping when lower than EVT3, and when SYSCFG
      has already had the SSSTEP bit enabled.  */
   ssstep = false;