/* Simulator for Analog Devices Blackfin processors.
- Copyright (C) 2005-2015 Free Software Foundation, Inc.
+ Copyright (C) 2005-2020 Free Software Foundation, Inc.
Contributed by Analog Devices, Inc.
This file is part of simulators.
#include "sim-basics.h"
#include "sim-signal.h"
-
-/* TODO: Delete this. Need to convert bu32/etc... to common sim types
- and unwind the bfin-sim.h/machs.h include below first though. */
-typedef struct _sim_cpu SIM_CPU;
+#include "arch.h"
+#include "sim-base.h"
#include "bfin-sim.h"
#include "machs.h"
-#include "sim-base.h"
-
struct _sim_cpu {
/* ... simulator specific members ... */
struct bfin_cpu_state state;
#include "sim-options.h"
#include "dv-bfin_trace.h"
-#undef MAX
-#undef MIN
#undef CLAMP
#undef ALIGN
-#define MAX(a, b) ((a) > (b) ? (a) : (b))
-#define MIN(a, b) ((a) < (b) ? (a) : (b))
-#define CLAMP(a, b, c) MIN (MAX (a, b), c)
+#define CLAMP(a, b, c) min (max (a, b), c)
#define ALIGN(addr, size) (((addr) + ((size)-1)) & ~((size)-1))
-#define MAYBE_TRACE(type, cpu, fmt, ...) \
+/* TODO: Move all this trace logic to the common code. */
+#define BFIN_TRACE_CORE(cpu, addr, size, map, val) \
do { \
- if (TRACE_##type##_P (cpu)) \
- trace_generic (CPU_STATE (cpu), cpu, TRACE_##type##_IDX, \
- fmt, ## __VA_ARGS__); \
- } while (0)
-#define TRACE_INSN(cpu, fmt, ...) MAYBE_TRACE (INSN, cpu, fmt, ## __VA_ARGS__)
-#define TRACE_DECODE(cpu, fmt, ...) MAYBE_TRACE (DECODE, cpu, fmt, ## __VA_ARGS__)
-#define TRACE_EXTRACT(cpu, fmt, ...) MAYBE_TRACE (EXTRACT, cpu, fmt, ## __VA_ARGS__)
-#define TRACE_SYSCALL(cpu, fmt, ...) MAYBE_TRACE (SYSCALL, cpu, fmt, ## __VA_ARGS__)
-#define TRACE_CORE(cpu, addr, size, map, val) \
- do { \
- MAYBE_TRACE (CORE, cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
- map == exec_map ? 'I' : 'D', \
- map == write_map ? "STORE" : "FETCH", \
- size, addr, size * 2, val); \
+ TRACE_CORE (cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
+ map == exec_map ? 'I' : 'D', \
+ map == write_map ? "STORE" : "FETCH", \
+ size, addr, size * 2, val); \
PROFILE_COUNT_CORE (cpu, addr, size, map); \
} while (0)
-#define TRACE_EVENTS(cpu, fmt, ...) MAYBE_TRACE (EVENTS, cpu, fmt, ## __VA_ARGS__)
-#define TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
+#define BFIN_TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
do { \
- MAYBE_TRACE (BRANCH, cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
+ TRACE_BRANCH (cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \
bfin_trace_queue (cpu, oldpc, newpc, hwloop); \
} while (0)
-extern void trace_register (SIM_DESC sd,
- sim_cpu *cpu,
- const char *fmt,
- ...)
- __attribute__((format (printf, 3, 4)));
-#define TRACE_REGISTER(cpu, fmt, ...) \
- do { \
- if (TRACE_CORE_P (cpu)) \
- trace_register (CPU_STATE (cpu), cpu, fmt, ## __VA_ARGS__); \
- } while (0)
-#define TRACE_REG(cpu, reg, val) TRACE_REGISTER (cpu, "wrote "#reg" = %#x", val)
-
/* Default memory size. */
#define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)