# Makefile fragment for common parts of all simulators.
-# Copyright (C) 1997 Free Software Foundation, Inc.
+# Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
# Contributed by Cygnus Support.
# This program is free software; you can redistribute it and/or modify
infodir = @infodir@
includedir = @includedir@
-SHELL = /bin/sh
+# This can be referenced by the gettext configuration code.
+top_builddir = ..
+
+EXEEXT = @EXEEXT@
+SHELL = @SHELL@
INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
SIM_ENDIAN = @sim_endian@
SIM_ENVIRONMENT = @sim_environment@
SIM_FLOAT = @sim_float@
-SIM_HARDWARE = @sim_hardware@
+SIM_HW_CFLAGS = @sim_hw_cflags@
+SIM_HW_OBJS = @sim_hw_objs@
+SIM_HW = @sim_hw@
SIM_HOSTENDIAN = @sim_hostendian@
SIM_INLINE = @sim_inline@
SIM_PACKAGES = @sim_packages@
SIM_SCACHE = @sim_scache@
SIM_SMP = @sim_smp@
SIM_STDCALL = @sim_stdcall@
-SIM_WARNINGS = @sim_warnings@
SIM_XOR_ENDIAN = @sim_xor_endian@
+WARN_CFLAGS = @WARN_CFLAGS@
+WERROR_CFLAGS = @WERROR_CFLAGS@
+SIM_WARN_CFLAGS = $(WARN_CFLAGS)
+SIM_WERROR_CFLAGS = $(WERROR_CFLAGS)
HDEFINES = @HDEFINES@
TDEFINES =
# here. Some files are used by all simulators (e.g. callback.o).
# Those files are specified in LIB_OBJS below.
+SIM_COMMON_HW_OBJS = \
+ hw-alloc.o \
+ hw-base.o \
+ hw-device.o \
+ hw-events.o \
+ hw-handles.o \
+ hw-instances.o \
+ hw-ports.o \
+ hw-properties.o \
+ hw-tree.o \
+ sim-hw.o \
+
SIM_NEW_COMMON_OBJS = \
+ sim-arange.o \
sim-bits.o \
sim-break.o \
sim-config.o \
sim-signal.o \
sim-trace.o \
sim-utils.o \
- sim-watch.o
+ sim-watch.o \
+ \
+ $(SIM_HW_OBJS) \
+
+# Add this to SIM_EXTRA_DEPS.
+CGEN_INCLUDE_DEPS = \
+ $(srccom)/cgen-cpu.h \
+ $(srccom)/cgen-defs.h \
+ $(srccom)/cgen-engine.h \
+ $(srccom)/cgen-scache.h \
+ $(srccom)/cgen-sim.h \
+ $(srccom)/cgen-trace.h \
+ $(srccom)/cgen-types.h \
+ $(srcdir)/../../include/opcode/cgen.h
## End COMMON_PRE_CONFIG_FRAG
## COMMON_POST_CONFIG_FRAG
-CONFIG_CFLAGS = @DEFS@ \
+CONFIG_CFLAGS = \
+ @DEFS@ \
$(SIM_CFLAGS) \
$(SIM_DEBUG) \
$(SIM_DEFAULT_MODEL) \
$(SIM_ENDIAN) \
$(SIM_ENVIRONMENT) \
$(SIM_FLOAT) \
- $(SIM_HARDWARE) \
+ $(SIM_HW_CFLAGS) \
$(SIM_HOSTENDIAN) \
$(SIM_INLINE) \
$(SIM_PACKAGES) \
$(SIM_SCACHE) \
$(SIM_SMP) \
$(SIM_STDCALL) \
- $(SIM_WARNINGS) \
+ $(SIM_WARN_CFLAGS) \
+ $(SIM_WERROR_CFLAGS) \
$(SIM_XOR_ENDIAN) \
+ $(SIM_HARDWARE) \
$(SIM_EXTRA_CFLAGS) \
$(HDEFINES) $(TDEFINES)
CSEARCH = -I. -I$(srcdir) -I../common -I$(srccom) \
-I../../include -I$(srcroot)/include \
-I../../bfd -I$(srcroot)/bfd \
- -I../../opcodes -I$(srcroot)/opcodes
+ -I../../opcodes -I$(srcroot)/opcodes \
+ -I../../intl -I$(srcroot)/intl
ALL_CFLAGS = $(CONFIG_CFLAGS) $(CSEARCH) $(CFLAGS)
BUILD_CFLAGS = -g -O $(CSEARCH)
LIBIBERTY_LIB = ../../libiberty/libiberty.a
BFD_LIB = ../../bfd/libbfd.a
OPCODES_LIB = ../../opcodes/libopcodes.a
+INTLLIBS = @INTLLIBS@
+INTLDEPS = @INTLDEPS@
CONFIG_LIBS = @LIBS@
-LIBDEPS = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB) \
+LIBDEPS = $(BFD_LIB) $(OPCODES_LIB) $(INTLLIBS) $(LIBIBERTY_LIB) \
$(SIM_EXTRA_LIBDEPS)
-EXTRA_LIBS = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB) \
+EXTRA_LIBS = $(BFD_LIB) $(OPCODES_LIB) $(INTLLIBS) $(LIBIBERTY_LIB) \
$(CONFIG_LIBS) $(SIM_EXTRA_LIBS)
LIB_OBJS = callback.o syscall.o targ-map.o $(SIM_OBJS)
+RUNTESTFLAGS =
+
all: $(SIM_EXTRA_ALL) libsim.a run .gdbinit
libsim.a: $(LIB_OBJS)
$(RANLIB) libsim.a
run: $(SIM_RUN_OBJS) libsim.a $(LIBDEPS)
- $(CC) $(ALL_CFLAGS) -o run \
+ $(CC) $(ALL_CFLAGS) -o run$(EXEEXT) \
$(SIM_RUN_OBJS) libsim.a $(EXTRA_LIBS)
run.o: $(srccom)/run.c config.h tconfig.h \
stamp-tvals: gentmap
rm -f tmp-tvals.h tmp-tmap.c
./gentmap -h >tmp-tvals.h
- $(srcroot)/move-if-change tmp-tvals.h targ-vals.h
+ $(SHELL) $(srcroot)/move-if-change tmp-tvals.h targ-vals.h
./gentmap -c >tmp-tmap.c
- $(srcroot)/move-if-change tmp-tmap.c targ-map.c
+ $(SHELL) $(srcroot)/move-if-change tmp-tmap.c targ-map.c
touch stamp-tvals
#
sim_main_headers = \
sim-main.h \
- $(srccom)/sim-config.h \
+ $(srccom)/sim-assert.h \
$(srccom)/sim-base.h \
$(srccom)/sim-basics.h \
- $(srccom)/sim-signal.h \
+ $(srccom)/sim-config.h \
+ $(srccom)/sim-cpu.h \
+ $(srccom)/sim-engine.h \
+ $(srccom)/sim-events.h \
+ $(srccom)/sim-inline.h \
$(srccom)/sim-memopt.h \
$(srccom)/sim-model.h \
$(srccom)/sim-module.h \
- $(srccom)/sim-trace.h \
$(srccom)/sim-profile.h \
- $(srccom)/sim-engine.h \
- $(srccom)/sim-events.h \
+ $(srccom)/sim-signal.h \
+ $(srccom)/sim-trace.h \
$(srccom)/sim-watch.h \
- $(srccom)/sim-assert.h \
tconfig.h \
$(SIM_EXTRA_DEPS)
+# Exported version of sim_main_headers.
+SIM_MAIN_DEPS = \
+ $(sim_main_headers)
+
sim-assert_h = $(srccom)/sim-assert.h
sim-endian_h = $(srccom)/sim-endian.h
sim-n-endian_h = $(srccom)/sim-n-endian.h
+sim-arange_h = $(srccom)/sim-arange.h
sim-bits_h = $(srccom)/sim-bits.h
sim-config_h = $(srccom)/sim-config.h
sim-n-bits_h = $(srccom)/sim-n-bits.h
sim-break_h = $(srccom)/sim-break.h
sim-signal_h = $(srccom)/sim-signal.h
+hw-alloc_h = $(srccom)/hw-alloc.h
+hw-base_h = $(srccom)/hw-base.h
+hw-device_h = $(srccom)/hw-device.h
+hw-events_h = $(srccom)/hw-events.h
+hw-handles_h = $(srccom)/hw-handles.h
+hw-instances_h = $(srccom)/hw-instances.h
+hw-ports_h = $(srccom)/hw-ports.h
+hw-properties_h = $(srccom)/hw-properties.h
+hw-tree_h = $(srccom)/hw-tree.h
+
+hw_main_headers = \
+ $(srccom)/hw-main.h \
+ $(hw-alloc_h) \
+ $(hw-base_h) \
+ $(hw-device_h) \
+ $(hw-events_h) \
+ $(hw-instances_h) \
+ $(hw-handles_h) \
+ $(hw-ports_h) \
+ $(hw-properties_h) \
+
# FIXME: If this complicated way of building .o files from ../common is
# necessary, the reason should be documented here.
$(SIM_EXTRA_DEPS)
$(CC) -c $(srccom)/sim-abort.c $(ALL_CFLAGS)
+sim-arange.o: $(srccom)/sim-arange.c $(sim-arange_h) $(SIM_EXTRA_DEPS)
+ $(CC) -c $(srccom)/sim-arange.c $(ALL_CFLAGS)
+
sim-bits.o: $(srccom)/sim-bits.c $(sim-bits_h) $(sim-n-bits_h) \
$(SIM_EXTRA_DEPS)
$(CC) -c $(srccom)/sim-bits.c $(ALL_CFLAGS)
$(CC) -c $(srccom)/sim-config.c $(ALL_CFLAGS)
sim-core.o: $(srccom)/sim-core.c $(sim_main_headers) \
- $(sim-core_h) $(sim-n-core_h) \
- $(SIM_EXTRA_DEPS)
+ $(sim-core_h) $(sim-n-core_h)
$(CC) -c $(srccom)/sim-core.c $(ALL_CFLAGS)
-sim-endian.o: $(srccom)/sim-endian.c $(sim-endian_h) $(sim-n-endian_h) \
- $(SIM_EXTRA_DEPS)
+sim-cpu.o: $(srccom)/sim-cpu.c $(sim_main_headers)
+ $(CC) -c $(srccom)/sim-cpu.c $(ALL_CFLAGS)
+
+sim-endian.o: $(srccom)/sim-endian.c $(sim-endian_h) $(sim-n-endian_h)
$(CC) -c $(srccom)/sim-endian.c $(ALL_CFLAGS)
sim-engine.o: $(srccom)/sim-engine.c $(sim_main_headers) $(sim-engine_h)
$(SIM_EXTRA_DEPS)
$(CC) -c $(srccom)/sim-hrw.c $(ALL_CFLAGS)
+sim-hw.o: $(srccom)/sim-hw.c $(sim_main_headers)
+ $(CC) -c $(srccom)/sim-hw.c $(ALL_CFLAGS)
+
sim-info.o: $(srccom)/sim-info.c $(sim-assert_h) \
$(srcroot)/include/remote-sim.h \
$(SIM_EXTRA_DEPS)
rm -f $@ tmp-$@
echo "# 1 \"$(srccom)/$@\"" > tmp-$@
cat $(srccom)/$@ >> tmp-$@
- $(srcdir)/../../move-if-change tmp-$@ $@
+ $(SHELL) $(srcdir)/../../move-if-change tmp-$@ $@
sim-io.o: $(srccom)/sim-io.c $(sim_main_headers) $(sim-io_h) \
$(srcroot)/include/remote-sim.h
$(srcroot)/include/remote-sim.h
$(CC) -c $(srccom)/sim-reason.c $(ALL_CFLAGS)
+sim-reg.o: $(srccom)/sim-reg.c $(sim_main_headers) \
+ $(srcroot)/include/remote-sim.h
+ $(CC) -c $(srccom)/sim-reg.c $(ALL_CFLAGS)
+
sim-resume.o: $(srccom)/sim-resume.c $(sim_main_headers) \
$(srcroot)/include/remote-sim.h
$(CC) -c $(srccom)/sim-resume.c $(ALL_CFLAGS)
$(sim_break_h)
$(CC) -c $(srccom)/sim-break.c $(ALL_CFLAGS)
+
+# FIXME This is one very simple-minded way of generating the file hw-config.h
+hw-config.h: Makefile.in $(srccom)/Make-common.in config.status Makefile
+ rm -f tmp-hw.h
+ echo "/* generated by Makefile */" > tmp-hw.h
+ for hw in $(SIM_HW) ; do \
+ echo "extern const struct hw_descriptor dv_$${hw}_descriptor[];" ; \
+ done >> tmp-hw.h
+ echo "const struct hw_descriptor *hw_descriptors[] = {" >> tmp-hw.h
+ for hw in $(SIM_HW) ; do \
+ echo " dv_$${hw}_descriptor," ; \
+ done >> tmp-hw.h
+ echo " NULL," >> tmp-hw.h
+ echo "};" >> tmp-hw.h
+ mv tmp-hw.h hw-config.h
+
+hw-alloc.o: $(srccom)/hw-alloc.c $(hw_main_headers)
+ $(CC) -c $(srccom)/hw-alloc.c $(ALL_CFLAGS)
+
+hw-base.o: $(srccom)/hw-base.c $(hw_main_headers) hw-config.h
+ $(CC) -c $(srccom)/hw-base.c $(ALL_CFLAGS)
+
+hw-device.o: $(srccom)/hw-device.c $(hw_main_headers)
+ $(CC) -c $(srccom)/hw-device.c $(ALL_CFLAGS)
+
+hw-events.o: $(srccom)/hw-events.c $(hw_main_headers) $(sim_main_headers)
+ $(CC) -c $(srccom)/hw-events.c $(ALL_CFLAGS)
+
+test-hw-events: $(srccom)/hw-events.c libsim.a
+ $(CC) $(ALL_CFLAGS) -DMAIN -o test-hw-events$(EXEEXT) \
+ $(srccom)/hw-events.c libsim.a $(EXTRA_LIBS)
+
+hw-instances.o: $(srccom)/hw-instances.c $(hw_main_headers)
+ $(CC) -c $(srccom)/hw-instances.c $(ALL_CFLAGS)
+
+hw-handles.o: $(srccom)/hw-handles.c $(hw_main_headers)
+ $(CC) -c $(srccom)/hw-handles.c $(ALL_CFLAGS)
+
+hw-ports.o: $(srccom)/hw-ports.c $(hw_main_headers)
+ $(CC) -c $(srccom)/hw-ports.c $(ALL_CFLAGS)
+
+hw-properties.o: $(srccom)/hw-properties.c $(hw_main_headers)
+ $(CC) -c $(srccom)/hw-properties.c $(ALL_CFLAGS)
+
+hw-tree.o: $(srccom)/hw-tree.c $(hw_main_headers) $(hw-tree_h)
+ $(CC) -c $(srccom)/hw-tree.c $(ALL_CFLAGS)
+
+# Devices.
+
+dv-core.o: $(srccom)/dv-core.c $(hw_main_headers) $(sim_main_headers)
+ $(CC) -c $(srccom)/dv-core.c $(ALL_CFLAGS)
+
+dv-glue.o: $(srccom)/dv-glue.c $(hw_main_headers) $(sim_main_headers)
+ $(CC) -c $(srccom)/dv-glue.c $(ALL_CFLAGS)
+
+dv-pal.o: $(srccom)/dv-pal.c $(hw_main_headers) $(sim_main_headers)
+ $(CC) -c $(srccom)/dv-pal.c $(ALL_CFLAGS)
+
+dv-sockser.o: $(srccom)/dv-sockser.h $(sim_main_headers)
+ $(CC) -c $(srccom)/dv-sockser.c $(ALL_CFLAGS)
+
+
nrun.o: $(srccom)/nrun.c config.h tconfig.h \
$(srcroot)/include/remote-sim.h $(srcroot)/include/callback.h \
$(sim_main_headers)
# CGEN support.
-cgen-run.o: $(srccom)/cgen-run.c $(sim_main_headers) \
- $(srccom)/cgen-mem.h $(srccom)/cgen-ops.h
+# For use in Makefile.in for cpu-specific files.
+CGEN_MAIN_CPU_DEPS = \
+ $(SIM_MAIN_DEPS) \
+ $(CGEN_INCLUDE_DEPS) \
+ $(srccom)/cgen-ops.h \
+ $(srccom)/cgen-mem.h \
+ $(srccom)/cgen-par.h \
+ $(srccom)/cgen-fpu.h
+
+cgen-run.o: $(srccom)/cgen-run.c $(sim_main_headers)
$(CC) -c $(srccom)/cgen-run.c $(ALL_CFLAGS)
cgen-scache.o: $(srccom)/cgen-scache.c $(sim_main_headers)
$(CC) -c $(srccom)/cgen-scache.c $(ALL_CFLAGS)
-cgen-trace.o: $(srccom)/cgen-trace.c $(sim_main_headers) \
- $(srccom)/cgen-trace.h
+cgen-trace.o: $(srccom)/cgen-trace.c $(sim_main_headers)
$(CC) -c $(srccom)/cgen-trace.c $(ALL_CFLAGS)
+cgen-fpu.o: $(srccom)/cgen-fpu.c $(sim_main_headers) $(sim-fpu_h)
+ $(CC) -c $(srccom)/cgen-fpu.c $(ALL_CFLAGS)
+
+cgen-accfp.o: $(srccom)/cgen-accfp.c $(sim_main_headers) $(sim-fpu_h)
+ $(CC) -c $(srccom)/cgen-accfp.c $(ALL_CFLAGS)
+
cgen-utils.o: $(srccom)/cgen-utils.c $(sim_main_headers) \
- $(srccom)/cgen-mem.h $(srccom)/cgen-ops.h
+ $(srccom)/cgen-mem.h $(srccom)/cgen-ops.h $(srccom)/cgen-engine.h
$(CC) -c $(srccom)/cgen-utils.c $(ALL_CFLAGS)
+cgen-par.o: $(srccom)/cgen-par.c $(sim_main_headers) \
+ $(srccom)/cgen-mem.h $(srccom)/cgen-par.h
+ $(CC) -c $(srccom)/cgen-par.c $(ALL_CFLAGS)
+
# Support targets.
install: install-common $(SIM_EXTRA_INSTALL)
install-common: installdirs
n=`echo run | sed '$(program_transform_name)'`; \
- $(INSTALL_PROGRAM) run $(bindir)/$$n
+ $(INSTALL_PROGRAM) run$(EXEEXT) $(bindir)/$$n$(EXEEXT)
+ n=`echo libsim.a | sed s/libsim.a/lib$(target_alias)-sim.a/`; \
+ $(INSTALL_DATA) libsim.a $(libdir)/$$n ; \
+ ( cd $(libdir) ; $(RANLIB) $$n )
installdirs:
$(SHELL) $(srcdir)/../../mkinstalldirs $(bindir)
check:
- cd ../testsuite && $(MAKE) check
+ cd ../testsuite && $(MAKE) check RUNTESTFLAGS="$(RUNTESTFLAGS)"
info:
clean-info:
tags etags: TAGS
+# Macros like EXTERN_SIM_CORE confuse tags.
+# And the sim-n-foo.h files create functions that can't be found either.
TAGS: force
- etags --regex '/^\/[*] TAGS: .*/' *.c *.h
+ cd $(srcdir) && \
+ etags --regex '/^\([a-z_]+\) (/\1/' --regex '/^\/[*] TAGS: .*/' \
+ *.[ch] ../common/*.[ch]
clean: $(SIM_EXTRA_CLEAN)
rm -f *.[oa] *~ core
if [ ! -f Make-common.in ] ; then \
rm -f $(BUILT_SRC_FROM_COMMON) ; \
fi
+ rm -f tmp-mloop.hin tmp-mloop.h tmp-mloop.cin tmp-mloop.c
distclean mostlyclean maintainer-clean realclean: clean
rm -f TAGS
.gdbinit: # config.status $(srccom)/gdbinit.in
CONFIG_FILES=$@:../common/gdbinit.in CONFIG_HEADERS= $(SHELL) ./config.status
-# start-sanitize-cygnus
-
-# CGEN support
-
-SCHEME = @SCHEME@
-SCHEMEFLAGS = -s
-srccgen = $(srcroot)/cgen
-
-CGEN_VERBOSE = -v
-CGEN_MAIN_SCM = $(srccgen)/object.scm $(srccgen)/utils.scm \
- $(srccgen)/attr.scm $(srccgen)/enum.scm $(srccgen)/types.scm \
- $(srccgen)/utils-cgen.scm $(srccgen)/cpu.scm \
- $(srccgen)/mode.scm $(srccgen)/mach.scm \
- $(srccgen)/model.scm $(srccgen)/hardware.scm \
- $(srccgen)/ifield.scm $(srccgen)/iformat.scm \
- $(srccgen)/operand.scm $(srccgen)/insn.scm \
- $(srccgen)/cdl-c.scm $(srccgen)/sim.scm
-CGEN_CPU_SCM = $(srccgen)/sim-cpu.scm $(srccgen)/sim-model.scm
-CGEN_DECODE_SCM = $(srccgen)/sim-decode.scm
-
-# Various choices for which cpu specific files to generate.
-CGEN_CPU_EXTR = -E tmp-ext.c1
-CGEN_CPU_READ = -R tmp-read.c1
-CGEN_CPU_SEM = -S tmp-sem.c1
-CGEN_CPU_SEMSW = -W tmp-semsw.c1
-
-# We store the generated files in the source directory until we decide to
-# ship a Scheme interpreter with gdb/binutils. Maybe we never will.
-
-cgen-arch: force
- $(SHELL) $(srccom)/cgen.sh arch $(srcdir) \
- $(SCHEME) $(SCHEMEFLAGS) \
- $(srccgen) $(CGEN_VERBOSE) \
- $(arch) "$(FLAGS)" ignored ignored ignored ignored
-
-cgen-cpu: force
- $(SHELL) $(srccom)/cgen.sh cpu $(srcdir) \
- $(SCHEME) $(SCHEMEFLAGS) \
- $(srccgen) $(CGEN_VERBOSE) \
- $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" "$(EXTRAFILES)"
-
-cgen-decode: force
- $(SHELL) $(srccom)/cgen.sh decode $(srcdir) \
- $(SCHEME) $(SCHEMEFLAGS) \
- $(srccgen) $(CGEN_VERBOSE) \
- $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" ignored
-
-# end-sanitize-cygnus
## End COMMON_POST_CONFIG_FRAG
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