# Makefile fragment for common parts of all simulators.
-# Copyright (C) 1997, 1998 Free Software Foundation, Inc.
+# Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
# Contributed by Cygnus Support.
# This program is free software; you can redistribute it and/or modify
SIM_SCACHE = @sim_scache@
SIM_SMP = @sim_smp@
SIM_STDCALL = @sim_stdcall@
-SIM_WARNINGS = @sim_warnings@
SIM_XOR_ENDIAN = @sim_xor_endian@
+WARN_CFLAGS = @WARN_CFLAGS@
+WERROR_CFLAGS = @WERROR_CFLAGS@
+SIM_WARN_CFLAGS = $(WARN_CFLAGS)
+SIM_WERROR_CFLAGS = $(WERROR_CFLAGS)
HDEFINES = @HDEFINES@
TDEFINES =
# Those files are specified in LIB_OBJS below.
SIM_COMMON_HW_OBJS = \
+ hw-alloc.o \
+ hw-base.o \
hw-device.o \
+ hw-events.o \
+ hw-handles.o \
+ hw-instances.o \
hw-ports.o \
hw-properties.o \
- hw-base.o \
hw-tree.o \
sim-hw.o \
SIM_NEW_COMMON_OBJS = \
+ sim-arange.o \
sim-bits.o \
sim-break.o \
sim-config.o \
\
$(SIM_HW_OBJS) \
-
+# Add this to SIM_EXTRA_DEPS.
+CGEN_INCLUDE_DEPS = \
+ $(srccom)/cgen-cpu.h \
+ $(srccom)/cgen-defs.h \
+ $(srccom)/cgen-engine.h \
+ $(srccom)/cgen-scache.h \
+ $(srccom)/cgen-sim.h \
+ $(srccom)/cgen-trace.h \
+ $(srccom)/cgen-types.h \
+ $(srcdir)/../../include/opcode/cgen.h
## End COMMON_PRE_CONFIG_FRAG
$(SIM_SCACHE) \
$(SIM_SMP) \
$(SIM_STDCALL) \
- $(SIM_WARNINGS) \
+ $(SIM_WARN_CFLAGS) \
+ $(SIM_WERROR_CFLAGS) \
$(SIM_XOR_ENDIAN) \
$(SIM_HARDWARE) \
$(SIM_EXTRA_CFLAGS) \
tconfig.h \
$(SIM_EXTRA_DEPS)
+# Exported version of sim_main_headers.
+SIM_MAIN_DEPS = \
+ $(sim_main_headers)
+
sim-assert_h = $(srccom)/sim-assert.h
sim-endian_h = $(srccom)/sim-endian.h
sim-n-endian_h = $(srccom)/sim-n-endian.h
+sim-arange_h = $(srccom)/sim-arange.h
sim-bits_h = $(srccom)/sim-bits.h
sim-config_h = $(srccom)/sim-config.h
sim-n-bits_h = $(srccom)/sim-n-bits.h
sim-break_h = $(srccom)/sim-break.h
sim-signal_h = $(srccom)/sim-signal.h
+hw-alloc_h = $(srccom)/hw-alloc.h
hw-base_h = $(srccom)/hw-base.h
hw-device_h = $(srccom)/hw-device.h
-hw-handles_h = #$(srccom)/hw-handles.h
-hw-instances_h = #$(srccom)/hw-instances.h
+hw-events_h = $(srccom)/hw-events.h
+hw-handles_h = $(srccom)/hw-handles.h
+hw-instances_h = $(srccom)/hw-instances.h
hw-ports_h = $(srccom)/hw-ports.h
hw-properties_h = $(srccom)/hw-properties.h
hw-tree_h = $(srccom)/hw-tree.h
-hw_base_headers = \
+hw_main_headers = \
+ $(srccom)/hw-main.h \
+ $(hw-alloc_h) \
$(hw-base_h) \
$(hw-device_h) \
+ $(hw-events_h) \
$(hw-instances_h) \
$(hw-handles_h) \
$(hw-ports_h) \
$(SIM_EXTRA_DEPS)
$(CC) -c $(srccom)/sim-abort.c $(ALL_CFLAGS)
+sim-arange.o: $(srccom)/sim-arange.c $(sim-arange_h) $(SIM_EXTRA_DEPS)
+ $(CC) -c $(srccom)/sim-arange.c $(ALL_CFLAGS)
+
sim-bits.o: $(srccom)/sim-bits.c $(sim-bits_h) $(sim-n-bits_h) \
$(SIM_EXTRA_DEPS)
$(CC) -c $(srccom)/sim-bits.c $(ALL_CFLAGS)
$(CC) -c $(srccom)/sim-config.c $(ALL_CFLAGS)
sim-core.o: $(srccom)/sim-core.c $(sim_main_headers) \
- $(sim-core_h) $(sim-n-core_h) \
- $(SIM_EXTRA_DEPS)
+ $(sim-core_h) $(sim-n-core_h)
$(CC) -c $(srccom)/sim-core.c $(ALL_CFLAGS)
-sim-cpu.o: $(srccom)/sim-cpu.c $(sim_main_headers) \
- $(SIM_EXTRA_DEPS)
+sim-cpu.o: $(srccom)/sim-cpu.c $(sim_main_headers)
$(CC) -c $(srccom)/sim-cpu.c $(ALL_CFLAGS)
-sim-endian.o: $(srccom)/sim-endian.c $(sim-endian_h) $(sim-n-endian_h) \
- $(SIM_EXTRA_DEPS)
+sim-endian.o: $(srccom)/sim-endian.c $(sim-endian_h) $(sim-n-endian_h)
$(CC) -c $(srccom)/sim-endian.c $(ALL_CFLAGS)
sim-engine.o: $(srccom)/sim-engine.c $(sim_main_headers) $(sim-engine_h)
$(SIM_EXTRA_DEPS)
$(CC) -c $(srccom)/sim-hrw.c $(ALL_CFLAGS)
-sim-hw.o: $(srccom)/sim-hw.c $(sim_main_headers) $(SIM_EXTRA_DEPS)
+sim-hw.o: $(srccom)/sim-hw.c $(sim_main_headers)
$(CC) -c $(srccom)/sim-hw.c $(ALL_CFLAGS)
sim-info.o: $(srccom)/sim-info.c $(sim-assert_h) \
$(srcroot)/include/remote-sim.h
$(CC) -c $(srccom)/sim-reason.c $(ALL_CFLAGS)
+sim-reg.o: $(srccom)/sim-reg.c $(sim_main_headers) \
+ $(srcroot)/include/remote-sim.h
+ $(CC) -c $(srccom)/sim-reg.c $(ALL_CFLAGS)
+
sim-resume.o: $(srccom)/sim-resume.c $(sim_main_headers) \
$(srcroot)/include/remote-sim.h
$(CC) -c $(srccom)/sim-resume.c $(ALL_CFLAGS)
rm -f tmp-hw.h
echo "/* generated by Makefile */" > tmp-hw.h
for hw in $(SIM_HW) ; do \
- echo "extern const struct hw_device_descriptor dv_$${hw}_descriptor[];" ; \
+ echo "extern const struct hw_descriptor dv_$${hw}_descriptor[];" ; \
done >> tmp-hw.h
- echo "const struct hw_device_descriptor *hw_descriptors[] = {" >> tmp-hw.h
+ echo "const struct hw_descriptor *hw_descriptors[] = {" >> tmp-hw.h
for hw in $(SIM_HW) ; do \
echo " dv_$${hw}_descriptor," ; \
done >> tmp-hw.h
echo "};" >> tmp-hw.h
mv tmp-hw.h hw-config.h
-hw-base.o: $(srccom)/hw-base.c $(sim_main_headers) \
- $(hw_base_headers) hw-config.h
+hw-alloc.o: $(srccom)/hw-alloc.c $(hw_main_headers)
+ $(CC) -c $(srccom)/hw-alloc.c $(ALL_CFLAGS)
+
+hw-base.o: $(srccom)/hw-base.c $(hw_main_headers) hw-config.h
$(CC) -c $(srccom)/hw-base.c $(ALL_CFLAGS)
-hw-device.o: $(srccom)/hw-device.c $(sim_main_headers) \
- $(hw-device_h)
+hw-device.o: $(srccom)/hw-device.c $(hw_main_headers)
$(CC) -c $(srccom)/hw-device.c $(ALL_CFLAGS)
-hw-instances.o: $(srccom)/hw-instances.c $(sim_main_headers) \
- $(hw_base_headers)
+hw-events.o: $(srccom)/hw-events.c $(hw_main_headers) $(sim_main_headers)
+ $(CC) -c $(srccom)/hw-events.c $(ALL_CFLAGS)
+
+test-hw-events: $(srccom)/hw-events.c libsim.a
+ $(CC) $(ALL_CFLAGS) -DMAIN -o test-hw-events$(EXEEXT) \
+ $(srccom)/hw-events.c libsim.a $(EXTRA_LIBS)
+
+hw-instances.o: $(srccom)/hw-instances.c $(hw_main_headers)
$(CC) -c $(srccom)/hw-instances.c $(ALL_CFLAGS)
-hw-handles.o: $(srccom)/hw-handles.c $(sim_main_headers) \
- $(hw_base_headers)
+hw-handles.o: $(srccom)/hw-handles.c $(hw_main_headers)
$(CC) -c $(srccom)/hw-handles.c $(ALL_CFLAGS)
-hw-ports.o: $(srccom)/hw-ports.c $(sim_main_headers) \
- $(hw-ports_h)
+hw-ports.o: $(srccom)/hw-ports.c $(hw_main_headers)
$(CC) -c $(srccom)/hw-ports.c $(ALL_CFLAGS)
-hw-properties.o: $(srccom)/hw-properties.c $(sim_main_headers) \
- $(hw-properties_h)
+hw-properties.o: $(srccom)/hw-properties.c $(hw_main_headers)
$(CC) -c $(srccom)/hw-properties.c $(ALL_CFLAGS)
-hw-tree.o: $(srccom)/hw-tree.c $(sim_main_headers) \
- $(hw-tree_h) $(hw_base_headers)
+hw-tree.o: $(srccom)/hw-tree.c $(hw_main_headers) $(hw-tree_h)
$(CC) -c $(srccom)/hw-tree.c $(ALL_CFLAGS)
+# Devices.
-dv-core.o: $(srccom)/dv-core.c $(sim_main_headers) \
- $(sim-main_h) $(hw_base_headers)
+dv-core.o: $(srccom)/dv-core.c $(hw_main_headers) $(sim_main_headers)
$(CC) -c $(srccom)/dv-core.c $(ALL_CFLAGS)
-dv-glue.o: $(srccom)/dv-glue.c $(sim_main_headers) \
- $(sim-main_h) $(hw_base_headers)
+dv-glue.o: $(srccom)/dv-glue.c $(hw_main_headers) $(sim_main_headers)
$(CC) -c $(srccom)/dv-glue.c $(ALL_CFLAGS)
-dv-pal.o: $(srccom)/dv-pal.c $(sim_main_headers) \
- $(sim-main_h) $(hw_base_headers)
+dv-pal.o: $(srccom)/dv-pal.c $(hw_main_headers) $(sim_main_headers)
$(CC) -c $(srccom)/dv-pal.c $(ALL_CFLAGS)
+dv-sockser.o: $(srccom)/dv-sockser.h $(sim_main_headers)
+ $(CC) -c $(srccom)/dv-sockser.c $(ALL_CFLAGS)
+
nrun.o: $(srccom)/nrun.c config.h tconfig.h \
$(srcroot)/include/remote-sim.h $(srcroot)/include/callback.h \
$(sim_main_headers)
$(CC) -c $(srccom)/nrun.c $(ALL_CFLAGS)
-# Devices.
+# CGEN support.
-dv-sockser.o: $(srccom)/dv-sockser.h $(sim_main_headers)
- $(CC) -c $(srccom)/dv-sockser.c $(ALL_CFLAGS)
+# For use in Makefile.in for cpu-specific files.
+CGEN_MAIN_CPU_DEPS = \
+ $(SIM_MAIN_DEPS) \
+ $(CGEN_INCLUDE_DEPS) \
+ $(srccom)/cgen-ops.h \
+ $(srccom)/cgen-mem.h \
+ $(srccom)/cgen-par.h \
+ $(srccom)/cgen-fpu.h
-# CGEN support.
+cgen-run.o: $(srccom)/cgen-run.c $(sim_main_headers)
+ $(CC) -c $(srccom)/cgen-run.c $(ALL_CFLAGS)
-cgen-scache.o: $(srccom)/cgen-scache.c $(sim_main_headers) \
- $(srccom)/cgen-sim.h
+cgen-scache.o: $(srccom)/cgen-scache.c $(sim_main_headers)
$(CC) -c $(srccom)/cgen-scache.c $(ALL_CFLAGS)
-cgen-trace.o: $(srccom)/cgen-trace.c $(sim_main_headers) \
- $(srccom)/cgen-sim.h $(srccom)/cgen-trace.h
+cgen-trace.o: $(srccom)/cgen-trace.c $(sim_main_headers)
$(CC) -c $(srccom)/cgen-trace.c $(ALL_CFLAGS)
+cgen-fpu.o: $(srccom)/cgen-fpu.c $(sim_main_headers) $(sim-fpu_h)
+ $(CC) -c $(srccom)/cgen-fpu.c $(ALL_CFLAGS)
+
+cgen-accfp.o: $(srccom)/cgen-accfp.c $(sim_main_headers) $(sim-fpu_h)
+ $(CC) -c $(srccom)/cgen-accfp.c $(ALL_CFLAGS)
+
cgen-utils.o: $(srccom)/cgen-utils.c $(sim_main_headers) \
- $(srccom)/cgen-sim.h $(srccom)/cgen-mem.h $(srccom)/cgen-ops.h
+ $(srccom)/cgen-mem.h $(srccom)/cgen-ops.h $(srccom)/cgen-engine.h
$(CC) -c $(srccom)/cgen-utils.c $(ALL_CFLAGS)
+cgen-par.o: $(srccom)/cgen-par.c $(sim_main_headers) \
+ $(srccom)/cgen-mem.h $(srccom)/cgen-par.h
+ $(CC) -c $(srccom)/cgen-par.c $(ALL_CFLAGS)
+
# Support targets.
install: install-common $(SIM_EXTRA_INSTALL)
install-common: installdirs
n=`echo run | sed '$(program_transform_name)'`; \
- $(INSTALL_PROGRAM) run$(EXEEXT) $(bindir)/$$n
+ $(INSTALL_PROGRAM) run$(EXEEXT) $(bindir)/$$n$(EXEEXT)
n=`echo libsim.a | sed s/libsim.a/lib$(target_alias)-sim.a/`; \
$(INSTALL_DATA) libsim.a $(libdir)/$$n ; \
( cd $(libdir) ; $(RANLIB) $$n )
if [ ! -f Make-common.in ] ; then \
rm -f $(BUILT_SRC_FROM_COMMON) ; \
fi
+ rm -f tmp-mloop.hin tmp-mloop.h tmp-mloop.cin tmp-mloop.c
distclean mostlyclean maintainer-clean realclean: clean
rm -f TAGS
.gdbinit: # config.status $(srccom)/gdbinit.in
CONFIG_FILES=$@:../common/gdbinit.in CONFIG_HEADERS= $(SHELL) ./config.status
-# start-sanitize-cygnus
-
-# CGEN support
-
-SCHEME = @SCHEME@
-SCHEMEFLAGS = -s
-srccgen = $(srcroot)/cgen
-
-CGEN_VERBOSE = -v
-CGEN_MAIN_SCM = $(srccgen)/object.scm $(srccgen)/utils.scm \
- $(srccgen)/attr.scm $(srccgen)/enum.scm $(srccgen)/types.scm \
- $(srccgen)/utils-cgen.scm $(srccgen)/cpu.scm \
- $(srccgen)/mode.scm $(srccgen)/mach.scm \
- $(srccgen)/model.scm $(srccgen)/hardware.scm \
- $(srccgen)/ifield.scm $(srccgen)/iformat.scm \
- $(srccgen)/operand.scm $(srccgen)/insn.scm \
- $(srccgen)/cdl-c.scm $(srccgen)/sim.scm
-CGEN_CPU_SCM = $(srccgen)/sim-cpu.scm $(srccgen)/sim-model.scm
-CGEN_DECODE_SCM = $(srccgen)/sim-decode.scm
-
-# Various choices for which cpu specific files to generate.
-CGEN_CPU_EXTR = -E tmp-ext.c1
-CGEN_CPU_READ = -R tmp-read.c1
-CGEN_CPU_SEM = -S tmp-sem.c1
-CGEN_CPU_SEMSW = -W tmp-semsw.c1
-
-# We store the generated files in the source directory until we decide to
-# ship a Scheme interpreter with gdb/binutils. Maybe we never will.
-
-cgen-arch: force
- $(SHELL) $(srccom)/cgen.sh arch $(srcdir) \
- $(SCHEME) $(SCHEMEFLAGS) \
- $(srccgen) $(CGEN_VERBOSE) \
- $(arch) "$(FLAGS)" ignored ignored ignored ignored
-
-cgen-cpu: force
- $(SHELL) $(srccom)/cgen.sh cpu $(srcdir) \
- $(SCHEME) $(SCHEMEFLAGS) \
- $(srccgen) $(CGEN_VERBOSE) \
- $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" "$(EXTRAFILES)"
-
-cgen-decode: force
- $(SHELL) $(srccom)/cgen.sh decode $(srcdir) \
- $(SCHEME) $(SCHEMEFLAGS) \
- $(srccgen) $(CGEN_VERBOSE) \
- $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" ignored
-
-# end-sanitize-cygnus
## End COMMON_POST_CONFIG_FRAG
projects / deliverable / binutils-gdb.git / blobdiff