/* Simulation code for the CR16 processor.
- Copyright (C) 2008-2015 Free Software Foundation, Inc.
+ Copyright (C) 2008-2020 Free Software Foundation, Inc.
Contributed by M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com>
This file is part of GDB, the GNU debugger.
#include <sys/wait.h>
#endif
+#define EXCEPTION(sig) sim_engine_halt (sd, cpu, NULL, PC, sim_stopped, sig)
+
enum op_types {
OP_VOID,
OP_CONSTANT3,
#if 0
else
val &= PSR_MASK;
- (*cr16_callback->printf_filtered)
- (cr16_callback,
+ sim_io_printf
+ (sd,
"ERROR at PC 0x%x: ST can only be set when FX is set.\n", PC);
- State.exception = SIGILL;
+ EXCEPTION (SIM_SIGILL);
#endif
/* keep an up-to-date psw around for tracing. */
State.trace.psw = (State.trace.psw & mask) | val;
}
if ((cr16_debug & DEBUG_LINE_NUMBER) == 0)
- (*cr16_callback->printf_filtered) (cr16_callback,
+ sim_io_printf (sd,
"0x%.*x %s: %-*s ",
SIZE_PC, (unsigned)PC,
type,
}
}
- (*cr16_callback->printf_filtered) (cr16_callback,
+ sim_io_printf (sd,
"0x%.*x %s: %-*.*s %-*s ",
SIZE_PC, (unsigned)PC,
type,
{
*p++ = '\n';
*p = '\0';
- (*cr16_callback->printf_filtered) (cr16_callback, "%s", buf);
+ sim_io_printf (sd, "%s", buf);
}
else
{
*p = '\0';
- (*cr16_callback->printf_filtered) (cr16_callback, "%-*s", SIZE_OPERANDS, buf);
+ sim_io_printf (sd, "%-*s", SIZE_OPERANDS, buf);
p = buf;
for (i = 0; i < 3; i++)
switch (in[i])
{
case OP_VOID:
- (*cr16_callback->printf_filtered) (cr16_callback, "%*s", SIZE_VALUES, "");
+ sim_io_printf (sd, "%*s", SIZE_VALUES, "");
break;
case OP_REG:
- (*cr16_callback->printf_filtered) (cr16_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+ sim_io_printf (sd, "%*s0x%.4x", SIZE_VALUES-6, "",
(uint16) GPR (OP[i]));
break;
case OP_REGP:
tmp = (long)((((uint32) GPR (OP[i])) << 16) | ((uint32) GPR (OP[i] + 1)));
- (*cr16_callback->printf_filtered) (cr16_callback, "%*s0x%.8lx", SIZE_VALUES-10, "", tmp);
+ sim_io_printf (sd, "%*s0x%.8lx", SIZE_VALUES-10, "", tmp);
break;
case OP_PROC_REG:
- (*cr16_callback->printf_filtered) (cr16_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+ sim_io_printf (sd, "%*s0x%.4x", SIZE_VALUES-6, "",
(uint16) CREG (OP[i]));
break;
case OP_CONSTANT16:
- (*cr16_callback->printf_filtered) (cr16_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+ sim_io_printf (sd, "%*s0x%.4x", SIZE_VALUES-6, "",
(uint16)OP[i]);
break;
case OP_CONSTANT4:
- (*cr16_callback->printf_filtered) (cr16_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+ sim_io_printf (sd, "%*s0x%.4x", SIZE_VALUES-6, "",
(uint16)SEXT4(OP[i]));
break;
case OP_CONSTANT3:
- (*cr16_callback->printf_filtered) (cr16_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+ sim_io_printf (sd, "%*s0x%.4x", SIZE_VALUES-6, "",
(uint16)SEXT3(OP[i]));
break;
case OP_MEMREF2:
- (*cr16_callback->printf_filtered) (cr16_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+ sim_io_printf (sd, "%*s0x%.4x", SIZE_VALUES-6, "",
(uint16)OP[i]);
- (*cr16_callback->printf_filtered) (cr16_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
+ sim_io_printf (sd, "%*s0x%.4x", SIZE_VALUES-6, "",
(uint16)GPR (OP[i + 1]));
i++;
break;
}
}
- (*cr16_callback->flush_stdout) (cr16_callback);
+ sim_io_flush_stdout (sd);
}
static void
do_trace_output_flush (SIM_DESC sd)
{
- (*cr16_callback->flush_stdout) (cr16_callback);
+ sim_io_flush_stdout (sd);
}
static void
do_trace_output_finish (SIM_DESC sd)
{
- (*cr16_callback->printf_filtered) (cr16_callback,
+ sim_io_printf (sd,
" F0=%d F1=%d C=%d\n",
(State.trace.psw & PSR_F_BIT) != 0,
(State.trace.psw & PSR_F_BIT) != 0,
(State.trace.psw & PSR_C_BIT) != 0);
- (*cr16_callback->flush_stdout) (cr16_callback);
+ sim_io_flush_stdout (sd);
}
#if 0
{
if ((cr16_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
{
- (*cr16_callback->printf_filtered) (cr16_callback,
+ sim_io_printf (sd,
" :: %*s0x%.2x%.8lx",
SIZE_VALUES - 12,
"",
{
if ((cr16_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
{
- (*cr16_callback->printf_filtered) (cr16_callback,
+ sim_io_printf (sd,
" :: %*s0x%.8x",
SIZE_VALUES - 10,
"",
{
if ((cr16_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
{
- (*cr16_callback->printf_filtered) (cr16_callback,
+ sim_io_printf (sd,
" :: %*s0x%.4x",
SIZE_VALUES - 6,
"",
{
if ((cr16_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
{
- (*cr16_callback->printf_filtered) (cr16_callback, "\n");
+ sim_io_printf (sd, "\n");
do_trace_output_flush (sd);
}
}
{
if ((cr16_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
{
- (*cr16_callback->printf_filtered) (cr16_callback,
+ sim_io_printf (sd,
" :: %*s",
SIZE_VALUES,
"");
if ((tmp < 0x000000) || (tmp > 0xFFFFFF))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
else
JMP (tmp);
if ((tmp < 0x000000) || (tmp > 0xFFFFFF))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
else
JMP (tmp);
if ((tmp < 0x000000) || (tmp > 0xFFFFFF))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
else
JMP (tmp);
if ((tmp < 0x000000) || (tmp > 0xFFFFFF))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
else
JMP (tmp);
if ((tmp < 0x000000) || (tmp > 0xFFFFFF))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
else
JMP (tmp);
if ((tmp < 0x0) || (tmp > 0xFFFFFF))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
else
JMP (tmp);
if ((tmp < 0x0) || (tmp > 0xFFFFFF))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
else
JMP (tmp);
trace_input ("loadm", OP_CONSTANT4, OP_VOID, OP_VOID);
if ((addr & 1))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
while (count)
trace_input ("loadm", OP_CONSTANT4, OP_VOID, OP_VOID);
if ((addr & 1))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
while (count)
trace_input ("nop", OP_VOID, OP_VOID, OP_VOID);
#if 0
- State.exception = SIGTRAP;
ins_type_counters[ (int)State.ins_type ]--; /* don't count nops as normal instructions */
switch (State.ins_type)
{
break;
}
-
+ EXCEPTION (SIM_SIGTRAP);
#endif
trace_output_void (sd);
}
trace_input ("storm", OP_CONSTANT4, OP_VOID, OP_VOID);
if ((addr & 1))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
while (count)
trace_input ("stormp", OP_CONSTANT4, OP_VOID, OP_VOID);
if ((addr & 1))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
while (count)
void
OP_C_C (SIM_DESC sd, SIM_CPU *cpu)
{
+ host_callback *cb = STATE_CALLBACK (sd);
uint32 tmp;
uint16 a;
trace_input ("excp", OP_CONSTANT4, OP_VOID, OP_VOID);
if (first_time)
{
first_time = 0;
- (*cr16_callback->printf_filtered) (cr16_callback, "Trap # PC ");
+ sim_io_printf (sd, "Trap # PC ");
for (i = 0; i < 16; i++)
- (*cr16_callback->printf_filtered) (cr16_callback, " %sr%d", (i > 9) ? "" : " ", i);
- (*cr16_callback->printf_filtered) (cr16_callback, " a0 a1 f0 f1 c\n");
+ sim_io_printf (sd, " %sr%d", (i > 9) ? "" : " ", i);
+ sim_io_printf (sd, " a0 a1 f0 f1 c\n");
}
- (*cr16_callback->printf_filtered) (cr16_callback, "Trap %2d 0x%.4x:", (int)OP[0], (int)PC);
+ sim_io_printf (sd, "Trap %2d 0x%.4x:", (int)OP[0], (int)PC);
for (i = 0; i < 16; i++)
- (*cr16_callback->printf_filtered) (cr16_callback, " %.4x", (int) GPR (i));
+ sim_io_printf (sd, " %.4x", (int) GPR (i));
for (i = 0; i < 2; i++)
- (*cr16_callback->printf_filtered) (cr16_callback, " %.2x%.8lx",
+ sim_io_printf (sd, " %.2x%.8lx",
((int)(ACC (i) >> 32) & 0xff),
((unsigned long) ACC (i)) & 0xffffffff);
- (*cr16_callback->printf_filtered) (cr16_callback, " %d %d %d\n",
+ sim_io_printf (sd, " %d %d %d\n",
PSR_F != 0, PSR_F != 0, PSR_C != 0);
- (*cr16_callback->flush_stdout) (cr16_callback);
+ sim_io_flush_stdout (sd);
break;
}
#endif
if (PARM1 == getpid ())
{
trace_output_void (sd);
- State.exception = PARM2;
+ EXCEPTION (PARM2);
}
else
{
if (os_sig == -1)
{
trace_output_void (sd);
- (*cr16_callback->printf_filtered) (cr16_callback, "Unknown signal %d\n", PARM2);
- (*cr16_callback->flush_stdout) (cr16_callback);
- State.exception = SIGILL;
+ sim_io_printf (sd, "Unknown signal %d\n", PARM2);
+ sim_io_flush_stdout (sd);
+ EXCEPTION (SIM_SIGILL);
}
else
{
case TARGET_SYS_kill:
trace_input ("<kill>", OP_REG, OP_REG, OP_VOID);
trace_output_void (sd);
- State.exception = PARM2;
+ EXCEPTION (PARM2);
break;
#endif
case TARGET_SYS_read:
trace_input ("<read>", OP_REG, OP_MEMREF, OP_REG);
- RETVAL (cr16_callback->read (cr16_callback, PARM1,
- MEMPTR (((unsigned long)PARM3 << 16)
- |((unsigned long)PARM2)), PARM4));
+ RETVAL (cb->read (cb, PARM1,
+ MEMPTR (((unsigned long)PARM3 << 16)
+ | ((unsigned long)PARM2)), PARM4));
trace_output_16 (sd, result);
break;
case TARGET_SYS_write:
trace_input ("<write>", OP_REG, OP_MEMREF, OP_REG);
- RETVAL ((int)cr16_callback->write (cr16_callback, PARM1,
- MEMPTR (((unsigned long)PARM3 << 16) | PARM2), PARM4));
+ RETVAL ((int)cb->write (cb, PARM1,
+ MEMPTR (((unsigned long)PARM3 << 16)
+ | PARM2), PARM4));
trace_output_16 (sd, result);
break;
case TARGET_SYS_lseek:
trace_input ("<lseek>", OP_REG, OP_REGP, OP_REG);
- RETVAL32 (cr16_callback->lseek (cr16_callback, PARM1,
- ((((long) PARM3) << 16) | PARM2),
- PARM4));
+ RETVAL32 (cb->lseek (cb, PARM1, ((((long) PARM3) << 16) | PARM2),
+ PARM4));
trace_output_32 (sd, result);
break;
case TARGET_SYS_close:
trace_input ("<close>", OP_REG, OP_VOID, OP_VOID);
- RETVAL (cr16_callback->close (cr16_callback, PARM1));
+ RETVAL (cb->close (cb, PARM1));
trace_output_16 (sd, result);
break;
case TARGET_SYS_open:
trace_input ("<open>", OP_MEMREF, OP_REG, OP_VOID);
- RETVAL32 (cr16_callback->open (cr16_callback,
- MEMPTR ((((unsigned long)PARM2)<<16)|PARM1),
- PARM3));
+ RETVAL32 (cb->open (cb, MEMPTR ((((unsigned long)PARM2) << 16)
+ | PARM1), PARM3));
trace_output_32 (sd, result);
break;
#ifdef TARGET_SYS_rename
case TARGET_SYS_rename:
trace_input ("<rename>", OP_MEMREF, OP_MEMREF, OP_VOID);
- RETVAL (cr16_callback->rename (cr16_callback,
- MEMPTR ((((unsigned long)PARM2)<<16) |PARM1),
- MEMPTR ((((unsigned long)PARM4)<<16) |PARM3)));
+ RETVAL (cb->rename (cb, MEMPTR ((((unsigned long)PARM2) << 16) | PARM1),
+ MEMPTR ((((unsigned long)PARM4) << 16) | PARM3)));
trace_output_16 (sd, result);
break;
#endif
case TARGET_SYS_exit:
trace_input ("<exit>", OP_VOID, OP_VOID, OP_VOID);
- State.exception = SIG_CR16_EXIT;
trace_output_void (sd);
+ sim_engine_halt (sd, cpu, NULL, PC, sim_exited, GPR (2));
break;
case TARGET_SYS_unlink:
trace_input ("<unlink>", OP_MEMREF, OP_VOID, OP_VOID);
- RETVAL (cr16_callback->unlink (cr16_callback,
- MEMPTR (((unsigned long)PARM2<<16)|PARM1)));
+ RETVAL (cb->unlink (cb, MEMPTR (((unsigned long)PARM2 << 16) | PARM1)));
trace_output_16 (sd, result);
break;
switch (a)
{
case TRAP_BREAKPOINT:
- State.exception = SIGTRAP;
tmp = (PC);
JMP(tmp);
trace_output_void (sd);
+ EXCEPTION (SIM_SIGTRAP);
break;
case SIGTRAP: /* supervisor call ? */
- State.exception = SIG_CR16_EXIT;
trace_output_void (sd);
+ sim_engine_halt (sd, cpu, NULL, PC, sim_exited, GPR (2));
break;
default:
- cr16_callback->error (cr16_callback, "Unknown syscall %d", FUNC);
+ cb->error (cb, "Unknown syscall %d", FUNC);
break;
}
}
if ((uint16) result == (uint16) -1)
- RETERR (cr16_callback->get_errno(cr16_callback));
+ RETERR (cb->get_errno (cb));
else
RETERR (0);
break;
if ((tmp < 0x0) || (tmp > 0xFFFFFF))
{
- State.exception = SIG_CR16_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
trace_output_void (sd);
- return;
+ EXCEPTION (SIM_SIGBUS);
}
else
JMP (tmp);
OP_6_10 (SIM_DESC sd, SIM_CPU *cpu)
{
trace_input ("wait", OP_VOID, OP_VOID, OP_VOID);
- State.exception = SIGTRAP;
trace_output_void (sd);
+ EXCEPTION (SIM_SIGTRAP);
}
/* ewait. */
OP_0_20 (SIM_DESC sd, SIM_CPU *cpu)
{
trace_input ("null", OP_VOID, OP_VOID, OP_VOID);
- State.exception = SIG_CR16_STOP;
+ sim_engine_halt (sd, cpu, NULL, PC, sim_exited, 0);
}
projects / deliverable / binutils-gdb.git / blobdiff