daily update

[deliverable/binutils-gdb.git] / sim / frv / pipeline.c

diff --git a/sim/frv/pipeline.c b/sim/frv/pipeline.c
index 90d55c7a54f789e58fd370f3fa9169bed151a92b..780e12745d9e914dfabf67e7d9264b983ce81e41 100644 (file)
--- a/sim/frv/pipeline.c
+++ b/sim/frv/pipeline.c
@@ -1,5 +1,5 @@
 /* frv vliw model.
-   Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
+   Copyright (C) 1999, 2000, 2001, 2003 Free Software Foundation, Inc.
    Contributed by Red Hat.
 
 This file is part of the GNU simulators.
@@ -61,7 +61,7 @@ frv_vliw_setup_insn (SIM_CPU *current_cpu, const CGEN_INSN *insn)
     {
       /* Clear the appropriate MSR fields depending on which slot
         this insn is in.  */
-      CGEN_ATTR_VALUE_TYPE preserve_ovf;
+      CGEN_ATTR_VALUE_ENUM_TYPE preserve_ovf;
       SI msr0 = GET_MSR (0);
 
       preserve_ovf = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_PRESERVE_OVF);