* Contribute CGEN simulator build support code.
[deliverable/binutils-gdb.git] / sim / m32r / Makefile.in
index 71296e52c2034d4b875d87ca2d8880502994e0b8..9d74799f28d22e207be828408e3a8d3b9e98a88a 100644 (file)
@@ -116,5 +116,33 @@ modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
 m32r-clean:
        rm -f mloop.c eng.h stamp-mloop
        rm -f mloopx.c engx.h stamp-xmloop
+       rm -f stamp-arch stamp-cpu stamp-xcpu
        rm -f tmp-*
 
+# cgen support, enable with --enable-cgen-maint
+CGEN_MAINT = ; @true
+# The following line is commented in or out depending upon --enable-cgen-maint.
+@CGEN_MAINT@CGEN_MAINT =
+
+stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srccgen)/m32r.cpu
+       $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
+         FLAGS="with-scache with-profile=fn"
+       touch stamp-arch
+arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
+       @true
+
+stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
+       $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+         cpu=m32rbf mach=m32r SUFFIX= \
+         FLAGS="with-scache with-profile=fn" \
+         EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
+       touch stamp-cpu
+cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
+       @true
+
+stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
+       $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+         cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
+       touch stamp-xcpu
+cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
+       @true
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