Add support for the m32r2 processor

[deliverable/binutils-gdb.git] / sim / m32r / Makefile.in

diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index 3c005b178dbe1237c6dab2429882167cf11e88dc..ee3f7e890cb24ba64ed355956a3573d38859013d 100644 (file)
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -1,5 +1,5 @@
 # Makefile template for Configure for the m32r simulator
-# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2003 Free Software Foundation, Inc.
 # Contributed by Cygnus Support.
 #
 # This file is part of GDB, the GNU debugger.
@@ -21,6 +21,8 @@
 ## COMMON_PRE_CONFIG_FRAG
 
 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
+M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
+M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
 
 CONFIG_DEVICES = dv-sockser.o
 CONFIG_DEVICES =
@@ -36,6 +38,8 @@ SIM_OBJS = \
        cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
        sim-if.o arch.o \
        $(M32R_OBJS) \
+       $(M32RX_OBJS) \
+       $(M32R2_OBJS) \
        traps.o devices.o \
        $(CONFIG_DEVICES)
 
@@ -87,9 +91,96 @@ decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
 model.o: model.c $(M32RBF_INCLUDE_DEPS)
 
+# M32RX objs
+
+M32RXF_INCLUDE_DEPS = \
+       $(CGEN_MAIN_CPU_DEPS) \
+       cpux.h decodex.h engx.h
+
+m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
+
+# FIXME: Use of `mono' is wip.
+mloopx.c engx.h: stamp-xmloop
+stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
+       $(SHELL) $(srccom)/genmloop.sh \
+               -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
+               -cpu m32rxf -infile $(srcdir)/mloopx.in
+       $(SHELL) $(srcroot)/move-if-change eng.hin engx.h
+       $(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c
+       touch stamp-xmloop
+mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
+
+cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
+decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
+semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
+modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
+
+# M32R2 objs
+
+M32R2F_INCLUDE_DEPS = \
+       $(CGEN_MAIN_CPU_DEPS) \
+       cpu2.h decode2.h eng2.h
+
+m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
+
+# FIXME: Use of `mono' is wip.
+mloop2.c eng2.h: stamp-2mloop
+stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
+       $(SHELL) $(srccom)/genmloop.sh \
+               -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
+               -cpu m32r2f -infile $(srcdir)/mloop2.in
+       $(SHELL) $(srcroot)/move-if-change eng.hin eng2.h
+       $(SHELL) $(srcroot)/move-if-change mloop.cin mloop2.c
+       touch stamp-2mloop
+
+mloop2.o:  mloop2.c sem2-switch.c $(M32R2F_INCLUDE_DEPS)
+cpu2.o:    cpu2.c    $(M32R2F_INCLUDE_DEPS)
+decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
+sem2.o:    sem2.c    $(M32R2F_INCLUDE_DEPS)
+model2.o:  model2.c  $(M32R2F_INCLUDE_DEPS)
 
 m32r-clean:
        rm -f mloop.c eng.h stamp-mloop
+       rm -f mloopx.c engx.h stamp-xmloop
+       rm -f mloop2.c eng2.h stamp-2mloop
+       rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
        rm -f tmp-*
 
-
+# cgen support, enable with --enable-cgen-maint
+CGEN_MAINT = ; @true
+# The following line is commented in or out depending upon --enable-cgen-maint.
+@CGEN_MAINT@CGEN_MAINT =
+
+stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+       $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
+         archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+         FLAGS="with-scache with-profile=fn"
+       touch stamp-arch
+arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
+
+stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+       $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+         cpu=m32rbf mach=m32r SUFFIX= \
+         archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+         FLAGS="with-scache with-profile=fn" \
+         EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
+       touch stamp-cpu
+cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
+
+stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+       $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+         cpu=m32rxf mach=m32rx SUFFIX=x \
+         archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+         FLAGS="with-scache with-profile=fn" \
+         EXTRAFILES="$(CGEN_CPU_SEMSW)"
+       touch stamp-xcpu
+cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
+
+stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+       $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+         cpu=m32r2f mach=m32r2 SUFFIX=2 \
+         archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+         FLAGS="with-scache with-profile=fn" \
+         EXTRAFILES="$(CGEN_CPU_SEMSW)"
+       touch stamp-2cpu
+cpu2.h sem2-switch.c model2.c decode2.c decode2.h: $(CGEN_MAINT) stamp-2cpu