AArch64/Arm: Update testcases fixing endiannes and linux targets

[deliverable/binutils-gdb.git] / sim / m32r / decode2.c

diff --git a/sim/m32r/decode2.c b/sim/m32r/decode2.c
index e3f3eafc448f88ae0191debf234ef435a339ff5b..9f52d1345cc3330d1e700f3f726ad746995e33b0 100644 (file)
--- a/sim/m32r/decode2.c
+++ b/sim/m32r/decode2.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2016 Free Software Foundation, Inc.
+Copyright 1996-2019 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -235,7 +235,7 @@ m32r2f_init_idesc_table (SIM_CPU *cpu)
     init_idesc (cpu, id, t);
 
   /* Now fill in the values for the chosen cpu.  */
-  for (t = m32r2f_insn_sem, tend = t + sizeof (m32r2f_insn_sem) / sizeof (*t);
+  for (t = m32r2f_insn_sem, tend = t + ARRAY_SIZE (m32r2f_insn_sem);
        t != tend; ++t)
     {
       init_idesc (cpu, & table[t->index], t);