Configury changes: update src repository (binutils, gdb, and rda) to use

[deliverable/binutils-gdb.git] / sim / m32r / sim-if.c

diff --git a/sim/m32r/sim-if.c b/sim/m32r/sim-if.c
index 3ef5a315b8bee7f76582baf14a739b8f8cedcd52..f8bbece7b8e3e13b5d6d6dd0ea1eeeb175220acf 100644 (file)
--- a/sim/m32r/sim-if.c
+++ b/sim/m32r/sim-if.c
@@ -1,20 +1,22 @@
 /* Main simulator entry points specific to the M32R.
-   Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+   Copyright (C) 1996, 1997, 1998, 1999, 2003 Free Software Foundation, Inc.
    Contributed by Cygnus Support.
 
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+   This file is part of GDB, the GNU debugger.
 
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2, or (at your option)
+   any later version.
 
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License along
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
 #include "sim-main.h"
 #include "sim-options.h"
@@ -56,7 +58,7 @@ SIM_DESC
 sim_open (kind, callback, abfd, argv)
      SIM_OPEN_KIND kind;
      host_callback *callback;
-     struct _bfd *abfd;
+     struct bfd *abfd;
      char **argv;
 {
   SIM_DESC sd = sim_state_alloc (kind, callback);
@@ -199,7 +201,7 @@ sim_close (sd, quitting)
 SIM_RC
 sim_create_inferior (sd, abfd, argv, envp)
      SIM_DESC sd;
-     struct _bfd *abfd;
+     struct bfd *abfd;
      char **argv;
      char **envp;
 {
@@ -212,6 +214,13 @@ sim_create_inferior (sd, abfd, argv, envp)
     addr = 0;
   sim_pc_set (current_cpu, addr);
 
+#ifdef M32R_LINUX
+  m32rbf_h_cr_set (current_cpu,
+                    m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
+  m32rbf_h_cr_set (current_cpu,
+                    m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
+#endif
+
 #if 0
   STATE_ARGV (sd) = sim_copy_argv (argv);
   STATE_ENVP (sd) = sim_copy_argv (envp);
@@ -235,6 +244,16 @@ print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
                     PROFILE_LABEL_WIDTH, "Fill nops:",
                     sim_add_commas (buf, sizeof (buf),
                                     CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
+      if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
+       sim_io_printf (sd, "  %-*s %s\n\n",
+                      PROFILE_LABEL_WIDTH, "Parallel insns:",
+                      sim_add_commas (buf, sizeof (buf),
+                                      CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
+      if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
+       sim_io_printf (sd, "  %-*s %s\n\n",
+                      PROFILE_LABEL_WIDTH, "Parallel insns:",
+                      sim_add_commas (buf, sizeof (buf),
+                                      CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
     }
 }
 
@@ -265,12 +284,12 @@ sim_do_command (sd, cmd)
        sim_io_eprintf (sd, "Too many arguments in `%s'\n", cmd);
       else if (strcasecmp (argv[2], "bbpsw") == 0)
        {
-         val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPSW);
+         val = m32rbf_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPSW);
          sim_io_printf (sd, "bbpsw 0x%x %d\n", val, val);
        }
       else if (strcasecmp (argv[2], "bbpc") == 0)
        {
-         val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPC);
+         val = m32rbf_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPC);
          sim_io_printf (sd, "bbpc 0x%x %d\n", val, val);
        }
       else