/* Simulator for Xilinx MicroBlaze processor
- Copyright 2009-2017 Free Software Foundation, Inc.
+ Copyright 2009-2021 Free Software Foundation, Inc.
This file is part of GDB, the GNU debugger.
You should have received a copy of the GNU General Public License
along with this program; if not, see <http://www.gnu.org/licenses/>. */
-#include "config.h"
+/* This must come before any other includes. */
+#include "defs.h"
+
#include <signal.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include "bfd.h"
-#include "gdb/callback.h"
+#include "sim/callback.h"
#include "libiberty.h"
-#include "gdb/remote-sim.h"
+#include "sim/sim.h"
#include "sim-main.h"
#include "sim-options.h"
+#include "sim-signal.h"
+#include "sim-syscall.h"
#include "microblaze-dis.h"
int cycs;
word WLhash;
ubyte carry;
- int imm_unsigned;
+ bool imm_unsigned;
short ra, rb, rd;
long immword;
uword oldpc, newpc;
{
insts += 1;
bonus_cycles++;
+ TRACE_INSN (cpu, "HALT (%i)", RETREG);
sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_exited, RETREG);
}
else
{
#define INSTRUCTION(NAME, OPCODE, TYPE, ACTION) \
case NAME: \
+ TRACE_INSN (cpu, #NAME); \
ACTION; \
break;
#include "microblaze.isa"
IMM_ENABLE = 0;
}
else
- /* no delay slot: increment cycle count */
- bonus_cycles++;
+ {
+ if (op == brki && IMM == 8)
+ {
+ RETREG = sim_syscall (cpu, CPU.regs[12], CPU.regs[5],
+ CPU.regs[6], CPU.regs[7],
+ CPU.regs[8]);
+ PC = RD + INST_SIZE;
+ }
+
+ /* no delay slot: increment cycle count */
+ bonus_cycles++;
+ }
}
}
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
/* The cpu data is kept in a separately allocated chunk of memory. */
- if (sim_cpu_alloc_all (sd, 1, /*cgen_cpu_max_extra_bytes ()*/0) != SIM_RC_OK)
+ if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
{
free_state (sd);
return 0;