Fix issues with multiple inferiors

[deliverable/binutils-gdb.git] / sim / mips / dv-tx3904tmr.c

diff --git a/sim/mips/dv-tx3904tmr.c b/sim/mips/dv-tx3904tmr.c
index 0d33678dbee662bdd0fcb41b4f3befeb8ee72d3d..d004346dc611867440b1b547ffa6cb3f060b0b66 100644 (file)
--- a/sim/mips/dv-tx3904tmr.c
+++ b/sim/mips/dv-tx3904tmr.c
@@ -1,21 +1,20 @@
 /*  This file is part of the program GDB, the GNU debugger.
     
-    Copyright (C) 1998 Free Software Foundation, Inc.
+    Copyright (C) 1998-2020 Free Software Foundation, Inc.
     Contributed by Cygnus Solutions.
     
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
+    the Free Software Foundation; either version 3 of the License, or
     (at your option) any later version.
-    
+
     This program is distributed in the hope that it will be useful,
     but WITHOUT ANY WARRANTY; without even the implied warranty of
     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     GNU General Public License for more details.
-    
+
     You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
     
     */
 
@@ -372,11 +371,9 @@ tx3904tmr_io_write_buffer (struct hw *me,
   for (byte = 0; byte < nr_bytes; byte++)
     {
       address_word address = base + byte;
-      unsigned_1 write_byte = ((char*) source)[byte];
+      unsigned_1 write_byte = ((const char*) source)[byte];
       int reg_number = (address - controller->base_address) / 4;
       int reg_offset = 3 - (address - controller->base_address) % 4;
-      unsigned_4* register_ptr;
-      unsigned_4 register_value;
 
       /* fill in entire register_value word */
       switch (reg_number)
@@ -518,7 +515,7 @@ deliver_tx3904tmr_tick (struct hw *me,
   /* Check whether the timer ticking is enabled at this moment.  This
      largely a function of the TCE bit, but is also slightly
      mode-dependent. */
-  switch(GET_TCR_TMODE(controller))
+  switch((int) GET_TCR_TMODE(controller))
     {
     case 0: /* interval */
       /* do not advance counter if TCE = 0 or if holding at count = CPRA */
@@ -584,7 +581,7 @@ deliver_tx3904tmr_tick (struct hw *me,
       unsigned_4 next_trr = (controller->trr + 1) % (1 << 24);
       quotient --;
       
-      switch(GET_TCR_TMODE(controller))
+      switch((int) GET_TCR_TMODE(controller))
        {
        case 0: /* interval timer mode */
          {
@@ -677,11 +674,13 @@ deliver_tx3904tmr_tick (struct hw *me,
 
        case 3: /* disabled */
        default:
+         break;
        }
 
       /* update counter and report */
       controller->trr = next_trr;
-      HW_TRACE ((me, "counter trr %d tisr %x", controller->trr, controller->tisr));
+      /* HW_TRACE ((me, "counter trr %ld tisr %lx",
+        (long) controller->trr, (long) controller->tisr)); */
     } /* end quotient loop */
 
   /* Reschedule a timer event in near future, so we can increment the