+2003-02-27 Andrew Cagney <cagney@redhat.com>
+
+ * interp.c (sim_open, sim_create_inferior, sim_open)
+ (sim_create_inferior): Rename _bfd to bfd.
+
+2003-02-26 Andrew Cagney <cagney@redhat.com>
+
+ * am33.igen: Call sim_engine_abort instead of abort.
+
+2003-02-26 David Carlton <carlton@math.stanford.edu>
+
+ * dv-mn103tim.c (read_special_timer6_reg): Add break after
+ empty default: label.
+ (write_special_timer6_reg): Ditto.
+ Update copyright.
+
+2002-11-28 Andrew Cagney <cagney@redhat.com>
+
+ * sim-main.h: Only include "idecode.h" once.
+ * Makefile.in (SIM_EXTRA_DEPS): Define.
+
+2002-06-16 Andrew Cagney <ac131313@redhat.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2002-06-09 Andrew Cagney <cagney@redhat.com>
+
+ * Makefile.in (INCLUDE): Update path to callback.h.
+ * mn10300_sim.h: Include "gdb/callback.h" and "gdb/remote-sim.h".
+ * tconfig.in: Ditto.
+
+2001-05-06 Jim Blandy <jimb@redhat.com>
+
+ * mn10300.igen: Doc fixes.
+
+2001-04-26 Alexandre Oliva <aoliva@redhat.com>
+
+ * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o):
+ Depend on targ-vals.h.
+
+2001-04-15 J.T. Conklin <jtc@redback.com>
+
+ * Makefile.in (simops.o): Add simops.h to dependency list.
+
+Wed Aug 9 02:24:53 2000 Graham Stott <grahams@cygnus.co.uk>
+
+ * am33.igen: Warning clean-up.
+ (movm): Initialize PC and mask.
+ (mov, movbu, movhu): Set srcreg2 from RI0.
+ (bsch): Initialize c.
+ (sat16_cmp): Actually do the comparison.
+ (mov_llt): Do not overwrite dstreg with uninitialized variable.
+
+Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2000-05-22 Alexandre Oliva <aoliva@cygnus.com>
+
+ * am33.igen: Fix leading comments of SP-relative offset insns that
+ referred to other registers. Make their offsets unsigned.
+
+2000-05-18 Alexandre Oliva <aoliva@cygnus.com>
+
+ * mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,
+ genericXor, genericBtst): Use `unsigned32'.
+ * op_utils.c: Likewise.
+ * mn10300.igen, am33.igen: Use `unsigned32', `signed32',
+ `unsigned64' or `signed64' where type width is relevant.
+
+2000-04-25 Alexandre Oliva <aoliva@cygnus.com>
+
+ * am33.igen (inc4 Rn): Use genericAdd so as to modify flags.
+
+2000-04-09 Alexandre Oliva <aoliva@cygnus.com>
+
+ * am33.igen: Make SP-relative offsets unsigned. Add `*am33' for
+ some instructions that were missing it.
+
+2000-03-03 Alexandre Oliva <oliva@lsd.ic.unicamp.br>
+
+ * Makefile.in (IGEN_INSN): Added am33.igen.
+
+Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Tue Jul 13 13:26:20 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c: Clarify error message reporting an unknown board.
+
+1999-05-08 Felix Lee <flee@cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
1999-04-16 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (program_interrupt): Detect undesired recursion using
generation. (mn103int_finish): Install it as ioctl handler.
* dv-mn103tim.c: Support timer 6 specially. Endianness fixes.
+Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Allow autoincrement stores using the same register
+ for source and destination operands.
+
+Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu".
+
Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com>
* interp.c (sim_open): Check for invalid --board option, fix
* sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.
+Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Handle case where first DSP operation modifies a
+ register used in the second DSP operation correctly.
+
+Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Detect cases where two operands must not match for
+ DSP instructions too.
+
+Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Detect cases where two operands must not match in
+ non-DSP instructions.
+
Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>
* op_utils.c (do_syscall): Rewrite to use common/syscall.c.
* mn10300.igen: Change C++ style comments to C style comments.
Check for divide by zero in div and divu ops.
+Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen (translate_xreg): New function. Use it as needed.
+
+Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Add some missing instructions.
+
+ * am33.igen: Autoincrement loads/store fixes.
+
+Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Add mov_lCC DSP instructions.
+
+ * am33.igen: Add most am33 DSP instructions.
+
Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com)
* mn10300.igen: Fix Z bit for addc and subc instructions.
Minor fixes in multiply/divide patterns.
+ * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code
+ handling for many instructions. Fix sign extension for some
+ 24bit immediates.
+
+ * am33.igen: Fix Z bit for remaining addc/subc instructions.
+ Do not sign extend immediate for mov imm,XRn.
+ More random mul, mac & div fixes.
+ Remove some unused variables.
+ Sign extend 24bit displacement in memory addresses.
+
+ * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various
+ fixes to 2 register multiply, divide and mac instructions. Set
+ Z,N correctly for sat16. Sign extend 24 bit immediate for add,
+ and sub instructions.
+
+ * am33.igen: Add remaining non-DSP instructions.
+
+Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen (translate_rreg): New function. Use it as appropriate.
+
+ * am33.igen: More am33 instructions. Fix "div".
+
+Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.igen: Add am33 support.
+
+ * Makefile.in: Use multi-sim to support both a mn10300 and am33
+ simulator.
+
+ * am33.igen: Add many more am33 instructions.
Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com)
* mn10300_sim.h (FETCH24): Define.
+ * mn10300_sim.h: Add defines for some registers found on the AM33.
+ * am33.igen: New file with some am33 support.
Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com)
* mn10300_sim.h: Include bfd.h
(struct state): Add more room for processor specific registers.
+ (REG_E0): Define.
Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>
projects / deliverable / binutils-gdb.git / blobdiff