Fix build failure on macOS

[deliverable/binutils-gdb.git] / sim / mn10300 / sim-main.h

diff --git a/sim/mn10300/sim-main.h b/sim/mn10300/sim-main.h
index 6fd38a896c0b7924ca271451a97dbdaa452109af..ec745b9749bbc8833cc259d00692a8c6f71c3113 100644 (file)
--- a/sim/mn10300/sim-main.h
+++ b/sim/mn10300/sim-main.h
@@ -1,7 +1,7 @@
 /*  This file is part of the program psim.
 
     Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-    Copyright (C) 1997 Free Software Foundation, Inc.
+    Copyright (C) 1997-2019 Free Software Foundation, Inc.
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
@@ -22,10 +22,6 @@
 #ifndef SIM_MAIN_H
 #define SIM_MAIN_H
 
-#define WITH_CORE
-#define WITH_WATCHPOINTS 1
-#define SIM_HANDLES_LMA 1
-
 #define SIM_ENGINE_HALT_HOOK(SD,LAST_CPU,CIA) 0 /* disable this hook */
 
 #include "sim-basics.h"
@@ -42,15 +38,6 @@
 #include "itable.h"
 #include "idecode.h"
 
-typedef instruction_address sim_cia;
-static const sim_cia null_cia = {0}; /* Dummy */
-#define NULL_CIA null_cia
-/* FIXME: Perhaps igen should generate access macros for
-   `instruction_address' that we could use.  */
-/*#define CIA_ADDR(cia) ((cia).ip) doesn't work for mn10300*/
-
-#define WITH_WATCHPOINTS 1
-
 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR)  \
 mn10300_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
 
@@ -71,9 +58,6 @@ mn10300_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER),
 /* FIXME: For moment, save/restore PC value found in struct State.
    Struct State will one day go away, being placed in the sim_cpu
    state. */
-#define CIA_GET(CPU) ((PC) + 0)
-#define CIA_SET(CPU,VAL) ((CPU)->cia = (VAL), PC = (VAL))
-
 
 struct _sim_cpu {
   sim_event *pending_nmi;
@@ -85,8 +69,7 @@ struct _sim_cpu {
 struct sim_state {
 
   /* the processors proper */
-  sim_cpu cpu;
-#define STATE_CPU(sd, n) (&(sd)->cpu)
+  sim_cpu *cpu[MAX_NR_PROCESSORS];
 
   /* The base class.  */
   sim_state_base base;