/* Simulator for TI MSP430 and MSP430X
- Copyright (C) 2013 Free Software Foundation, Inc.
+ Copyright (C) 2013-2019 Free Software Foundation, Inc.
Contributed by Red Hat.
Based on sim/bfin/bfin-sim.c which was contributed by Analog Devices, Inc.
#include <stdlib.h>
#include <string.h>
#include <inttypes.h>
+#include <unistd.h>
#include <assert.h>
-#include "bfd.h"
#include "opcode/msp430-decode.h"
#include "sim-main.h"
-#include "dis-asm.h"
+#include "sim-syscall.h"
#include "targ-vals.h"
-static int
-loader_write_mem (SIM_DESC sd,
- SIM_ADDR taddr,
- const unsigned char *buf,
- int bytes)
-{
- SIM_CPU *cpu = MSP430_CPU (sd);
- return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
-}
-
static sim_cia
msp430_pc_fetch (SIM_CPU *cpu)
{
cpu->state.regs[0] = newpc;
}
-static long
-lookup_symbol (SIM_DESC sd, const char *name)
-{
- struct bfd *abfd = STATE_PROG_BFD (sd);
- asymbol **symbol_table = STATE_SYMBOL_TABLE (sd);
- long number_of_symbols = STATE_NUM_SYMBOLS (sd);
- long i;
-
- if (symbol_table == NULL)
- {
- long storage_needed;
-
- storage_needed = bfd_get_symtab_upper_bound (abfd);
- if (storage_needed <= 0)
- return -1;
-
- STATE_SYMBOL_TABLE (sd) = symbol_table = xmalloc (storage_needed);
- STATE_NUM_SYMBOLS (sd) = number_of_symbols =
- bfd_canonicalize_symtab (abfd, symbol_table);
- }
-
- for (i = 0; i < number_of_symbols; i++)
- if (strcmp (symbol_table[i]->name, name) == 0)
- {
- long val = symbol_table[i]->section->vma + symbol_table[i]->value;
- return val;
- }
- return -1;
-}
-
static int
msp430_reg_fetch (SIM_CPU *cpu, int regno, unsigned char *buf, int len)
{
sim_open (SIM_OPEN_KIND kind,
struct host_callback_struct *callback,
struct bfd *abfd,
- char **argv)
+ char * const *argv)
{
SIM_DESC sd = sim_state_alloc (kind, callback);
char c;
- struct bfd *prog_bfd;
/* Initialise the simulator. */
CPU_REG_FETCH (MSP430_CPU (sd)) = msp430_reg_fetch;
CPU_REG_STORE (MSP430_CPU (sd)) = msp430_reg_store;
- /* Allocate memory if none specified by user. */
- if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0x200, 1) == 0)
- sim_do_commandf (sd, "memory-region 0,0x10000");
+ /* Allocate memory if none specified by user.
+ Note - these values match the memory regions in the libgloss/msp430/msp430[xl]-sim.ld scripts. */
+ if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0x2, 1) == 0)
+ sim_do_commandf (sd, "memory-region 0,0x20"); /* Needed by the GDB testsuite. */
+ if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0x500, 1) == 0)
+ sim_do_commandf (sd, "memory-region 0x500,0xfa00"); /* RAM and/or ROM */
if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0xfffe, 1) == 0)
- sim_do_commandf (sd, "memory-region 0xfffe,2");
+ sim_do_commandf (sd, "memory-region 0xffc0,0x40"); /* VECTORS. */
if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0x10000, 1) == 0)
- sim_do_commandf (sd, "memory-region 0x10000,0x100000");
+ sim_do_commandf (sd, "memory-region 0x10000,0x80000"); /* HIGH FLASH RAM. */
+ if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0x90000, 1) == 0)
+ sim_do_commandf (sd, "memory-region 0x90000,0x70000"); /* HIGH ROM. */
/* Check for/establish the a reference program image. */
if (sim_analyze_program (sd,
return 0;
}
- prog_bfd = sim_load_file (sd, argv[0], callback,
- "the program",
- STATE_PROG_BFD (sd),
- 0 /* verbose */,
- 1 /* use LMA instead of VMA */,
- loader_write_mem);
- if (prog_bfd == NULL)
- {
- sim_state_free (sd);
- return 0;
- }
-
/* Establish any remaining configuration options. */
if (sim_config (sd) != SIM_RC_OK)
{
assert (MAX_NR_PROCESSORS == 1);
msp430_initialize_cpu (sd, MSP430_CPU (sd));
- msp430_trace_init (STATE_PROG_BFD (sd));
-
- MSP430_CPU (sd)->state.cio_breakpoint = lookup_symbol (sd, "C$$IO$$");
- MSP430_CPU (sd)->state.cio_buffer = lookup_symbol (sd, "__CIOBUF__");
+ MSP430_CPU (sd)->state.cio_breakpoint = trace_sym_value (sd, "C$$IO$$");
+ MSP430_CPU (sd)->state.cio_buffer = trace_sym_value (sd, "__CIOBUF__");
if (MSP430_CPU (sd)->state.cio_buffer == -1)
- MSP430_CPU (sd)->state.cio_buffer = lookup_symbol (sd, "_CIOBUF_");
+ MSP430_CPU (sd)->state.cio_buffer = trace_sym_value (sd, "_CIOBUF_");
return sd;
}
-void
-sim_close (SIM_DESC sd,
- int quitting)
-{
- free (STATE_SYMBOL_TABLE (sd));
- sim_state_free (sd);
-}
-
SIM_RC
sim_create_inferior (SIM_DESC sd,
struct bfd *abfd,
- char **argv,
- char **env)
+ char * const *argv,
+ char * const *env)
{
unsigned char resetv[2];
int c;
int new_pc;
+ /* Set the PC to the default reset vector if available. */
c = sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, resetv, 0xfffe, 2);
-
new_pc = resetv[0] + 256 * resetv[1];
+
+ /* If the reset vector isn't initialized, then use the ELF entry. */
+ if (abfd != NULL && !new_pc)
+ new_pc = bfd_get_start_address (abfd);
+
sim_pc_set (MSP430_CPU (sd), new_pc);
msp430_pc_store (MSP430_CPU (sd), new_pc);
static void
trace_reg_put (SIM_DESC sd, int n, unsigned int v)
{
- if (TRACE_VPU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_VPU_IDX,
- "PUT: %#x -> %s", v, register_names [n]);
+ TRACE_REGISTER (MSP430_CPU (sd), "PUT: %#x -> %s", v, register_names[n]);
REG (n) = v;
}
static unsigned int
trace_reg_get (SIM_DESC sd, int n)
{
- if (TRACE_VPU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_VPU_IDX,
- "GET: %s -> %#x", register_names [n], REG (n));
+ TRACE_REGISTER (MSP430_CPU (sd), "GET: %s -> %#x", register_names[n], REG (n));
return REG (n);
}
#define REG_PUT(N,V) trace_reg_put (sd, N, V)
#define REG_GET(N) trace_reg_get (sd, N)
+/* Hardware multiply (and accumulate) support. */
+
+static unsigned int
+zero_ext (unsigned int v, unsigned int bits)
+{
+ v &= ((1 << bits) - 1);
+ return v;
+}
+
+static signed long long
+sign_ext (signed long long v, unsigned int bits)
+{
+ signed long long sb = 1LL << (bits-1); /* Sign bit. */
+ signed long long mb = (1LL << (bits-1)) - 1LL; /* Mantissa bits. */
+
+ if (v & sb)
+ v = v | ~mb;
+ else
+ v = v & mb;
+ return v;
+}
+
static int
get_op (SIM_DESC sd, MSP430_Opcode_Decoded *opc, int n)
{
MSP430_Opcode_Operand *op = opc->op + n;
- int rv;
+ int rv = 0;
int addr;
unsigned char buf[4];
int incval = 0;
addr = op->addend;
if (op->reg != MSR_None)
{
- int reg;
- /* Index values are signed, but the sum is limited to 16
- bits if the register < 64k, for MSP430 compatibility in
- MSP430X chips. */
- if (addr & 0x8000)
- addr |= -1 << 16;
- reg = REG_GET (op->reg);
+ int reg = REG_GET (op->reg);
+ int sign = opc->ofs_430x ? 20 : 16;
+
+ /* Index values are signed. */
+ if (addr & (1 << (sign - 1)))
+ addr |= -(1 << sign);
+
addr += reg;
+
+ /* For MSP430 instructions the sum is limited to 16 bits if the
+ address in the index register is less than 64k even if we are
+ running on an MSP430X CPU. This is for MSP430 compatibility. */
if (reg < 0x10000 && ! opc->ofs_430x)
- addr &= 0xffff;
+ {
+ if (addr >= 0x10000)
+ fprintf (stderr, " XXX WRAPPING ADDRESS %x on read\n", addr);
+
+ addr &= 0xffff;
+ }
}
addr &= 0xfffff;
switch (opc->size)
if (addr == 0x5dd)
rv = 2;
#endif
- if (TRACE_MEMORY_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_MEMORY_IDX,
- "GET: [%#x].%d -> %#x", addr, opc->size, rv);
+ if ((addr >= 0x130 && addr <= 0x15B)
+ || (addr >= 0x4C0 && addr <= 0x4EB))
+ {
+ switch (addr)
+ {
+ case 0x4CA:
+ case 0x13A:
+ switch (HWMULT (sd, hwmult_type))
+ {
+ case UNSIGN_MAC_32:
+ case UNSIGN_32:
+ rv = zero_ext (HWMULT (sd, hwmult_result), 16);
+ break;
+ case SIGN_MAC_32:
+ case SIGN_32:
+ rv = sign_ext (HWMULT (sd, hwmult_signed_result), 16);
+ break;
+ }
+ break;
+
+ case 0x4CC:
+ case 0x13C:
+ switch (HWMULT (sd, hwmult_type))
+ {
+ case UNSIGN_MAC_32:
+ case UNSIGN_32:
+ rv = zero_ext (HWMULT (sd, hwmult_result) >> 16, 16);
+ break;
+
+ case SIGN_MAC_32:
+ case SIGN_32:
+ rv = sign_ext (HWMULT (sd, hwmult_signed_result) >> 16, 16);
+ break;
+ }
+ break;
+
+ case 0x4CE:
+ case 0x13E:
+ switch (HWMULT (sd, hwmult_type))
+ {
+ case UNSIGN_32:
+ rv = 0;
+ break;
+ case SIGN_32:
+ rv = HWMULT (sd, hwmult_signed_result) < 0 ? -1 : 0;
+ break;
+ case UNSIGN_MAC_32:
+ rv = 0; /* FIXME: Should be carry of last accumulate. */
+ break;
+ case SIGN_MAC_32:
+ rv = HWMULT (sd, hwmult_signed_accumulator) < 0 ? -1 : 0;
+ break;
+ }
+ break;
+
+ case 0x4E4:
+ case 0x154:
+ rv = zero_ext (HWMULT (sd, hw32mult_result), 16);
+ break;
+
+ case 0x4E6:
+ case 0x156:
+ rv = zero_ext (HWMULT (sd, hw32mult_result) >> 16, 16);
+ break;
+
+ case 0x4E8:
+ case 0x158:
+ rv = zero_ext (HWMULT (sd, hw32mult_result) >> 32, 16);
+ break;
+
+ case 0x4EA:
+ case 0x15A:
+ switch (HWMULT (sd, hw32mult_type))
+ {
+ case UNSIGN_64: rv = zero_ext (HWMULT (sd, hw32mult_result) >> 48, 16); break;
+ case SIGN_64: rv = sign_ext (HWMULT (sd, hw32mult_result) >> 48, 16); break;
+ }
+ break;
+
+ default:
+ fprintf (stderr, "unimplemented HW MULT read from %x!\n", addr);
+ break;
+ }
+ }
+
+ TRACE_MEMORY (MSP430_CPU (sd), "GET: [%#x].%d -> %#x", addr, opc->size,
+ rv);
break;
+
default:
fprintf (stderr, "invalid operand %d type %d\n", n, op->type);
abort ();
put_op (SIM_DESC sd, MSP430_Opcode_Decoded *opc, int n, int val)
{
MSP430_Opcode_Operand *op = opc->op + n;
- int rv;
+ int rv = 0;
int addr;
unsigned char buf[4];
int incval = 0;
addr = op->addend;
if (op->reg != MSR_None)
{
- int reg;
- /* Index values are signed, but the sum is limited to 16
- bits if the register < 64k, for MSP430 compatibility in
- MSP430X chips. */
- if (addr & 0x8000)
- addr |= -1 << 16;
- reg = REG_GET (op->reg);
+ int reg = REG_GET (op->reg);
+ int sign = opc->ofs_430x ? 20 : 16;
+
+ /* Index values are signed. */
+ if (addr & (1 << (sign - 1)))
+ addr |= -(1 << sign);
+
addr += reg;
- if (reg < 0x10000)
- addr &= 0xffff;
+
+ /* For MSP430 instructions the sum is limited to 16 bits if the
+ address in the index register is less than 64k even if we are
+ running on an MSP430X CPU. This is for MSP430 compatibility. */
+ if (reg < 0x10000 && ! opc->ofs_430x)
+ {
+ if (addr >= 0x10000)
+ fprintf (stderr, " XXX WRAPPING ADDRESS %x on write\n", addr);
+
+ addr &= 0xffff;
+ }
}
addr &= 0xfffff;
- if (TRACE_MEMORY_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_MEMORY_IDX,
- "PUT: [%#x].%d <- %#x", addr, opc->size, val);
+ TRACE_MEMORY (MSP430_CPU (sd), "PUT: [%#x].%d <- %#x", addr, opc->size,
+ val);
#if 0
/* Hack - MSP430X5438 serial port transmit register. */
if (addr == 0x5ce)
putchar (val);
#endif
+ if ((addr >= 0x130 && addr <= 0x15B)
+ || (addr >= 0x4C0 && addr <= 0x4EB))
+ {
+ signed int a,b;
+
+ /* Hardware Multiply emulation. */
+ assert (opc->size == 16);
+
+ switch (addr)
+ {
+ case 0x4C0:
+ case 0x130:
+ HWMULT (sd, hwmult_op1) = val;
+ HWMULT (sd, hwmult_type) = UNSIGN_32;
+ break;
+
+ case 0x4C2:
+ case 0x132:
+ HWMULT (sd, hwmult_op1) = val;
+ HWMULT (sd, hwmult_type) = SIGN_32;
+ break;
+
+ case 0x4C4:
+ case 0x134:
+ HWMULT (sd, hwmult_op1) = val;
+ HWMULT (sd, hwmult_type) = UNSIGN_MAC_32;
+ break;
+
+ case 0x4C6:
+ case 0x136:
+ HWMULT (sd, hwmult_op1) = val;
+ HWMULT (sd, hwmult_type) = SIGN_MAC_32;
+ break;
+
+ case 0x4C8:
+ case 0x138:
+ HWMULT (sd, hwmult_op2) = val;
+ switch (HWMULT (sd, hwmult_type))
+ {
+ case UNSIGN_32:
+ HWMULT (sd, hwmult_result) = HWMULT (sd, hwmult_op1) * HWMULT (sd, hwmult_op2);
+ HWMULT (sd, hwmult_signed_result) = (signed) HWMULT (sd, hwmult_result);
+ HWMULT (sd, hwmult_accumulator) = HWMULT (sd, hwmult_signed_accumulator) = 0;
+ break;
+
+ case SIGN_32:
+ a = sign_ext (HWMULT (sd, hwmult_op1), 16);
+ b = sign_ext (HWMULT (sd, hwmult_op2), 16);
+ HWMULT (sd, hwmult_signed_result) = a * b;
+ HWMULT (sd, hwmult_result) = (unsigned) HWMULT (sd, hwmult_signed_result);
+ HWMULT (sd, hwmult_accumulator) = HWMULT (sd, hwmult_signed_accumulator) = 0;
+ break;
+
+ case UNSIGN_MAC_32:
+ HWMULT (sd, hwmult_accumulator) += HWMULT (sd, hwmult_op1) * HWMULT (sd, hwmult_op2);
+ HWMULT (sd, hwmult_signed_accumulator) += HWMULT (sd, hwmult_op1) * HWMULT (sd, hwmult_op2);
+ HWMULT (sd, hwmult_result) = HWMULT (sd, hwmult_accumulator);
+ HWMULT (sd, hwmult_signed_result) = HWMULT (sd, hwmult_signed_accumulator);
+ break;
+
+ case SIGN_MAC_32:
+ a = sign_ext (HWMULT (sd, hwmult_op1), 16);
+ b = sign_ext (HWMULT (sd, hwmult_op2), 16);
+ HWMULT (sd, hwmult_accumulator) += a * b;
+ HWMULT (sd, hwmult_signed_accumulator) += a * b;
+ HWMULT (sd, hwmult_result) = HWMULT (sd, hwmult_accumulator);
+ HWMULT (sd, hwmult_signed_result) = HWMULT (sd, hwmult_signed_accumulator);
+ break;
+ }
+ break;
+
+ case 0x4CA:
+ case 0x13A:
+ /* Copy into LOW result... */
+ switch (HWMULT (sd, hwmult_type))
+ {
+ case UNSIGN_MAC_32:
+ case UNSIGN_32:
+ HWMULT (sd, hwmult_accumulator) = HWMULT (sd, hwmult_result) = zero_ext (val, 16);
+ HWMULT (sd, hwmult_signed_accumulator) = sign_ext (val, 16);
+ break;
+ case SIGN_MAC_32:
+ case SIGN_32:
+ HWMULT (sd, hwmult_signed_accumulator) = HWMULT (sd, hwmult_result) = sign_ext (val, 16);
+ HWMULT (sd, hwmult_accumulator) = zero_ext (val, 16);
+ break;
+ }
+ break;
+
+ case 0x4D0:
+ case 0x140:
+ HWMULT (sd, hw32mult_op1) = val;
+ HWMULT (sd, hw32mult_type) = UNSIGN_64;
+ break;
+
+ case 0x4D2:
+ case 0x142:
+ HWMULT (sd, hw32mult_op1) = (HWMULT (sd, hw32mult_op1) & 0xFFFF) | (val << 16);
+ break;
+
+ case 0x4D4:
+ case 0x144:
+ HWMULT (sd, hw32mult_op1) = val;
+ HWMULT (sd, hw32mult_type) = SIGN_64;
+ break;
+
+ case 0x4D6:
+ case 0x146:
+ HWMULT (sd, hw32mult_op1) = (HWMULT (sd, hw32mult_op1) & 0xFFFF) | (val << 16);
+ break;
+
+ case 0x4E0:
+ case 0x150:
+ HWMULT (sd, hw32mult_op2) = val;
+ break;
+
+ case 0x4E2:
+ case 0x152:
+ HWMULT (sd, hw32mult_op2) = (HWMULT (sd, hw32mult_op2) & 0xFFFF) | (val << 16);
+ switch (HWMULT (sd, hw32mult_type))
+ {
+ case UNSIGN_64:
+ HWMULT (sd, hw32mult_result) = HWMULT (sd, hw32mult_op1) * HWMULT (sd, hw32mult_op2);
+ break;
+ case SIGN_64:
+ HWMULT (sd, hw32mult_result) = sign_ext (HWMULT (sd, hw32mult_op1), 32)
+ * sign_ext (HWMULT (sd, hw32mult_op2), 32);
+ break;
+ }
+ break;
+
+ default:
+ fprintf (stderr, "unimplemented HW MULT write to %x!\n", addr);
+ break;
+ }
+ }
+
switch (opc->size)
{
case 8:
#define DSRC get_op (sd, opcode, 0)
#define DEST(V) put_op (sd, opcode, 0, (V))
-static int
-msp430_dis_read (bfd_vma memaddr,
- bfd_byte *myaddr,
- unsigned int length,
- struct disassemble_info *dinfo)
-{
- SIM_DESC sd = dinfo->private_data;
- sim_core_read_buffer (sd, MSP430_CPU (sd), 0, myaddr, memaddr, length);
- return 0;
-}
-
#define DO_ALU(OP,SOP,MORE) \
{ \
int s1 = DSRC; \
int s2 = SRC; \
int result = s1 OP s2 MORE; \
- if (TRACE_ALU_P (MSP430_CPU (sd))) \
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX, \
- "ALU: %#x %s %#x %s = %#x", s1, SOP, s2, #MORE, result); \
+ TRACE_ALU (MSP430_CPU (sd), "ALU: %#x %s %#x %s = %#x", s1, SOP, \
+ s2, #MORE, result); \
DEST (result); \
}
#define POS(x) (((x) & SIGN) ? 0 : 1)
#define NEG(x) (((x) & SIGN) ? 1 : 0)
-static int
-zero_ext (int v, int bits)
-{
- v &= ((1 << bits) - 1);
- return v;
-}
-
-static int
-sign_ext (int v, int bits)
-{
- int sb = 1 << (bits-1); /* Sign bit. */
- int mb = (1 << (bits-1)) - 1; /* Mantissa bits. */
-
- if (v & sb)
- v = v | ~mb;
- else
- v = v & mb;
- return v;
-}
-
#define SX(v) sign_ext (v, opcode->size)
#define ZX(v) zero_ext (v, opcode->size)
new_f |= MSP430_FLAG_C;
new_f = f | (new_f & opcode->flags_set);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- {
- if (SR != new_f)
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "FLAGS: %s -> %s", flags2string (SR),
- flags2string (new_f));
- else
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "FLAGS: %s", flags2string (new_f));
- }
+ if (SR != new_f)
+ TRACE_ALU (MSP430_CPU (sd), "FLAGS: %s -> %s", flags2string (SR),
+ flags2string (new_f));
+ else
+ TRACE_ALU (MSP430_CPU (sd), "FLAGS: %s", flags2string (new_f));
SR = new_f;
}
return r;
}
-static int
-syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- SIM_CPU *cpu = (SIM_CPU *) sc->p2;
-
- return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
-}
-
-static int
-syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, const char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- SIM_CPU *cpu = (SIM_CPU *) sc->p2;
-
- return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
-}
-
static const char *
cond_string (int cond)
{
if ((call_addr & ~0x3f) == 0x00180)
{
/* Syscall! */
+ int arg1, arg2, arg3, arg4;
int syscall_num = call_addr & 0x3f;
- host_callback *cb = STATE_CALLBACK (sd);
- CB_SYSCALL sc;
-
- CB_SYSCALL_INIT (&sc);
-
- sc.func = syscall_num;
- sc.arg1 = MSP430_CPU (sd)->state.regs[12];
- sc.arg2 = MSP430_CPU (sd)->state.regs[13];
- sc.arg3 = MSP430_CPU (sd)->state.regs[14];
- sc.arg4 = MSP430_CPU (sd)->state.regs[15];
- if (TRACE_SYSCALL_P (MSP430_CPU (sd)))
+ /* syscall_num == 2 is used for the variadic function "open".
+ The arguments are set up differently for variadic functions.
+ See slaa534.pdf distributed by TI. */
+ if (syscall_num == 2)
{
- const char *syscall_name = "*unknown*";
-
- switch (syscall_num)
- {
- case TARGET_SYS_exit:
- syscall_name = "exit(%d)";
- break;
- case TARGET_SYS_open:
- syscall_name = "open(%#x,%#x)";
- break;
- case TARGET_SYS_close:
- syscall_name = "close(%d)";
- break;
- case TARGET_SYS_read:
- syscall_name = "read(%d,%#x,%d)";
- break;
- case TARGET_SYS_write:
- syscall_name = "write(%d,%#x,%d)";
- break;
- }
- trace_generic (sd, MSP430_CPU (sd), TRACE_SYSCALL_IDX,
- syscall_name, sc.arg1, sc.arg2, sc.arg3, sc.arg4);
+ arg1 = MSP430_CPU (sd)->state.regs[12];
+ arg2 = mem_get_val (sd, SP, 16);
+ arg3 = mem_get_val (sd, SP + 2, 16);
+ arg4 = mem_get_val (sd, SP + 4, 16);
}
-
- /* Handle SYS_exit here. */
- if (syscall_num == 1)
+ else
{
- sim_engine_halt (sd, MSP430_CPU (sd), NULL,
- MSP430_CPU (sd)->state.regs[0],
- sim_exited, sc.arg1);
- return 1;
+ arg1 = MSP430_CPU (sd)->state.regs[12];
+ arg2 = MSP430_CPU (sd)->state.regs[13];
+ arg3 = MSP430_CPU (sd)->state.regs[14];
+ arg4 = MSP430_CPU (sd)->state.regs[15];
}
- sc.p1 = sd;
- sc.p2 = MSP430_CPU (sd);
- sc.read_mem = syscall_read_mem;
- sc.write_mem = syscall_write_mem;
-
- cb_syscall (cb, &sc);
-
- if (TRACE_SYSCALL_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_SYSCALL_IDX,
- "returns %d", sc.result);
-
- MSP430_CPU (sd)->state.regs[12] = sc.result;
+ MSP430_CPU (sd)->state.regs[12] = sim_syscall (MSP430_CPU (sd),
+ syscall_num, arg1, arg2,
+ arg3, arg4);
return 1;
}
MSP430_Opcode_Decoded opcode_buf;
MSP430_Opcode_Decoded *opcode = &opcode_buf;
int s1, s2, result;
- int u1, u2, uresult;
- int c, reg;
+ int u1 = 0, u2, uresult;
+ int c = 0, reg;
int sp;
int carry_to_use;
int n_repeats;
int rept;
- int op_bytes, op_bits;
+ int op_bytes = 0, op_bits;
PC &= 0xfffff;
opcode_pc = PC;
break;
}
- if (TRACE_INSN_P (MSP430_CPU (sd)))
- {
- disassemble_info info;
- unsigned char b[10];
-
- msp430_trace_one (opcode_pc);
-
- sim_core_read_buffer (sd, MSP430_CPU (sd), 0, b, opcode_pc, opsize);
-
- init_disassemble_info (&info, stderr, fprintf);
- info.private_data = sd;
- info.read_memory_func = msp430_dis_read;
- fprintf (stderr, "%#8x ", opcode_pc);
- for (i = 0; i < opsize; i += 2)
- fprintf (stderr, " %02x%02x", b[i+1], b[i]);
- for (; i < 6; i += 2)
- fprintf (stderr, " ");
- fprintf (stderr, " ");
- print_insn_msp430 (opcode_pc, &info);
- fprintf (stderr, "\n");
- fflush (stdout);
- }
-
if (TRACE_ANY_P (MSP430_CPU (sd)))
trace_prefix (sd, MSP430_CPU (sd), NULL_CIA, opcode_pc,
- TRACE_LINENUM_P (MSP430_CPU (sd)), NULL, 0, "");
+ TRACE_LINENUM_P (MSP430_CPU (sd)), NULL, 0, " ");
+
+ TRACE_DISASM (MSP430_CPU (sd), opcode_pc);
carry_to_use = 0;
switch (opcode->id)
s2 = SX (u2);
uresult = u1 + u2 + carry_to_use;
result = s1 + s2 + carry_to_use;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "ADDC: %#x + %#x + %d = %#x",
- u1, u2, carry_to_use, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "ADDC: %#x + %#x + %d = %#x",
+ u1, u2, carry_to_use, uresult);
DEST (result);
FLAGS (result, uresult != ZX (uresult));
}
s2 = SX (u2);
uresult = u1 + u2;
result = s1 + s2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "ADD: %#x + %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "ADD: %#x + %#x = %#x",
+ u1, u2, uresult);
DEST (result);
FLAGS (result, uresult != ZX (uresult));
}
s2 = SX (u2);
uresult = ZX (~u2) + u1 + carry_to_use;
result = s1 - s2 + (carry_to_use - 1);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "SUBC: %#x - %#x + %d = %#x",
- u1, u2, carry_to_use, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "SUBC: %#x - %#x + %d = %#x",
+ u1, u2, carry_to_use, uresult);
DEST (result);
FLAGS (result, uresult != ZX (uresult));
}
s2 = SX (u2);
uresult = ZX (~u2) + u1 + 1;
result = SX (uresult);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "SUB: %#x - %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "SUB: %#x - %#x = %#x",
+ u1, u2, uresult);
DEST (result);
FLAGS (result, uresult != ZX (uresult));
}
s2 = SX (u2);
uresult = ZX (~u2) + u1 + 1;
result = s1 - s2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "CMP: %#x - %#x = %x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "CMP: %#x - %#x = %x",
+ u1, u2, uresult);
FLAGS (result, uresult != ZX (uresult));
}
break;
u2 = SRC;
uresult = bcd_to_binary (u1) + bcd_to_binary (u2) + carry_to_use;
result = binary_to_bcd (uresult);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "DADD: %#x + %#x + %d = %#x",
- u1, u2, carry_to_use, result);
+ TRACE_ALU (MSP430_CPU (sd), "DADD: %#x + %#x + %d = %#x",
+ u1, u2, carry_to_use, result);
DEST (result);
FLAGS (result, uresult > ((opcode->size == 8) ? 99 : 9999));
}
u1 = DSRC;
u2 = SRC;
uresult = u1 & u2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "AND: %#x & %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "AND: %#x & %#x = %#x",
+ u1, u2, uresult);
DEST (uresult);
FLAGS (uresult, uresult != 0);
}
u1 = DSRC;
u2 = SRC;
uresult = u1 & u2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "BIT: %#x & %#x -> %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "BIT: %#x & %#x -> %#x",
+ u1, u2, uresult);
FLAGS (uresult, uresult != 0);
}
break;
u1 = DSRC;
u2 = SRC;
uresult = u1 & ~ u2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "BIC: %#x & ~ %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "BIC: %#x & ~ %#x = %#x",
+ u1, u2, uresult);
DEST (uresult);
}
break;
u1 = DSRC;
u2 = SRC;
uresult = u1 | u2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "BIS: %#x | %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "BIS: %#x | %#x = %#x",
+ u1, u2, uresult);
DEST (uresult);
}
break;
u1 = DSRC;
u2 = SRC;
uresult = u1 ^ u2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "XOR: %#x & %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "XOR: %#x & %#x = %#x",
+ u1, u2, uresult);
DEST (uresult);
FLAGSV (uresult, uresult != 0, (u1 & s1) && (u2 & s1));
}
uresult = u1 >> 1;
if (SR & MSP430_FLAG_C)
uresult |= (1 << (opcode->size - 1));
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "RRC: %#x >>= %#x",
- u1, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "RRC: %#x >>= %#x",
+ u1, uresult);
DEST (uresult);
FLAGS (uresult, carry_to_use);
}
{
u1 = SRC;
uresult = ((u1 >> 8) & 0x00ff) | ((u1 << 8) & 0xff00);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "SWPB: %#x -> %#x",
- u1, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "SWPB: %#x -> %#x",
+ u1, uresult);
DEST (uresult);
}
break;
c = u1 & 1;
s1 = 1 << (opcode->size - 1);
uresult = (u1 >> 1) | (u1 & s1);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "RRA: %#x >>= %#x",
- u1, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "RRA: %#x >>= %#x",
+ u1, uresult);
DEST (uresult);
FLAGS (uresult, c);
}
u1 = SRC;
c = u1 & 1;
uresult = (u1 >> 1);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "RRU: %#x >>= %#x",
- u1, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "RRU: %#x >>= %#x",
+ u1, uresult);
DEST (uresult);
FLAGS (uresult, c);
}
uresult = u1 | 0xfff00;
else
uresult = u1 & 0x000ff;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "SXT: %#x -> %#x",
- u1, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "SXT: %#x -> %#x",
+ u1, uresult);
DEST (uresult);
FLAGS (uresult, c);
}
REG_PUT (MSR_SP, REG_GET (MSR_SP) - op_bytes);
mem_put_val (sd, SP, PC, op_bits);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "CALL: func %#x ret %#x, sp %#x",
- u1, PC, SP);
+ TRACE_ALU (MSP430_CPU (sd), "CALL: func %#x ret %#x, sp %#x",
+ u1, PC, SP);
REG_PUT (MSR_PC, u1);
break;
case MSO_reti:
- SR = mem_get_val (sd, SP, op_bits);
+ u1 = mem_get_val (sd, SP, 16);
+ SR = u1 & 0xFF;
SP += 2;
- PC = mem_get_val (sd, SP, op_bits);
+ PC = mem_get_val (sd, SP, 16);
SP += 2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "RETI: pc %#x sr %#x",
- PC, SR);
+ /* Emulate the RETI action of the 20-bit CPUX architecure.
+ This is safe for 16-bit CPU architectures as well, since the top
+ 8-bits of SR will have been written to the stack here, and will
+ have been read as 0. */
+ PC |= (u1 & 0xF000) << 4;
+ TRACE_ALU (MSP430_CPU (sd), "RETI: pc %#x sr %#x",
+ PC, SR);
break;
/* Jumps. */
if (u1)
{
- if (TRACE_BRANCH_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_BRANCH_IDX,
- "J%s: pc %#x -> %#x sr %#x, taken",
- cond_string (opcode->cond), PC, i, SR);
+ TRACE_BRANCH (MSP430_CPU (sd), "J%s: pc %#x -> %#x sr %#x, taken",
+ cond_string (opcode->cond), PC, i, SR);
PC = i;
if (PC == opcode_pc)
exit (0);
}
else
- if (TRACE_BRANCH_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_BRANCH_IDX,
- "J%s: pc %#x to %#x sr %#x, not taken",
- cond_string (opcode->cond), PC, i, SR);
+ TRACE_BRANCH (MSP430_CPU (sd), "J%s: pc %#x to %#x sr %#x, not taken",
+ cond_string (opcode->cond), PC, i, SR);
break;
default:
projects / deliverable / binutils-gdb.git / blobdiff