PR22069, Several instances of register accidentally spelled as regsiter

[deliverable/binutils-gdb.git] / sim / ppc / ppc-instructions

diff --git a/sim/ppc/ppc-instructions b/sim/ppc/ppc-instructions
index 495fe62ee51d20e1c9e978e86d9cc4f1e9d97d73..9f9773477f772e72577ce3527ee3a6a4c1ee46e1 100644 (file)
--- a/sim/ppc/ppc-instructions
+++ b/sim/ppc/ppc-instructions
@@ -21,7 +21,7 @@
 #
 #   This program is free software; you can redistribute it and/or modify
 #   it under the terms of the GNU General Public License as published by
-#   the Free Software Foundation; either version 2 of the License, or
+#   the Free Software Foundation; either version 3 of the License, or
 #   (at your option) any later version.
 #
 #   This program is distributed in the hope that it will be useful,
@@ -30,8 +30,7 @@
 #   GNU General Public License for more details.
 #
 #   You should have received a copy of the GNU General Public License
-#   along with this program; if not, write to the Free Software
-#   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#   along with this program; if not, see <http://www.gnu.org/licenses/>.
 #
 
 :cache::::RA:RA:
@@ -735,7 +734,7 @@ void::model-function::ppc_insn_to_spr:itable_index index, model_data *model_ptr,
        busy_ptr->nr_writebacks = 1;
        TRACE(trace_model,("Making register %s busy.\n", spr_name(nSPR)));
 
-# Schedule a MFCR instruction that moves the CR into an integer regsiter
+# Schedule a MFCR instruction that moves the CR into an integer register
 void::model-function::ppc_insn_mfcr:itable_index index, model_data *model_ptr, unsigned32 int_mask
        const unsigned32 cr_mask = 0xff;
        model_busy *busy_ptr;
@@ -909,7 +908,7 @@ model_print *::model-function::model_mon_info:model_data *model_ptr
          tail->suffix_singular = "";
        }
 
-       for (j = 0; j < (sizeof(ppc_branch_conditional_name) / sizeof(ppc_branch_conditional_name[0])) ; j++) {
+       for (j = 0; j < ARRAY_SIZE (ppc_branch_conditional_name); j++) {
          if (model_ptr->nr_branch_conditional[j]) {
            tail->next = ZALLOC(model_print);
            tail = tail->next;
@@ -3356,7 +3355,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
          spreg new_val = (spr_length(n) == 64
                           ? *rS
                           : MASKED(*rS, 32, 63));
-         /* HACK - time base registers need to be updated immediatly */
+         /* HACK - time base registers need to be updated immediately */
          if (WITH_TIME_BASE) {
            switch (n) {
            case spr_tbu:
@@ -4168,6 +4167,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
                                        0, /*instruction_is_convert_to_64bit*/
                                        0, /*instruction_is_convert_to_32bit*/
                                        0); /*single-precision*/
+         product = tmp.d;
        }
        else {
          /*HACK!*/