+2012-06-15 Joel Brobecker <brobecker@adacore.com>
+
+ * config.in, configure: Regenerate.
+
+2012-03-24 Mike Frysinger <vapier@gentoo.org>
+
+ * aclocal.m4, config.in, configure: Regenerate.
+
+2012-02-16 Kevin Buettner <kevinb@redhat.com>
+
+ * interp.c (MA): Adjust cast to avoid warning on 64-bit hosts.
+
+ * interp.c (sim_store_register, sim_fetch_register): Return
+ length, not -1.
+
+2011-12-03 Mike Frysinger <vapier@gentoo.org>
+
+ * aclocal.m4: New file.
+ * configure: Regenerate.
+
+2011-10-17 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: Change include to common/acinclude.m4.
+
+2011-10-17 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
+ call. Replace common.m4 include with SIM_AC_COMMON.
+ * configure: Regenerate.
+
+2011-04-16 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_complete_command): New stub function.
+
+2010-04-14 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_write): Add const to buffer arg.
+
+2010-01-12 Masaki Muranaka <monaka@monami-software.com>
+
+ * interp.c: Don't include sysdep.h.
+ Include stdio.h and errno.h.
+ Include string.h strings.h stdlib.h sys/stat.h if present.
+
+2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * configure: Regenerate.
+
+2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * config.in: Regenerate.
+ * configure: Likewise.
+
+ * configure: Regenerate.
+
+2008-07-11 Hans-Peter Nilsson <hp@axis.com>
+
+ * configure: Regenerate to track ../common/common.m4 changes.
+ * config.in: Ditto.
+
+2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
+ Daniel Jacobowitz <dan@codesourcery.com>
+ Joseph Myers <joseph@codesourcery.com>
+
+ * configure: Regenerate.
+
+2008-02-04 Antony King <antony.king@st.com>
+
+ * interp.c (macl): Fix non-portable implementation.
+
+2007-10-08 Andrew Stubbs <andrew.stubbs@st.com>
+
+ * gencode.c (tab): Add RAISE_EXCEPTION_IF_IN_DELAY_SLOT to the
+ definition of PC relative 'mov.l'/'mov.w' and also 'mova'.
+
+2007-03-02 Andrew Stubbs <andrew.stubbs@st.com>
+
+ * gencode.c (tab): Correct pre-decrement instructions when m == n.
+
+2006-12-21 Hans-Peter Nilsson <hp@axis.com>
+
+ * acconfig.h: Remove.
+ * config.in: Regenerate.
+
+2006-06-13 Richard Earnshaw <rearnsha@arm.com>
+
+ * configure: Regenerated.
+
+2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * configure: Regenerated.
+
+2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * configure: Regenerated.
+
+2005-11-10 Andrew Stubbs <andrew.stubbs@st.com>
+
+ * interp.c (sim_memory_size): Use same amount of memory on Windows as
+ elsewhere.
+
+2005-09-19 J"orn Rennecke <joern.rennecke@st.com>
+
+ * interp.c (<sys/mman.h>): Include.
+ (mcalloc): New function / macro.
+ (mfree): New macro.
+ (sim_size): Use mcalloc and mfree.
+
+2005-08-02 J"orn Rennecke <joern.rennecke@st.com>
+
+ * interp.c (strswaplen): Add one for '\0' delimiter.
+
+2005-06-16 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * gencode.c (tab): Avoid lvalue casts. Suggested by
+ Ralf Corsepius <ralf.corsepius@rtems.org>.
+
+2005-04-12 Jonathan Larmour <jifl@eCosCentric.com>
+
+ * gencode.c (tab): Avoid inserting code before variables all declared.
+
+2005-03-23 Mark Kettenis <kettenis@gnu.org>
+
+ * configure: Regenerate.
+
+2005-01-14 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Sinclude aclocal.m4 before common.m4. Add
+ explicit call to AC_CONFIG_HEADER.
+ * configure: Regenerate.
+
+2005-01-12 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Update to use ../common/common.m4.
+ * configure: Re-generate.
+
+2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2005-01-07 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Rename configure.in, require autoconf 2.59.
+ * configure: Re-generate.
+
+2004-12-08 Hans-Peter Nilsson <hp@axis.com>
+
+ * configure: Regenerate for ../common/aclocal.m4 update.
+
+2004-09-08 DJ Delorie <dj@redhat.com>
+
+ Commited by Corinna Vinschen <vinschen@redhat.com>
+ * gencode.c (movua.l): Compensate for endianness.
+
+2004-09-08 Corinna Vinschen <vinschen@redhat.com>
+
+ * interp.c (RAISE_EXCEPTION_IF_IN_DELAY_SLOT): New macro.
+ (in_delay_slot): New flag variable.
+ (Delay_Slot): Set in_delay_slot.
+ (sim_resume): Reset in_delay_slot after leaving code switch.
+ * gencode.c (op tab): Call RAISE_EXCEPTION_IF_IN_DELAY_SLOT for all
+ instructions not allowed in delay slots.
+
+2004-09-08 Michael Snyder <msnyder@redhat.com>
+
+ Commited by Corinna Vinschen <vinschen@redhat.com>
+ Introduce SH2a support.
+ * interp.c: Change type of jump table to short. Add various macros.
+ (sim_load): Save the bfd machine code.
+ (sim_create_inferior): Ditto.
+ (union saved_state_type): Add tbr, ibnr and ibcr registers.
+ Move bfd_mach to end of struct. Add regstack pointer.
+ (init_dsp): Don't swap contents of sh_dsp_table any more. Instead
+ use it directly in its own switch statement. Allocate space for 512
+ register banks.
+ (do_long_move_insn): New function.
+ (do_blog_insn): Ditto.
+ (trap): Use trap #13 and trap #14 to set ibnr and ibcr.
+ * gencode.c: Move movx/movy insns into separate switch statement.
+ (op tab): Add sh2a insns. Reject instructions that are disabled
+ on that chip.
+ (gensim_caselist): Generate default case here instead of in caller.
+ (gensim): Generate two separate switch statements. Call
+ gensim_caselist once for each (for movsxy_tab and for tab).
+ Add tokens for r15 and multiple regs.
+ (conflict_warn, warn_conflicts): Add for debugging.
+
+2004-08-18 J"orn Rennecke <joern.rennecke@superh.com>
+
+ * gencode.c (tab): For shad snd shld, fix result for
+ (op1 < 0 && shift_amount == 0).
+
+2004-02-02 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (movua.l): Set thislock to 0, not n.
+
+2004-02-12 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (table): Change from char to short.
+ (dumptable): Change generated table from char to short.
+ * interp.c (sh_jump_table, sh_dsp_table, ppi_table): char to short.
+ (init_dsp): Compute size of sh_dsp_table.
+ (sim_resume): Change jump_table from char to short.
+
+2004-01-27 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c: (op tab): Some refs and defs fixes.
+ "fsrra" -> "fsrra <FREG_N>".
+ "sleep": replace array ref with array addr.
+ "trapa": ditto.
+ Comment and whitespace clean-ups.
+
+2004-01-07 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c: Whitespace cleanup.
+ * interp.c: Ditto.
+
+ * gencode.c: Replace 'Hitachi' with 'Renesas'.
+ (op tab): Add new instructions for sh4a, DBR, SBR.
+ (expand_opcode): Add handling for new movxy combinations.
+ (gensym_caselist): Ditto.
+ (expand_ppi_movxy): Remove movx/movy expansions,
+ now handled in expand_opcode.
+ (gensym): Add some helpful macros.
+ (expand_ppi_code): Flatten loop for simplicity, tweak for 12-bit
+ instead of 8-bit table (some insns are ambiguous to 8 bits).
+ (ppi_gensim, main): Generate 12-bit instead of 8-bit ppi table.
+
+ * interp.c: Replace 'Hitachi' with 'Renesas'.
+ (union saved_state_type): Add dbr, sgr, ldst.
+ (get_loop_bounds_ext): New function.
+ (init_dsp): Add bfd_mach_sh4al_dsp.
+ (sim_resume): Handle extended loop bounds.
+
+2003-12-18 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (expand_opcode): Simplify and reorganize.
+ Eliminate "shift" parameter. Eliminate "4 bits at a time"
+ assumption. Flatten switch statement to a single level.
+ Add "eeee" token for even-numbered registers.
+ (bton): Delete.
+ (fsca): Use "eeee" token.
+ (ppi_moves): Rename to "expand_ppi_movxy". Do the ddt
+ [movx/movy] expansion here, as well as the ppi expansion.
+ (gensim_caselist): Accept 'eeee' along with 'nnnn'.
+
+2003-11-03 J"orn Rennecke <joern.rennecke@superh.com>
+
+ * interp.c (fsca_s, fsrra_s): New functions.
+ * gencode.c (tab): Add entries for fsca and fsrra.
+ (expand_opcode): Allow variable length n / m fields.
+
+2003-10-15 J"orn Rennecke <joern.rennecke@superh.com>
+
+ * syscall.h (SYS_truncate, SYS_ftruncate): Define.
+ * interp.c (trap): Add support for SYS_ftruncate and SYS_truncate.
+
+2003-08-11 Shrinivas Atre <shrinivasa@KPITCummins.com>
+ * sim/sh/gencode.c ( tab[] ): Addition of MAC.L handler and
+ correction for MAC.W handler
+ * sim/sh/interp.c ( macl ): New Function. Implementation of
+ MAC.L handler.
+
+2003-08-07 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (expand_ppi_code): Comment spelling fix.
+
+2003-07-25 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (pshl): Change < to <= (shift by 16 is allowed).
+ Cast argument of >> to unsigned to prevent sign extension.
+ (psha): Change < to <= (shift by 32 is allowed).
+
+2003-07-24 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c: Fix typo in comment.
+
+2003-07-23 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c: A few more fix-ups of refs and defs.
+ (frchg): Raise SIGILL if in double-precision mode.
+ (ldtlb): We don't simulate cache, so this is a no-op.
+ (movsxy_tab): Correct a few bit pattern errors.
+
+2003-07-09 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (prnd): Clear LSW of result to zeros.
+ * gencode.c (pmuls): Expression is mis-parenthesized.
+ * gencode.c (ppi_gensim): For a conditional ppi insn, if the
+ condition is false, we want to return (not break). A break
+ will take us to the end of the function where registers will
+ be updated, whereas the desired outcome is for nothing to change.
+
+2003-07-03 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (movs): Fix a couple of text transpositions.
+
+2003-06-27 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (op tab): Some fix-ups of refs and defs.
+ (ocbi, ocbp): Cache not simulated, but may cause memory fault.
+ (gensym_caselist): Add default case to switch statement.
+ (expand_ppi_code): Add default case to switch statement.
+ * gencode.c (op tab): Implement movca.l.
+ * gencode.c (op movsxy_tab): Fix an error in the bit pattern.
+ * gencode.c (gensim_caselist): The movy instructions use
+ registers R6 and R7 (not R4 and R5 like the movx insns).
+
+2003-06-27 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (op movsxy_tab): Fix up some copy/paste errors
+ in name: s/REG_x/REG_y/.
+
+ * gencode.c (op tab): Move misplaced semicolon.
+
+2003-02-27 Andrew Cagney <cagney@redhat.com>
+
+ * interp.c (init_dsp, sim_open, sim_create_inferior): Rename _bfd
+ to bfd.
+
+Fri Oct 11 16:22:28 2002 J"orn Rennecke <joern.rennecke@superh.com>
+
+ * interp.c (trap): Return int. Take extra parameter for address
+ of the trap instruction. Changed all callers.
+ Add case 33 for profiling.
+ * gencode.c (trapa): Handle trap 33 using the trap function.
+ Add read of vector for generic traps.
+
+Wed Jul 17 19:36:38 2002 J"orn Rennecke <joern.rennecke@superh.com>
+
+ * Makefile.in (interp.o): Depend on $(srcroot)/include/gdb/sim-sh.h.
+ * interp.c: Include "gdb/sim-sh.h".
+ (sim_store_register, sim_fetch_register): Use constants defined there.
+
+Tue Jun 18 16:53:11 2002 J"orn Rennecke <joern.rennecke@superh.com>
+
+ * interp.c (sim_resume): Fix setting of bus error for
+ instruction fetch.
+
+2002-06-16 Andrew Cagney <ac131313@redhat.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
2002-06-08 Andrew Cagney <cagney@redhat.com>
* interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".