/* SH5 simulator support code
- Copyright (C) 2000-2013 Free Software Foundation, Inc.
+ Copyright (C) 2000-2020 Free Software Foundation, Inc.
Contributed by Red Hat, Inc.
This file is part of the GNU simulators.
/* TODO: Unimplemented. */
}
-/* Count the number of arguments. */
-static int
-count_argc (cpu)
- SIM_CPU *cpu;
-{
- int i = 0;
-
- if (! STATE_PROG_ARGV (CPU_STATE (cpu)))
- return -1;
-
- while (STATE_PROG_ARGV (CPU_STATE (cpu)) [i] != NULL)
- ++i;
-
- return i;
-}
-
/* Read a null terminated string from memory, return in a buffer */
static char *
fetch_str (current_cpu, pc, addr)
break;
case SYS_argc:
- SET_H_GR (ret_reg, count_argc (current_cpu));
+ SET_H_GR (ret_reg, countargv (STATE_PROG_ARGV (CPU_STATE (current_cpu))));
break;
case SYS_argnlen:
- if (PARM1 < count_argc (current_cpu))
+ if (PARM1 < countargv (STATE_PROG_ARGV (CPU_STATE (current_cpu))))
SET_H_GR (ret_reg,
strlen (STATE_PROG_ARGV (CPU_STATE (current_cpu)) [PARM1]));
else
break;
case SYS_argn:
- if (PARM1 < count_argc (current_cpu))
+ if (PARM1 < countargv (STATE_PROG_ARGV (CPU_STATE (current_cpu))))
{
/* Include the NULL byte. */
i = strlen (STATE_PROG_ARGV (CPU_STATE (current_cpu)) [PARM1]) + 1;
/* Do nothing. */
}
-static const MODEL sh_models [] =
+static const SIM_MODEL sh_models [] =
{
{ "sh2", & sh2_mach, MODEL_SH5, NULL, sh64_model_init },
{ "sh2e", & sh2e_mach, MODEL_SH5, NULL, sh64_model_init },
{ 0 }
};
-static const MACH_IMP_PROPERTIES sh5_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES sh5_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
#endif
};
-const MACH sh2_mach =
+const SIM_MACH sh2_mach =
{
"sh2", "sh2", MACH_SH5,
16, 16, &sh_models[0], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh2e_mach =
+const SIM_MACH sh2e_mach =
{
"sh2e", "sh2e", MACH_SH5,
16, 16, &sh_models[1], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh2a_fpu_mach =
+const SIM_MACH sh2a_fpu_mach =
{
"sh2a", "sh2a", MACH_SH5,
16, 16, &sh_models[2], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh2a_nofpu_mach =
+const SIM_MACH sh2a_nofpu_mach =
{
"sh2a_nofpu", "sh2a_nofpu", MACH_SH5,
16, 16, &sh_models[3], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh3_mach =
+const SIM_MACH sh3_mach =
{
"sh3", "sh3", MACH_SH5,
16, 16, &sh_models[4], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh3e_mach =
+const SIM_MACH sh3e_mach =
{
"sh3e", "sh3e", MACH_SH5,
16, 16, &sh_models[5], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh4_mach =
+const SIM_MACH sh4_mach =
{
"sh4", "sh4", MACH_SH5,
16, 16, &sh_models[6], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh4_nofpu_mach =
+const SIM_MACH sh4_nofpu_mach =
{
"sh4_nofpu", "sh4_nofpu", MACH_SH5,
16, 16, &sh_models[7], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh4a_mach =
+const SIM_MACH sh4a_mach =
{
"sh4a", "sh4a", MACH_SH5,
16, 16, &sh_models[8], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh4a_nofpu_mach =
+const SIM_MACH sh4a_nofpu_mach =
{
"sh4a_nofpu", "sh4a_nofpu", MACH_SH5,
16, 16, &sh_models[9], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh4al_mach =
+const SIM_MACH sh4al_mach =
{
"sh4al", "sh4al", MACH_SH5,
16, 16, &sh_models[10], &sh5_imp_properties,
sh64_prepare_run
};
-const MACH sh5_mach =
+const SIM_MACH sh5_mach =
{
"sh5", "sh5", MACH_SH5,
32, 32, &sh_models[11], &sh5_imp_properties,