+2015-04-06 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.in (SIM_OBJS): Delete sim-engine.o and sim-hrw.o.
+
+2015-03-31 Mike Frysinger <vapier@gentoo.org>
+
+ * config.in, configure: Regenerate.
+
+2015-03-24 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_pc_get): New function.
+
+2015-03-16 Mike Frysinger <vapier@gentoo.org>
+
+ * config.in, configure: Regenerate.
+
+2015-03-14 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.in (SIM_RUN_OBJS): Delete.
+
+2015-03-14 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac (AC_CHECK_HEADERS): Delete unistd.h & stdlib.h &
+ string.h & strings.h & time.h.
+ * aclocal.m4, configure: Regenerate.
+
+2015-02-27 Nick Clifton <nickc@redhat.com>
+
+ * sim-main.h (reg64_t): New type.
+ (v850_regs): Add selID_sregs field.
+ (VR, SAT16, SAT32, ABS16, ABS32 ): New macros.
+ * v850-dc: Add fields for v850e3v5 instructions.
+ * v850.igen (cvtf.dl): Use correctly signed local value.
+ (cvtf.dw, cvtf.sw, trncf.dul, trncf.dl, trncf.sul, trncf.sw):
+ Likewise.
+ * interp.c: Fix old style function declarations.
+ * simops.c: Likewise.
+
+2015-02-24 Nick Clifton <nickc@redhat.com>
+
+ * v850.igen: Add more e3v5 support.
+ (FMAF.S): New pattern.
+ (FMSF.S): New pattern.
+ (FNMAF.S): New pattern.
+ (FNMSF.S): New pattern.
+ (cnvq15q30): New pattern.
+ (cnvq30q15): New pattern.
+ (cnvq31q62): New pattern.
+ (cnvq62q31): New pattern.
+ (dup.h): New pattern.
+ (dup.w): New pattern.
+ (expq31): New pattern.
+ (modadd): New pattern.
+ (mov.dw): New pattern.
+ (mov.h): New pattern.
+ (mov.w): New pattern.
+ (pki16i32): New pattern.
+ (pki16ui8): New pattern.
+ (pki32i16): New pattern.
+ (pki64i32): New pattern.
+ (pkq15q31): New pattern.
+ (pkq30q31): New pattern.
+ (pkq31q15): New pattern.
+ (pkui8i16): New pattern.
+ (vabs.h): New pattern.
+ (vabs.w): New pattern.
+ (vadd.dw): New placeholder pattern.
+ (vadd.h): New placeholder pattern.
+ (vadd.w): New placeholder pattern.
+ (vadds.h): New placeholder pattern.
+ (vadds.w): New placeholder pattern.
+ (vaddsat.h): New placeholder pattern.
+ (vaddsat.w): New placeholder pattern.
+ (vand): New pattern.
+ (vbiq.h): New placeholder pattern.
+ (vbswap.dw): New placeholder pattern.
+ (vbswap.h): New placeholder pattern.
+ (vbswap.w): New placeholder pattern.
+ (vcalc.h): New placeholder pattern.
+ (vcalc.w): New placeholder pattern.
+ (vcmov): New placeholder pattern.
+
+2014-08-19 Alan Modra <amodra@gmail.com>
+
+ * configure: Regenerate.
+
+2014-08-15 Roland McGrath <mcgrathr@google.com>
+
+ * configure: Regenerate.
+ * config.in: Regenerate.
+
+2014-03-04 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2013-09-23 Alan Modra <amodra@gmail.com>
+
+ * configure: Regenerate.
+
+2013-06-03 Mike Frysinger <vapier@gentoo.org>
+
+ * aclocal.m4, configure: Regenerate.
+
+2013-05-13 Nick Clifton <nickc@redhat.com>
+
+ * v850.igen (LDSR): Accept but ignore a selID parameter.
+
+2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
+
+ * configure: Rebuild.
+
+2013-01-28 Nick Clifton <nickc@redhat.com>
+
+ * simops.c (v850_rotl): New function.
+ (v850_bins): New function.
+ * simops.h: Add prototypes fir v850_rotl and v850_bins.
+ * v850-dc: Add entries for V850e3v5.
+ * v850.igen: Add support for v850e3v5.
+ (ld.dw, st.dw, rotl, bins): New patterns.
+
+2013-01-10 Nick Clifton <nickc@redhat.com>
+
+ * interp.c (sim_open): Add support for bfd_arch_v850_rh850
+ architecture type. Add support for bfd_mach_v850e2 and
+ bfd_mach_v850e2v3 machine numbers.
+ * v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG.
+ (cmpf.d): Correct order of operands.
+ (cmpf.s): Likewise.
+ (trncf.dul): New pattern.
+ (trncf.duw): New pattern.
+ (trncf.sul): New pattern.
+ (trncf.suw): New pattern.
+ * v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW.
+
+2012-09-13 Nick Clifton <nickc@redhat.com>
+
+ * v850.igen (W,WWWW): Correct computation of register number.
+ (JR32): Remove unnecessary comma.
+ (cmovf.s): Register 0 is an invalid source register.
+ (maddf.s): Remove bogus intermediary rounding.
+ (nmaddf.s): Likewise.
+ (trncf.sl): Remove bogus initial rounding.
+ (trncf.dw): Likewise.
+ (trncf.sl): Likewise.
+ (trncf.sw): Likewise.
+
2012-06-15 Joel Brobecker <brobecker@adacore.com>
* config.in, configure: Regenerate.