X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=bfd%2Farchures.c;h=cd8500f7791a41b84028382565bfe2d4a983cfe5;hb=ce87af851fad398e1c09ba763ee21b6dcd067542;hp=a8a8b9c4d9aafead213d51a32b6f3758570d1cca;hpb=40b365969f7fd035dfa0c6ffe729fd2501b5f11d;p=deliverable%2Fbinutils-gdb.git

diff --git a/bfd/archures.c b/bfd/archures.c
index a8a8b9c4d9..cd8500f779 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -173,6 +173,7 @@ DESCRIPTION
 .#define bfd_mach_mips5                 5
 .#define bfd_mach_mips_loongson_2e      3001
 .#define bfd_mach_mips_loongson_2f      3002
+.#define bfd_mach_mips_loongson_3a      3003
 .#define bfd_mach_mips_sb1              12310201 {* octal 'SB', 01 *}
 .#define bfd_mach_mips_octeon		6501
 .#define bfd_mach_mips_xlr              887682   {* decimal 'XLR'  *}
@@ -184,6 +185,8 @@ DESCRIPTION
 .#define bfd_mach_i386_i386 1
 .#define bfd_mach_i386_i8086 2
 .#define bfd_mach_i386_i386_intel_syntax 3
+.#define bfd_mach_x64_32 32
+.#define bfd_mach_x64_32_intel_syntax 33
 .#define bfd_mach_x86_64 64
 .#define bfd_mach_x86_64_intel_syntax 65
 .  bfd_arch_l1om,   {* Intel L1OM *}
@@ -310,7 +313,9 @@ DESCRIPTION
 .  bfd_arch_v850,      {* NEC V850 *}
 .#define bfd_mach_v850          1
 .#define bfd_mach_v850e 	'E'
-.#define bfd_mach_v850e1	'1'
+.#define bfd_mach_v850e1        '1'
+.#define bfd_mach_v850e2        0x4532
+.#define bfd_mach_v850e2v3      0x45325633
 .  bfd_arch_arc,       {* ARC Cores *}
 .#define bfd_mach_arc_5         5
 .#define bfd_mach_arc_6         6
@@ -371,6 +376,13 @@ DESCRIPTION
 .#define bfd_mach_avr5		5
 .#define bfd_mach_avr51		51
 .#define bfd_mach_avr6		6
+.#define bfd_mach_avrxmega1 101
+.#define bfd_mach_avrxmega2 102
+.#define bfd_mach_avrxmega3 103
+.#define bfd_mach_avrxmega4 104
+.#define bfd_mach_avrxmega5 105
+.#define bfd_mach_avrxmega6 106
+.#define bfd_mach_avrxmega7 107
 .  bfd_arch_bfin,        {* ADI Blackfin *}
 .#define bfd_mach_bfin          1
 .  bfd_arch_cr16,       {* National Semiconductor CompactRISC (ie CR16). *}
@@ -417,9 +429,6 @@ DESCRIPTION
 .#define bfd_mach_xc16xs         3
 .  bfd_arch_xtensa,    {* Tensilica's Xtensa cores.  *}
 .#define bfd_mach_xtensa	1
-.   bfd_arch_maxq,     {* Dallas MAXQ 10/20 *}
-.#define bfd_mach_maxq10    10
-.#define bfd_mach_maxq20    20
 .  bfd_arch_z80,
 .#define bfd_mach_z80strict      1 {* No undocumented opcodes.  *}
 .#define bfd_mach_z80            3 {* With ixl, ixh, iyl, and iyh.  *}
@@ -498,7 +507,6 @@ extern const bfd_arch_info_type bfd_m68hc11_arch;
 extern const bfd_arch_info_type bfd_m68hc12_arch;
 extern const bfd_arch_info_type bfd_m68k_arch;
 extern const bfd_arch_info_type bfd_m88k_arch;
-extern const bfd_arch_info_type bfd_maxq_arch;
 extern const bfd_arch_info_type bfd_mcore_arch;
 extern const bfd_arch_info_type bfd_mep_arch;
 extern const bfd_arch_info_type bfd_mips_arch;
@@ -576,7 +584,6 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
     &bfd_m68hc12_arch,
     &bfd_m68k_arch,
     &bfd_m88k_arch,
-    &bfd_maxq_arch,
     &bfd_mcore_arch,
     &bfd_mep_arch,
     &bfd_microblaze_arch,