X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=bfd%2Fbfd-in2.h;h=abb6405f579c674334db238d8ca22dc935d52870;hb=341026c1c143611e52a7bae351f7a886a8cc19a3;hp=ae8bef5b605df889463ed49803319fd651c4db9d;hpb=4e4770d0c61fb454aa228e4540c48b925b01f29b;p=deliverable%2Fbinutils-gdb.git diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index ae8bef5b60..abb6405f57 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -10,21 +10,21 @@ Free Software Foundation, Inc. Contributed by Cygnus Support. -This file is part of BFD, the Binary File Descriptor library. + This file is part of BFD, the Binary File Descriptor library. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #ifndef __BFD_H_SEEN__ #define __BFD_H_SEEN__ @@ -95,12 +95,13 @@ typedef struct _bfd bfd; /* It gets worse if the host also defines a true/false enum... -sts */ /* And even worse if your compiler has built-in boolean types... -law */ /* And even worse if your compiler provides a stdbool.h that conflicts - with these definitions... gcc 2.95 and later do. -drow */ + with these definitions... gcc 2.95 and later do. If so, it must + be included first. -drow */ #if defined (__GNUG__) && (__GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 6)) #define TRUE_FALSE_ALREADY_DEFINED #else -#if (__GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 95)) -#include +#if defined (__bool_true_false_are_defined) +/* We have . */ #define TRUE_FALSE_ALREADY_DEFINED #endif #endif @@ -272,6 +273,9 @@ bfd_format; /* This flag indicates that the BFD contents are actually cached in memory. If this is set, iostream points to a bfd_in_memory struct. */ #define BFD_IN_MEMORY 0x800 + +/* The sections in this BFD specify a memory page. */ +#define HAS_LOAD_PAGE 0x1000 /* Symbols and relocation. */ @@ -333,12 +337,13 @@ alent; /* Object and core file sections. */ #define align_power(addr, align) \ - ( ((addr) + ((1<<(align))-1)) & (-1 << (align))) + (((addr) + ((bfd_vma) 1 << (align)) - 1) & ((bfd_vma) -1 << (align))) typedef struct sec *sec_ptr; #define bfd_get_section_name(bfd, ptr) ((ptr)->name + 0) #define bfd_get_section_vma(bfd, ptr) ((ptr)->vma + 0) +#define bfd_get_section_lma(bfd, ptr) ((ptr)->lma + 0) #define bfd_get_section_alignment(bfd, ptr) ((ptr)->alignment_power + 0) #define bfd_section_name(bfd, ptr) ((ptr)->name) #define bfd_section_size(bfd, ptr) (bfd_get_section_size_before_reloc(ptr)) @@ -350,7 +355,7 @@ typedef struct sec *sec_ptr; #define bfd_is_com_section(ptr) (((ptr)->flags & SEC_IS_COMMON) != 0) -#define bfd_set_section_vma(bfd, ptr, val) (((ptr)->vma = (ptr)->lma= (val)), ((ptr)->user_set_vma = (boolean)true), true) +#define bfd_set_section_vma(bfd, ptr, val) (((ptr)->vma = (ptr)->lma = (val)), ((ptr)->user_set_vma = (boolean)true), true) #define bfd_set_section_alignment(bfd, ptr, val) (((ptr)->alignment_power = (val)),true) #define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),true) @@ -750,9 +755,12 @@ extern boolean bfd_xcoff_record_link_assignment extern boolean bfd_xcoff_size_dynamic_sections PARAMS ((bfd *, struct bfd_link_info *, const char *, const char *, unsigned long, unsigned long, unsigned long, boolean, - int, boolean, boolean, struct sec **)); + int, boolean, boolean, struct sec **, boolean)); extern boolean bfd_xcoff_link_generate_rtinit - PARAMS ((bfd *, const char *, const char *)); + PARAMS ((bfd *, const char *, const char *, boolean)); + +/* XCOFF support routines for ar. */ +extern boolean bfd_xcoff_ar_archive_set_magic PARAMS ((bfd *, char *)); /* Externally visible COFF routines. */ @@ -804,6 +812,9 @@ extern boolean bfd_elf32_arm_process_before_allocation extern boolean bfd_elf32_arm_get_bfd_for_interworking PARAMS ((bfd *, struct bfd_link_info *)); +extern boolean bfd_elf32_arm_add_glue_sections_to_bfd + PARAMS ((bfd *, struct bfd_link_info *)); + /* TI COFF load page support. */ extern void bfd_ticoff_set_section_load_page PARAMS ((struct sec *, int)); @@ -811,10 +822,11 @@ extern void bfd_ticoff_set_section_load_page extern int bfd_ticoff_get_section_load_page PARAMS ((struct sec *)); -/* And more from the source. */ +/* Extracted from init.c. */ void bfd_init PARAMS ((void)); +/* Extracted from opncls.c. */ bfd * bfd_openr PARAMS ((const char *filename, const char *target)); @@ -842,6 +854,7 @@ bfd_make_writable PARAMS ((bfd *abfd)); boolean bfd_make_readable PARAMS ((bfd *abfd)); +/* Extracted from libbfd.c. */ /* Byte swapping macros for user section data. */ @@ -982,6 +995,7 @@ bfd_make_readable PARAMS ((bfd *abfd)); #define H_GET_S8 bfd_h_get_signed_8 +/* Extracted from section.c. */ /* This structure is used for a comdat section, as in PE. A comdat section is associated with a particular symbol. When the linker sees a comdat section, it keeps only one of the sections with a @@ -1063,12 +1077,6 @@ typedef struct sec standard data. */ #define SEC_CONSTRUCTOR 0x100 - /* The section is a constructor, and should be placed at the - end of the text, data, or bss section(?). */ -#define SEC_CONSTRUCTOR_TEXT 0x1100 -#define SEC_CONSTRUCTOR_DATA 0x2100 -#define SEC_CONSTRUCTOR_BSS 0x3100 - /* The section has contents - a data section could be <> | <>; a debug section could be <> */ @@ -1089,6 +1097,9 @@ typedef struct sec sections. */ #define SEC_COFF_SHARED_LIBRARY 0x800 + /* The section contains thread local data. */ +#define SEC_THREAD_LOCAL 0x1000 + /* The section has GOT references. This flag is only for the linker, and is currently only used by the elf32-hppa back end. It will be set if global offset table references were detected @@ -1445,10 +1456,14 @@ bfd_copy_private_section_data PARAMS ((bfd *ibfd, asection *isec, void _bfd_strip_section_from_output PARAMS ((struct bfd_link_info *info, asection *section)); +boolean +bfd_generic_discard_group PARAMS ((bfd *abfd, asection *group)); + +/* Extracted from archures.c. */ enum bfd_architecture { - bfd_arch_unknown, /* File arch not known */ - bfd_arch_obscure, /* Arch known, not one of these */ + bfd_arch_unknown, /* File arch not known. */ + bfd_arch_obscure, /* Arch known, not one of these. */ bfd_arch_m68k, /* Motorola 68xxx */ #define bfd_mach_m68000 1 #define bfd_mach_m68008 2 @@ -1470,7 +1485,7 @@ enum bfd_architecture available to machines with higher numbers. The exception is the "ca", which is incompatible with all other machines except - "core". */ + "core". */ #define bfd_mach_i960_core 1 #define bfd_mach_i960_ka_sa 2 @@ -1481,6 +1496,8 @@ enum bfd_architecture #define bfd_mach_i960_jx 7 #define bfd_mach_i960_hx 8 + bfd_arch_or32, /* OpenRISC 32 */ + bfd_arch_a29k, /* AMD 29000 */ bfd_arch_sparc, /* SPARC */ #define bfd_mach_sparc 1 @@ -1488,12 +1505,12 @@ enum bfd_architecture #define bfd_mach_sparc_sparclet 2 #define bfd_mach_sparc_sparclite 3 #define bfd_mach_sparc_v8plus 4 -#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns */ +#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ #define bfd_mach_sparc_sparclite_le 6 #define bfd_mach_sparc_v9 7 -#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns */ -#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns */ -#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns */ +#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ +#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ +#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ /* Nonzero if MACH has the v9 instruction set. */ #define bfd_mach_sparc_v9_p(mach) \ ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \ @@ -1541,6 +1558,7 @@ enum bfd_architecture bfd_arch_pdp11, /* DEC PDP-11 */ bfd_arch_powerpc, /* PowerPC */ #define bfd_mach_ppc 0 +#define bfd_mach_ppc64 1 #define bfd_mach_ppc_403 403 #define bfd_mach_ppc_403gc 4030 #define bfd_mach_ppc_505 505 @@ -1557,6 +1575,7 @@ enum bfd_architecture #define bfd_mach_ppc_rs64ii 642 #define bfd_mach_ppc_rs64iii 643 #define bfd_mach_ppc_7400 7400 +#define bfd_mach_ppc_e500 500 bfd_arch_rs6000, /* IBM RS/6000 */ #define bfd_mach_rs6k 0 #define bfd_mach_rs6k_rs1 6001 @@ -1568,6 +1587,7 @@ enum bfd_architecture #define bfd_mach_d10v_ts2 2 #define bfd_mach_d10v_ts3 3 bfd_arch_d30v, /* Mitsubishi D30V */ + bfd_arch_dlx, /* DLX */ bfd_arch_m68hc11, /* Motorola 68HC11 */ bfd_arch_m68hc12, /* Motorola 68HC12 */ bfd_arch_z8k, /* Zilog Z8000 */ @@ -1582,11 +1602,12 @@ enum bfd_architecture #define bfd_mach_sh3_dsp 0x3d #define bfd_mach_sh3e 0x3e #define bfd_mach_sh4 0x40 +#define bfd_mach_sh5 0x50 bfd_arch_alpha, /* Dec Alpha */ #define bfd_mach_alpha_ev4 0x10 #define bfd_mach_alpha_ev5 0x20 #define bfd_mach_alpha_ev6 0x30 - bfd_arch_arm, /* Advanced Risc Machines ARM */ + bfd_arch_arm, /* Advanced Risc Machines ARM. */ #define bfd_mach_arm_2 1 #define bfd_mach_arm_2a 2 #define bfd_mach_arm_3 3 @@ -1600,6 +1621,9 @@ enum bfd_architecture bfd_arch_ns32k, /* National Semiconductors ns32000 */ bfd_arch_w65, /* WDC 65816 */ bfd_arch_tic30, /* Texas Instruments TMS320C30 */ + bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */ +#define bfd_mach_c3x 30 +#define bfd_mach_c4x 40 bfd_arch_tic54x, /* Texas Instruments TMS320C54X */ bfd_arch_tic80, /* TI TMS320c80 (MVP) */ bfd_arch_v850, /* NEC V850 */ @@ -1612,7 +1636,7 @@ enum bfd_architecture #define bfd_mach_arc_7 2 #define bfd_mach_arc_8 3 bfd_arch_m32r, /* Mitsubishi M32R/D */ -#define bfd_mach_m32r 0 /* backwards compatibility */ +#define bfd_mach_m32r 0 /* For backwards compatibility. */ #define bfd_mach_m32rx 'x' bfd_arch_mn10200, /* Matsushita MN10200 */ bfd_arch_mn10300, /* Matsushita MN10300 */ @@ -1620,12 +1644,22 @@ enum bfd_architecture #define bfd_mach_am33 330 bfd_arch_fr30, #define bfd_mach_fr30 0x46523330 + bfd_arch_frv, +#define bfd_mach_frv 0 +#define bfd_mach_frvsimple 1 +#define bfd_mach_fr300 300 +#define bfd_mach_fr400 400 +#define bfd_mach_frvtomcat 499 /* fr500 prototype */ +#define bfd_mach_fr500 500 bfd_arch_mcore, bfd_arch_ia64, /* HP/Intel ia64 */ #define bfd_mach_ia64_elf64 0 #define bfd_mach_ia64_elf32 1 + bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ +#define bfd_mach_ip2022 0 +#define bfd_mach_ip2022ext 1 bfd_arch_pj, - bfd_arch_avr, /* Atmel AVR microcontrollers */ + bfd_arch_avr, /* Atmel AVR microcontrollers. */ #define bfd_mach_avr1 1 #define bfd_mach_avr2 2 #define bfd_mach_avr3 3 @@ -1633,10 +1667,10 @@ enum bfd_architecture #define bfd_mach_avr5 5 bfd_arch_cris, /* Axis CRIS */ bfd_arch_s390, /* IBM s390 */ -#define bfd_mach_s390_esa 0 -#define bfd_mach_s390_esame 1 +#define bfd_mach_s390_31 0 +#define bfd_mach_s390_64 1 bfd_arch_openrisc, /* OpenRISC */ - bfd_arch_mmix, /* Donald Knuth's educational processor */ + bfd_arch_mmix, /* Donald Knuth's educational processor. */ bfd_arch_xstormy16, #define bfd_mach_xstormy16 0 bfd_arch_last @@ -1652,7 +1686,9 @@ typedef struct bfd_arch_info const char *arch_name; const char *printable_name; unsigned int section_align_power; - /* True if this is the default machine for the architecture. */ + /* True if this is the default machine for the architecture. + The default arch should be the first entry for an arch so that + all the entries for that arch can be accessed via <>. */ boolean the_default; const struct bfd_arch_info * (*compatible) PARAMS ((const struct bfd_arch_info *a, @@ -1661,7 +1697,9 @@ typedef struct bfd_arch_info boolean (*scan) PARAMS ((const struct bfd_arch_info *, const char *)); const struct bfd_arch_info *next; -} bfd_arch_info_type; +} +bfd_arch_info_type; + const char * bfd_printable_name PARAMS ((bfd *abfd)); @@ -1709,6 +1747,7 @@ unsigned int bfd_arch_mach_octets_per_byte PARAMS ((enum bfd_architecture arch, unsigned long machine)); +/* Extracted from reloc.c. */ typedef enum bfd_reloc_status { /* No errors detected. */ @@ -2129,6 +2168,26 @@ GP register. */ BFD_RELOC_ALPHA_GPREL_HI16, BFD_RELOC_ALPHA_GPREL_LO16, +/* Like BFD_RELOC_23_PCREL_S2, except that the source and target must +share a common GP, and the target address is adjusted for +STO_ALPHA_STD_GPLOAD. */ + BFD_RELOC_ALPHA_BRSGP, + +/* Alpha thread-local storage relocations. */ + BFD_RELOC_ALPHA_TLSGD, + BFD_RELOC_ALPHA_TLSLDM, + BFD_RELOC_ALPHA_DTPMOD64, + BFD_RELOC_ALPHA_GOTDTPREL16, + BFD_RELOC_ALPHA_DTPREL64, + BFD_RELOC_ALPHA_DTPREL_HI16, + BFD_RELOC_ALPHA_DTPREL_LO16, + BFD_RELOC_ALPHA_DTPREL16, + BFD_RELOC_ALPHA_GOTTPREL16, + BFD_RELOC_ALPHA_TPREL64, + BFD_RELOC_ALPHA_TPREL_HI16, + BFD_RELOC_ALPHA_TPREL_LO16, + BFD_RELOC_ALPHA_TPREL16, + /* Bits 27..2 of the relocation address shifted right 2 bits; simple reloc otherwise. */ BFD_RELOC_MIPS_JMP, @@ -2183,6 +2242,17 @@ to compensate for the borrow when the low bits are added. */ BFD_RELOC_MIPS_RELGOT, BFD_RELOC_MIPS_JALR, +/* Fujitsu Frv Relocations. */ + BFD_RELOC_FRV_LABEL16, + BFD_RELOC_FRV_LABEL24, + BFD_RELOC_FRV_LO16, + BFD_RELOC_FRV_HI16, + BFD_RELOC_FRV_GPREL12, + BFD_RELOC_FRV_GPRELU12, + BFD_RELOC_FRV_GPREL32, + BFD_RELOC_FRV_GPRELHI, + BFD_RELOC_FRV_GPRELLO, + /* i386/elf relocations */ BFD_RELOC_386_GOT32, @@ -2193,6 +2263,15 @@ to compensate for the borrow when the low bits are added. */ BFD_RELOC_386_RELATIVE, BFD_RELOC_386_GOTOFF, BFD_RELOC_386_GOTPC, + BFD_RELOC_386_TLS_LE, + BFD_RELOC_386_TLS_GD, + BFD_RELOC_386_TLS_LDM, + BFD_RELOC_386_TLS_LDO_32, + BFD_RELOC_386_TLS_IE_32, + BFD_RELOC_386_TLS_LE_32, + BFD_RELOC_386_TLS_DTPMOD32, + BFD_RELOC_386_TLS_DTPOFF32, + BFD_RELOC_386_TLS_TPOFF32, /* x86-64/elf relocations */ BFD_RELOC_X86_64_GOT32, @@ -2362,6 +2441,55 @@ field in the instruction. */ BFD_RELOC_SH_JMP_SLOT, BFD_RELOC_SH_RELATIVE, BFD_RELOC_SH_GOTPC, + BFD_RELOC_SH_GOT_LOW16, + BFD_RELOC_SH_GOT_MEDLOW16, + BFD_RELOC_SH_GOT_MEDHI16, + BFD_RELOC_SH_GOT_HI16, + BFD_RELOC_SH_GOTPLT_LOW16, + BFD_RELOC_SH_GOTPLT_MEDLOW16, + BFD_RELOC_SH_GOTPLT_MEDHI16, + BFD_RELOC_SH_GOTPLT_HI16, + BFD_RELOC_SH_PLT_LOW16, + BFD_RELOC_SH_PLT_MEDLOW16, + BFD_RELOC_SH_PLT_MEDHI16, + BFD_RELOC_SH_PLT_HI16, + BFD_RELOC_SH_GOTOFF_LOW16, + BFD_RELOC_SH_GOTOFF_MEDLOW16, + BFD_RELOC_SH_GOTOFF_MEDHI16, + BFD_RELOC_SH_GOTOFF_HI16, + BFD_RELOC_SH_GOTPC_LOW16, + BFD_RELOC_SH_GOTPC_MEDLOW16, + BFD_RELOC_SH_GOTPC_MEDHI16, + BFD_RELOC_SH_GOTPC_HI16, + BFD_RELOC_SH_COPY64, + BFD_RELOC_SH_GLOB_DAT64, + BFD_RELOC_SH_JMP_SLOT64, + BFD_RELOC_SH_RELATIVE64, + BFD_RELOC_SH_GOT10BY4, + BFD_RELOC_SH_GOT10BY8, + BFD_RELOC_SH_GOTPLT10BY4, + BFD_RELOC_SH_GOTPLT10BY8, + BFD_RELOC_SH_GOTPLT32, + BFD_RELOC_SH_SHMEDIA_CODE, + BFD_RELOC_SH_IMMU5, + BFD_RELOC_SH_IMMS6, + BFD_RELOC_SH_IMMS6BY32, + BFD_RELOC_SH_IMMU6, + BFD_RELOC_SH_IMMS10, + BFD_RELOC_SH_IMMS10BY2, + BFD_RELOC_SH_IMMS10BY4, + BFD_RELOC_SH_IMMS10BY8, + BFD_RELOC_SH_IMMS16, + BFD_RELOC_SH_IMMU16, + BFD_RELOC_SH_IMM_LOW16, + BFD_RELOC_SH_IMM_LOW16_PCREL, + BFD_RELOC_SH_IMM_MEDLOW16, + BFD_RELOC_SH_IMM_MEDLOW16_PCREL, + BFD_RELOC_SH_IMM_MEDHI16, + BFD_RELOC_SH_IMM_MEDHI16_PCREL, + BFD_RELOC_SH_IMM_HI16, + BFD_RELOC_SH_IMM_HI16_PCREL, + BFD_RELOC_SH_PT_16, /* Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must be zero and is not stored in the instruction. */ @@ -2448,6 +2576,15 @@ of the container. */ /* This is a 32-bit pc-relative reloc. */ BFD_RELOC_D30V_32_PCREL, +/* DLX relocs */ + BFD_RELOC_DLX_HI16_S, + +/* DLX relocs */ + BFD_RELOC_DLX_LO16, + +/* DLX relocs */ + BFD_RELOC_DLX_JMP26, + /* Mitsubishi M32R relocs. This is a 24 bit absolute address. */ BFD_RELOC_M32R_24, @@ -2531,6 +2668,14 @@ bits placed non-contigously in the instruction. */ /* This is a 16 bit offset from the call table base pointer. */ BFD_RELOC_V850_CALLT_16_16_OFFSET, +/* Used for relaxing indirect function calls. */ + BFD_RELOC_V850_LONGCALL, + +/* Used for relaxing indirect jumps. */ + BFD_RELOC_V850_LONGJUMP, + +/* Used to maintain alignment whilst relaxing. */ + BFD_RELOC_V850_ALIGN, /* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the instruction. */ @@ -2774,6 +2919,40 @@ into 22 bits. */ /* 32 bit rel. offset to GOT entry. */ BFD_RELOC_390_GOTENT, +/* Scenix IP2K - 9-bit register number / data address */ + BFD_RELOC_IP2K_FR9, + +/* Scenix IP2K - 4-bit register/data bank number */ + BFD_RELOC_IP2K_BANK, + +/* Scenix IP2K - low 13 bits of instruction word address */ + BFD_RELOC_IP2K_ADDR16CJP, + +/* Scenix IP2K - high 3 bits of instruction word address */ + BFD_RELOC_IP2K_PAGE3, + +/* Scenix IP2K - ext/low/high 8 bits of data address */ + BFD_RELOC_IP2K_LO8DATA, + BFD_RELOC_IP2K_HI8DATA, + BFD_RELOC_IP2K_EX8DATA, + +/* Scenix IP2K - low/high 8 bits of instruction word address */ + BFD_RELOC_IP2K_LO8INSN, + BFD_RELOC_IP2K_HI8INSN, + +/* Scenix IP2K - even/odd PC modifier to modify snb pcl.0 */ + BFD_RELOC_IP2K_PC_SKIP, + +/* Scenix IP2K - 16 bit word address in text section. */ + BFD_RELOC_IP2K_TEXT, + +/* Scenix IP2K - 7-bit sp or dp offset */ + BFD_RELOC_IP2K_FR_OFFSET, + +/* Scenix VPE4K coprocessor - data/insn-space addressing */ + BFD_RELOC_VPE4KMATH_DATA, + BFD_RELOC_VPE4KMATH_INSN, + /* These two relocations are used by the linker to determine which of the entries in a C++ virtual function table are actually used. When the --gc-sections option is given, the linker will zero out the entries @@ -2855,25 +3034,69 @@ this offset in the reloc's section offset. */ BFD_RELOC_IA64_IPLTMSB, BFD_RELOC_IA64_IPLTLSB, BFD_RELOC_IA64_COPY, + BFD_RELOC_IA64_LTOFF22X, + BFD_RELOC_IA64_LDXMOV, + BFD_RELOC_IA64_TPREL14, BFD_RELOC_IA64_TPREL22, + BFD_RELOC_IA64_TPREL64I, BFD_RELOC_IA64_TPREL64MSB, BFD_RELOC_IA64_TPREL64LSB, - BFD_RELOC_IA64_LTOFF_TP22, - BFD_RELOC_IA64_LTOFF22X, - BFD_RELOC_IA64_LDXMOV, + BFD_RELOC_IA64_LTOFF_TPREL22, + BFD_RELOC_IA64_DTPMOD64MSB, + BFD_RELOC_IA64_DTPMOD64LSB, + BFD_RELOC_IA64_LTOFF_DTPMOD22, + BFD_RELOC_IA64_DTPREL14, + BFD_RELOC_IA64_DTPREL22, + BFD_RELOC_IA64_DTPREL64I, + BFD_RELOC_IA64_DTPREL32MSB, + BFD_RELOC_IA64_DTPREL32LSB, + BFD_RELOC_IA64_DTPREL64MSB, + BFD_RELOC_IA64_DTPREL64LSB, + BFD_RELOC_IA64_LTOFF_DTPREL22, /* Motorola 68HC11 reloc. -This is the 8 bits high part of an absolute address. */ +This is the 8 bit high part of an absolute address. */ BFD_RELOC_M68HC11_HI8, /* Motorola 68HC11 reloc. -This is the 8 bits low part of an absolute address. */ +This is the 8 bit low part of an absolute address. */ BFD_RELOC_M68HC11_LO8, /* Motorola 68HC11 reloc. -This is the 3 bits of a value. */ +This is the 3 bit of a value. */ BFD_RELOC_M68HC11_3B, +/* Motorola 68HC11 reloc. +This reloc marks the beginning of a jump/call instruction. +It is used for linker relaxation to correctly identify beginning +of instruction and change some branchs to use PC-relative +addressing mode. */ + BFD_RELOC_M68HC11_RL_JUMP, + +/* Motorola 68HC11 reloc. +This reloc marks a group of several instructions that gcc generates +and for which the linker relaxation pass can modify and/or remove +some of them. */ + BFD_RELOC_M68HC11_RL_GROUP, + +/* Motorola 68HC11 reloc. +This is the 16-bit lower part of an address. It is used for 'call' +instruction to specify the symbol address without any special +transformation (due to memory bank window). */ + BFD_RELOC_M68HC11_LO16, + +/* Motorola 68HC11 reloc. +This is a 8-bit reloc that specifies the page number of an address. +It is used by 'call' instruction to specify the page number of +the symbol. */ + BFD_RELOC_M68HC11_PAGE, + +/* Motorola 68HC11 reloc. +This is a 24-bit reloc that represents the address with a 16-bit +value and a 8-bit page number. The symbol address is transformed +to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */ + BFD_RELOC_M68HC11_24, + /* These relocs are only used within the CRIS assembler. They are not (at present) written to any object files. */ BFD_RELOC_CRIS_BDISP8, @@ -2958,6 +3181,11 @@ This is the 3 bits of a value. */ BFD_RELOC_XSTORMY16_REL_12, BFD_RELOC_XSTORMY16_24, BFD_RELOC_XSTORMY16_FPTR16, + +/* Relocations used by VAX ELF. */ + BFD_RELOC_VAX_GLOB_DAT, + BFD_RELOC_VAX_JMP_SLOT, + BFD_RELOC_VAX_RELATIVE, BFD_RELOC_UNUSED }; typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; reloc_howto_type * @@ -2966,6 +3194,7 @@ bfd_reloc_type_lookup PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); const char * bfd_get_reloc_code_name PARAMS ((bfd_reloc_code_real_type code)); +/* Extracted from syms.c. */ typedef struct symbol_cache_entry { @@ -3071,6 +3300,9 @@ typedef struct symbol_cache_entry as well. */ #define BSF_DEBUGGING_RELOC 0x20000 + /* This symbol is thread local. Used in ELF. */ +#define BSF_THREAD_LOCAL 0x40000 + flagword flags; /* A pointer to the section to which this symbol is @@ -3135,6 +3367,7 @@ bfd_copy_private_symbol_data PARAMS ((bfd *ibfd, asymbol *isym, bfd *obfd, asymb BFD_SEND (obfd, _bfd_copy_private_symbol_data, \ (ibfd, isymbol, obfd, osymbol)) +/* Extracted from bfd.c. */ struct _bfd { /* The filename the application opened the BFD with. */ @@ -3434,12 +3667,21 @@ bfd_set_private_flags PARAMS ((bfd *abfd, flagword flags)); #define bfd_merge_sections(abfd, link_info) \ BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info)) +#define bfd_discard_group(abfd, sec) \ + BFD_SEND (abfd, _bfd_discard_group, (abfd, sec)) + #define bfd_link_hash_table_create(abfd) \ BFD_SEND (abfd, _bfd_link_hash_table_create, (abfd)) +#define bfd_link_hash_table_free(abfd, hash) \ + BFD_SEND (abfd, _bfd_link_hash_table_free, (hash)) + #define bfd_link_add_symbols(abfd, info) \ BFD_SEND (abfd, _bfd_link_add_symbols, (abfd, info)) +#define bfd_link_just_syms(sec, info) \ + BFD_SEND (abfd, _bfd_link_just_syms, (sec, info)) + #define bfd_final_link(abfd, info) \ BFD_SEND (abfd, _bfd_final_link, (abfd, info)) @@ -3467,8 +3709,9 @@ extern bfd_byte *bfd_get_relocated_section_contents boolean, asymbol **)); boolean -bfd_alt_mach_code PARAMS ((bfd *abfd, int index)); +bfd_alt_mach_code PARAMS ((bfd *abfd, int alternative)); +/* Extracted from archive.c. */ symindex bfd_get_next_mapent PARAMS ((bfd *abfd, symindex previous, carsym **sym)); @@ -3478,6 +3721,7 @@ bfd_set_archive_head PARAMS ((bfd *output, bfd *new_head)); bfd * bfd_openr_next_archived_file PARAMS ((bfd *archive, bfd *previous)); +/* Extracted from corefile.c. */ const char * bfd_core_file_failing_command PARAMS ((bfd *abfd)); @@ -3487,6 +3731,7 @@ bfd_core_file_failing_signal PARAMS ((bfd *abfd)); boolean core_file_matches_executable_p PARAMS ((bfd *core_bfd, bfd *exec_bfd)); +/* Extracted from targets.c. */ #define BFD_SEND(bfd, message, arglist) \ ((*((bfd)->xvec->message)) arglist) @@ -3762,11 +4007,14 @@ CONCAT2 (NAME,_sizeof_headers), \ CONCAT2 (NAME,_bfd_get_relocated_section_contents), \ CONCAT2 (NAME,_bfd_relax_section), \ CONCAT2 (NAME,_bfd_link_hash_table_create), \ +CONCAT2 (NAME,_bfd_link_hash_table_free), \ CONCAT2 (NAME,_bfd_link_add_symbols), \ +CONCAT2 (NAME,_bfd_link_just_syms), \ CONCAT2 (NAME,_bfd_final_link), \ CONCAT2 (NAME,_bfd_link_split_section), \ CONCAT2 (NAME,_bfd_gc_sections), \ -CONCAT2 (NAME,_bfd_merge_sections) +CONCAT2 (NAME,_bfd_merge_sections), \ +CONCAT2 (NAME,_bfd_discard_group) int (*_bfd_sizeof_headers) PARAMS ((bfd *, boolean)); bfd_byte *(*_bfd_get_relocated_section_contents) PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *, @@ -3779,9 +4027,15 @@ CONCAT2 (NAME,_bfd_merge_sections) different information in this table. */ struct bfd_link_hash_table *(*_bfd_link_hash_table_create) PARAMS ((bfd *)); + /* Release the memory associated with the linker hash table. */ + void (*_bfd_link_hash_table_free) PARAMS ((struct bfd_link_hash_table *)); + /* Add symbols from this object file into the hash table. */ boolean (*_bfd_link_add_symbols) PARAMS ((bfd *, struct bfd_link_info *)); + /* Indicate that we are only retrieving symbol values from this section. */ + void (*_bfd_link_just_syms) PARAMS ((asection *, struct bfd_link_info *)); + /* Do a link based on the link_order structures attached to each section of the BFD. */ boolean (*_bfd_final_link) PARAMS ((bfd *, struct bfd_link_info *)); @@ -3795,6 +4049,9 @@ CONCAT2 (NAME,_bfd_merge_sections) /* Attempt to merge SEC_MERGE sections. */ boolean (*_bfd_merge_sections) PARAMS ((bfd *, struct bfd_link_info *)); + /* Discard members of a group. */ + boolean (*_bfd_discard_group) PARAMS ((bfd *, struct sec *)); + /* Routines to handle dynamic symbols and relocs. */ #define BFD_JUMP_TABLE_DYNAMIC(NAME) \ CONCAT2 (NAME,_get_dynamic_symtab_upper_bound), \ @@ -3833,6 +4090,7 @@ bfd_target_list PARAMS ((void)); const bfd_target * bfd_search_for_target PARAMS ((int (* search_func) (const bfd_target *, void *), void *)); +/* Extracted from format.c. */ boolean bfd_check_format PARAMS ((bfd *abfd, bfd_format format));