X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=bfd%2Fbfd-in2.h;h=e94e3c849d9f4a232e874557590a02122973c740;hb=18498503409294889b1a7e9a5b5d53a959c6c915;hp=9cf4f643449f405e893e155196236be38c948025;hpb=4b544b64681eec335bef3d3383772a7a38278fa9;p=deliverable%2Fbinutils-gdb.git diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 9cf4f64344..e94e3c849d 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -7,9 +7,9 @@ /* Main header file for the bfd library -- portable access to object files. - Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 - Free Software Foundation, Inc. + Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, + 2012 Free Software Foundation, Inc. Contributed by Cygnus Support. @@ -32,12 +32,19 @@ #ifndef __BFD_H_SEEN__ #define __BFD_H_SEEN__ +/* PR 14072: Ensure that config.h is included first. */ +#if !defined PACKAGE && !defined PACKAGE_VERSION +#error config.h must be included before this header +#endif + #ifdef __cplusplus extern "C" { #endif #include "ansidecl.h" #include "symcat.h" +#include + #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) #ifndef SABER /* This hack is to avoid a problem with some strict ANSI C preprocessors. @@ -278,18 +285,19 @@ alent; typedef struct bfd_section *sec_ptr; -#define bfd_get_section_name(bfd, ptr) ((ptr)->name + 0) -#define bfd_get_section_vma(bfd, ptr) ((ptr)->vma + 0) -#define bfd_get_section_lma(bfd, ptr) ((ptr)->lma + 0) -#define bfd_get_section_alignment(bfd, ptr) ((ptr)->alignment_power + 0) +#define bfd_get_section_name(bfd, ptr) ((void) bfd, (ptr)->name) +#define bfd_get_section_vma(bfd, ptr) ((void) bfd, (ptr)->vma) +#define bfd_get_section_lma(bfd, ptr) ((void) bfd, (ptr)->lma) +#define bfd_get_section_alignment(bfd, ptr) ((void) bfd, \ + (ptr)->alignment_power) #define bfd_section_name(bfd, ptr) ((ptr)->name) #define bfd_section_size(bfd, ptr) ((ptr)->size) #define bfd_get_section_size(ptr) ((ptr)->size) #define bfd_section_vma(bfd, ptr) ((ptr)->vma) #define bfd_section_lma(bfd, ptr) ((ptr)->lma) #define bfd_section_alignment(bfd, ptr) ((ptr)->alignment_power) -#define bfd_get_section_flags(bfd, ptr) ((ptr)->flags + 0) -#define bfd_get_section_userdata(bfd, ptr) ((ptr)->userdata) +#define bfd_get_section_flags(bfd, ptr) ((void) bfd, (ptr)->flags) +#define bfd_get_section_userdata(bfd, ptr) ((void) bfd, (ptr)->userdata) #define bfd_is_com_section(ptr) (((ptr)->flags & SEC_IS_COMMON) != 0) @@ -298,18 +306,15 @@ typedef struct bfd_section *sec_ptr; #define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),TRUE) /* Find the address one past the end of SEC. */ #define bfd_get_section_limit(bfd, sec) \ - (((sec)->rawsize ? (sec)->rawsize : (sec)->size) \ - / bfd_octets_per_byte (bfd)) + (((bfd)->direction != write_direction && (sec)->rawsize != 0 \ + ? (sec)->rawsize : (sec)->size) / bfd_octets_per_byte (bfd)) /* Return TRUE if input section SEC has been discarded. */ -#define elf_discarded_section(sec) \ +#define discarded_section(sec) \ (!bfd_is_abs_section (sec) \ && bfd_is_abs_section ((sec)->output_section) \ - && (sec)->sec_info_type != ELF_INFO_TYPE_MERGE \ - && (sec)->sec_info_type != ELF_INFO_TYPE_JUST_SYMS) - -/* Forward define. */ -struct stat; + && (sec)->sec_info_type != SEC_INFO_TYPE_MERGE \ + && (sec)->sec_info_type != SEC_INFO_TYPE_JUST_SYMS) typedef enum bfd_print_symbol { @@ -411,6 +416,10 @@ extern struct bfd_hash_entry *bfd_hash_lookup extern struct bfd_hash_entry *bfd_hash_insert (struct bfd_hash_table *, const char *, unsigned long); +/* Rename an entry in a hash table. */ +extern void bfd_hash_rename + (struct bfd_hash_table *, const char *, struct bfd_hash_entry *); + /* Replace an entry in a hash table. */ extern void bfd_hash_replace (struct bfd_hash_table *, struct bfd_hash_entry *old, @@ -435,7 +444,7 @@ extern void bfd_hash_traverse /* Allows the default size of a hash table to be configured. New hash tables allocated using bfd_hash_table_init will be created with this size. */ -extern void bfd_hash_set_default_size (bfd_size_type); +extern unsigned long bfd_hash_set_default_size (unsigned long); /* This structure is used to keep track of stabs in sections information while linking. */ @@ -555,11 +564,6 @@ void bfd_putl16 (bfd_vma, void *); bfd_uint64_t bfd_get_bits (const void *, int, bfd_boolean); void bfd_put_bits (bfd_uint64_t, void *, int, bfd_boolean); -extern bfd_boolean bfd_section_already_linked_table_init (void); -extern void bfd_section_already_linked_table_free (void); - -/* Externally visible ECOFF routines. */ - #if defined(__STDC__) || defined(ALMOST_STDC) struct ecoff_debug_info; struct ecoff_debug_swap; @@ -567,8 +571,18 @@ struct ecoff_extr; struct bfd_symbol; struct bfd_link_info; struct bfd_link_hash_entry; +struct bfd_section_already_linked; struct bfd_elf_version_tree; #endif + +extern bfd_boolean bfd_section_already_linked_table_init (void); +extern void bfd_section_already_linked_table_free (void); +extern bfd_boolean _bfd_handle_already_linked + (struct bfd_section *, struct bfd_section_already_linked *, + struct bfd_link_info *); + +/* Externally visible ECOFF routines. */ + extern bfd_vma bfd_ecoff_get_gp_value (bfd * abfd); extern bfd_boolean bfd_ecoff_set_gp_value @@ -641,10 +655,11 @@ extern struct bfd_link_needed_list *bfd_elf_get_needed_list (bfd *, struct bfd_link_info *); extern bfd_boolean bfd_elf_get_bfd_needed_list (bfd *, struct bfd_link_needed_list **); +extern bfd_boolean bfd_elf_stack_segment_size (bfd *, struct bfd_link_info *, + const char *, bfd_vma); extern bfd_boolean bfd_elf_size_dynamic_sections (bfd *, const char *, const char *, const char *, const char *, const char *, - const char * const *, struct bfd_link_info *, struct bfd_section **, - struct bfd_elf_version_tree *); + const char * const *, struct bfd_link_info *, struct bfd_section **); extern bfd_boolean bfd_elf_size_dynsym_hash_dynstr (bfd *, struct bfd_link_info *); extern void bfd_elf_set_dt_needed_name @@ -692,19 +707,15 @@ extern int bfd_get_elf_phdrs the remote memory. */ extern bfd *bfd_elf_bfd_from_remote_memory (bfd *templ, bfd_vma ehdr_vma, bfd_vma *loadbasep, - int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, int len)); - -/* Return the arch_size field of an elf bfd, or -1 if not elf. */ -extern int bfd_get_arch_size - (bfd *); - -/* Return TRUE if address "naturally" sign extends, or -1 if not elf. */ -extern int bfd_get_sign_extend_vma - (bfd *); + int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, + bfd_size_type len)); extern struct bfd_section *_bfd_elf_tls_setup (bfd *, struct bfd_link_info *); +extern struct bfd_section * +_bfd_nearby_section (bfd *, struct bfd_section *, bfd_vma); + extern void _bfd_fix_excluded_sec_syms (bfd *, struct bfd_link_info *); @@ -872,7 +883,7 @@ extern bfd_boolean bfd_elf32_arm_process_before_allocation void bfd_elf32_arm_set_target_relocs (bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix, - int, int, int, int); + int, int, int, int, int); extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking (bfd *, struct bfd_link_info *); @@ -913,7 +924,11 @@ extern bfd_boolean elf32_arm_build_stubs /* ARM unwind section editing support. */ extern bfd_boolean elf32_arm_fix_exidx_coverage - (struct bfd_section **, unsigned int, struct bfd_link_info *); +(struct bfd_section **, unsigned int, struct bfd_link_info *, bfd_boolean); + +/* C6x unwind section editing support. */ +extern bfd_boolean elf32_tic6x_fix_exidx_coverage +(struct bfd_section **, unsigned int, struct bfd_link_info *, bfd_boolean); /* PowerPC @tls opcode transform/validate. */ extern unsigned int _bfd_elf_ppc_at_tls_transform @@ -922,6 +937,32 @@ extern unsigned int _bfd_elf_ppc_at_tls_transform extern unsigned int _bfd_elf_ppc_at_tprel_transform (unsigned int, unsigned int); +extern void bfd_elf64_aarch64_init_maps + (bfd *); + +void bfd_elf64_aarch64_set_options + (bfd *, struct bfd_link_info *, int, int, int); + +/* ELF AArch64 mapping symbol support. */ +#define BFD_AARCH64_SPECIAL_SYM_TYPE_MAP (1 << 0) +#define BFD_AARCH64_SPECIAL_SYM_TYPE_TAG (1 << 1) +#define BFD_AARCH64_SPECIAL_SYM_TYPE_OTHER (1 << 2) +#define BFD_AARCH64_SPECIAL_SYM_TYPE_ANY (~0) +extern bfd_boolean bfd_is_aarch64_special_symbol_name + (const char * name, int type); + +/* AArch64 stub generation support. Called from the linker. */ +extern int elf64_aarch64_setup_section_lists + (bfd *, struct bfd_link_info *); +extern void elf64_aarch64_next_input_section + (struct bfd_link_info *, struct bfd_section *); +extern bfd_boolean elf64_aarch64_size_stubs + (bfd *, bfd *, struct bfd_link_info *, bfd_signed_vma, + struct bfd_section * (*) (const char *, struct bfd_section *), + void (*) (void)); +extern bfd_boolean elf64_aarch64_build_stubs + (struct bfd_link_info *); + /* TI COFF load page support. */ extern void bfd_ticoff_set_section_load_page (struct bfd_section *, int); @@ -964,6 +1005,7 @@ extern struct coff_comdat_info *bfd_coff_get_comdat_section void bfd_init (void); /* Extracted from opncls.c. */ +extern unsigned int bfd_use_reserved_id; bfd *bfd_fopen (const char *filename, const char *target, const char *mode, int fd); @@ -1000,6 +1042,10 @@ bfd_boolean bfd_make_writable (bfd *abfd); bfd_boolean bfd_make_readable (bfd *abfd); +void *bfd_alloc (bfd *abfd, bfd_size_type wanted); + +void *bfd_zalloc (bfd *abfd, bfd_size_type wanted); + unsigned long bfd_calc_gnu_debuglink_crc32 (unsigned long crc, const unsigned char *buf, bfd_size_type len); @@ -1020,9 +1066,9 @@ bfd_boolean bfd_fill_in_gnu_debuglink_section #define bfd_put_signed_8 \ bfd_put_8 #define bfd_get_8(abfd, ptr) \ - (*(unsigned char *) (ptr) & 0xff) + (*(const unsigned char *) (ptr) & 0xff) #define bfd_get_signed_8(abfd, ptr) \ - (((*(unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80) + (((*(const unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80) #define bfd_put_16(abfd, val, ptr) \ BFD_SEND (abfd, bfd_putx16, ((val),(ptr))) @@ -1130,7 +1176,8 @@ long bfd_get_mtime (bfd *abfd); file_ptr bfd_get_size (bfd *abfd); void *bfd_mmap (bfd *abfd, void *addr, bfd_size_type len, - int prot, int flags, file_ptr offset); + int prot, int flags, file_ptr offset, + void **map_addr, bfd_size_type *map_len); /* Extracted from bfdwin.c. */ /* Extracted from section.c. */ @@ -1311,6 +1358,11 @@ typedef struct bfd_section sections. */ #define SEC_COFF_SHARED_LIBRARY 0x4000000 + /* This input section should be copied to output in reverse order + as an array of pointers. This is for ELF linker internal use + only. */ +#define SEC_ELF_REVERSE_COPY 0x4000000 + /* This section contains data which may be shared with other executables or shared objects. This is for COFF only. */ #define SEC_COFF_SHARED 0x8000000 @@ -1348,6 +1400,12 @@ typedef struct bfd_section /* Mark flag used by some linker backends for garbage collection. */ unsigned int gc_mark : 1; + /* Section compression status. */ + unsigned int compress_status : 2; +#define COMPRESS_SECTION_NONE 0 +#define COMPRESS_SECTION_DONE 1 +#define DECOMPRESS_SECTION_SIZED 2 + /* The following flags are used by the ELF linker. */ /* Mark sections which have been allocated to segments. */ @@ -1355,11 +1413,11 @@ typedef struct bfd_section /* Type of sec_info information. */ unsigned int sec_info_type:3; -#define ELF_INFO_TYPE_NONE 0 -#define ELF_INFO_TYPE_STABS 1 -#define ELF_INFO_TYPE_MERGE 2 -#define ELF_INFO_TYPE_EH_FRAME 3 -#define ELF_INFO_TYPE_JUST_SYMS 4 +#define SEC_INFO_TYPE_NONE 0 +#define SEC_INFO_TYPE_STABS 1 +#define SEC_INFO_TYPE_MERGE 2 +#define SEC_INFO_TYPE_EH_FRAME 3 +#define SEC_INFO_TYPE_JUST_SYMS 4 /* Nonzero if this section uses RELA relocations, rather than REL. */ unsigned int use_rela_p:1; @@ -1404,6 +1462,9 @@ typedef struct bfd_section section size calculated on a previous linker relaxation pass. */ bfd_size_type rawsize; + /* The compressed size of the section in octets. */ + bfd_size_type compressed_size; + /* Relaxation table. */ struct relax_table *relax; @@ -1513,28 +1574,25 @@ struct relax_table { /* These sections are global, and are managed by BFD. The application and target back end are not permitted to change the values in - these sections. New code should use the section_ptr macros rather - than referring directly to the const sections. The const sections - may eventually vanish. */ + these sections. */ +extern asection std_section[4]; + #define BFD_ABS_SECTION_NAME "*ABS*" #define BFD_UND_SECTION_NAME "*UND*" #define BFD_COM_SECTION_NAME "*COM*" #define BFD_IND_SECTION_NAME "*IND*" -/* The absolute section. */ -extern asection bfd_abs_section; -#define bfd_abs_section_ptr ((asection *) &bfd_abs_section) -#define bfd_is_abs_section(sec) ((sec) == bfd_abs_section_ptr) -/* Pointer to the undefined section. */ -extern asection bfd_und_section; -#define bfd_und_section_ptr ((asection *) &bfd_und_section) -#define bfd_is_und_section(sec) ((sec) == bfd_und_section_ptr) /* Pointer to the common section. */ -extern asection bfd_com_section; -#define bfd_com_section_ptr ((asection *) &bfd_com_section) +#define bfd_com_section_ptr (&std_section[0]) +/* Pointer to the undefined section. */ +#define bfd_und_section_ptr (&std_section[1]) +/* Pointer to the absolute section. */ +#define bfd_abs_section_ptr (&std_section[2]) /* Pointer to the indirect section. */ -extern asection bfd_ind_section; -#define bfd_ind_section_ptr ((asection *) &bfd_ind_section) +#define bfd_ind_section_ptr (&std_section[3]) + +#define bfd_is_und_section(sec) ((sec) == bfd_und_section_ptr) +#define bfd_is_abs_section(sec) ((sec) == bfd_abs_section_ptr) #define bfd_is_ind_section(sec) ((sec) == bfd_ind_section_ptr) #define bfd_is_const_section(SEC) \ @@ -1637,20 +1695,20 @@ extern asection bfd_ind_section; /* name, id, index, next, prev, flags, user_set_vma, */ \ { NAME, IDX, 0, NULL, NULL, FLAGS, 0, \ \ - /* linker_mark, linker_has_input, gc_mark, segment_mark, */ \ + /* linker_mark, linker_has_input, gc_mark, decompress_status, */ \ 0, 0, 1, 0, \ \ - /* sec_info_type, use_rela_p, */ \ - 0, 0, \ + /* segment_mark, sec_info_type, use_rela_p, */ \ + 0, 0, 0, \ \ /* sec_flg0, sec_flg1, sec_flg2, sec_flg3, sec_flg4, sec_flg5, */ \ 0, 0, 0, 0, 0, 0, \ \ - /* vma, lma, size, rawsize, relax, relax_count, */ \ - 0, 0, 0, 0, 0, 0, \ + /* vma, lma, size, rawsize, compressed_size, relax, relax_count, */ \ + 0, 0, 0, 0, 0, 0, 0, \ \ - /* output_offset, output_section, alignment_power, */ \ - 0, (struct bfd_section *) &SEC, 0, \ + /* output_offset, output_section, alignment_power, */ \ + 0, &SEC, 0, \ \ /* relocation, orelocation, reloc_count, filepos, rel_filepos, */ \ NULL, NULL, 0, 0, 0, \ @@ -1675,6 +1733,10 @@ void bfd_section_list_clear (bfd *); asection *bfd_get_section_by_name (bfd *abfd, const char *name); +asection *bfd_get_next_section_by_name (asection *sec); + +asection *bfd_get_linker_section (bfd *abfd, const char *name); + asection *bfd_get_section_by_name_if (bfd *abfd, const char *name, @@ -1699,6 +1761,9 @@ asection *bfd_make_section (bfd *, const char *name); bfd_boolean bfd_set_section_flags (bfd *abfd, asection *sec, flagword flags); +void bfd_rename_section + (bfd *abfd, asection *sec, const char *newname); + void bfd_map_over_sections (bfd *abfd, void (*func) (bfd *abfd, asection *sect, void *obj), @@ -1839,22 +1904,32 @@ enum bfd_architecture #define bfd_mach_mips5 5 #define bfd_mach_mips_loongson_2e 3001 #define bfd_mach_mips_loongson_2f 3002 +#define bfd_mach_mips_loongson_3a 3003 #define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */ #define bfd_mach_mips_octeon 6501 +#define bfd_mach_mips_octeonp 6601 +#define bfd_mach_mips_octeon2 6502 #define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */ #define bfd_mach_mipsisa32 32 #define bfd_mach_mipsisa32r2 33 #define bfd_mach_mipsisa64 64 #define bfd_mach_mipsisa64r2 65 +#define bfd_mach_mips_micromips 96 bfd_arch_i386, /* Intel 386 */ -#define bfd_mach_i386_i386 1 -#define bfd_mach_i386_i8086 2 -#define bfd_mach_i386_i386_intel_syntax 3 -#define bfd_mach_x86_64 64 -#define bfd_mach_x86_64_intel_syntax 65 +#define bfd_mach_i386_intel_syntax (1 << 0) +#define bfd_mach_i386_i8086 (1 << 1) +#define bfd_mach_i386_i386 (1 << 2) +#define bfd_mach_x86_64 (1 << 3) +#define bfd_mach_x64_32 (1 << 4) +#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax) +#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax) +#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax) bfd_arch_l1om, /* Intel L1OM */ -#define bfd_mach_l1om 66 -#define bfd_mach_l1om_intel_syntax 67 +#define bfd_mach_l1om (1 << 5) +#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax) + bfd_arch_k1om, /* Intel K1OM */ +#define bfd_mach_k1om (1 << 6) +#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax) bfd_arch_we32k, /* AT&T WE32xxx */ bfd_arch_tahoe, /* CCI/Harris Tahoe */ bfd_arch_i860, /* Intel 860 */ @@ -1897,7 +1972,10 @@ enum bfd_architecture #define bfd_mach_ppc_e500 500 #define bfd_mach_ppc_e500mc 5001 #define bfd_mach_ppc_e500mc64 5005 +#define bfd_mach_ppc_e5500 5006 +#define bfd_mach_ppc_e6500 5007 #define bfd_mach_ppc_titan 83 +#define bfd_mach_ppc_vle 84 bfd_arch_rs6000, /* IBM RS/6000 */ #define bfd_mach_rs6k 6000 #define bfd_mach_rs6k_rs1 6001 @@ -1919,6 +1997,8 @@ enum bfd_architecture #define bfd_mach_m6812_default 0 #define bfd_mach_m6812 1 #define bfd_mach_m6812s 2 + bfd_arch_m9s12x, /* Freescale S12X */ + bfd_arch_m9s12xg, /* Freescale XGATE */ bfd_arch_z8k, /* Zilog Z8000 */ #define bfd_mach_z8001 1 #define bfd_mach_z8002 2 @@ -1977,6 +2057,8 @@ enum bfd_architecture #define bfd_mach_v850 1 #define bfd_mach_v850e 'E' #define bfd_mach_v850e1 '1' +#define bfd_mach_v850e2 0x4532 +#define bfd_mach_v850e2v3 0x45325633 bfd_arch_arc, /* ARC Cores */ #define bfd_mach_arc_5 5 #define bfd_mach_arc_6 6 @@ -2021,6 +2103,9 @@ enum bfd_architecture bfd_arch_iq2000, /* Vitesse IQ2000. */ #define bfd_mach_iq2000 1 #define bfd_mach_iq10 2 + bfd_arch_epiphany, /* Adapteva EPIPHANY */ +#define bfd_mach_epiphany16 1 +#define bfd_mach_epiphany32 2 bfd_arch_mt, #define bfd_mach_ms1 1 #define bfd_mach_mrisc2 2 @@ -2037,6 +2122,13 @@ enum bfd_architecture #define bfd_mach_avr5 5 #define bfd_mach_avr51 51 #define bfd_mach_avr6 6 +#define bfd_mach_avrxmega1 101 +#define bfd_mach_avrxmega2 102 +#define bfd_mach_avrxmega3 103 +#define bfd_mach_avrxmega4 104 +#define bfd_mach_avrxmega5 105 +#define bfd_mach_avrxmega6 106 +#define bfd_mach_avrxmega7 107 bfd_arch_bfin, /* ADI Blackfin */ #define bfd_mach_bfin 1 bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */ @@ -2049,6 +2141,8 @@ enum bfd_architecture #define bfd_mach_cris_v0_v10 255 #define bfd_mach_cris_v32 32 #define bfd_mach_cris_v10_v32 1032 + bfd_arch_rl78, +#define bfd_mach_rl78 0x75 bfd_arch_rx, /* Renesas RX. */ #define bfd_mach_rx 0x75 bfd_arch_s390, /* IBM s390 */ @@ -2080,12 +2174,11 @@ enum bfd_architecture bfd_arch_xc16x, /* Infineon's XC16X Series. */ #define bfd_mach_xc16x 1 #define bfd_mach_xc16xl 2 -#define bfd_mach_xc16xs 3 +#define bfd_mach_xc16xs 3 + bfd_arch_xgate, /* Freescale XGATE */ +#define bfd_mach_xgate 1 bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ #define bfd_mach_xtensa 1 - bfd_arch_maxq, /* Dallas MAXQ 10/20 */ -#define bfd_mach_maxq10 10 -#define bfd_mach_maxq20 20 bfd_arch_z80, #define bfd_mach_z80strict 1 /* No undocumented opcodes. */ #define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */ @@ -2094,6 +2187,13 @@ enum bfd_architecture bfd_arch_lm32, /* Lattice Mico32 */ #define bfd_mach_lm32 1 bfd_arch_microblaze,/* Xilinx MicroBlaze. */ + bfd_arch_tilepro, /* Tilera TILEPro */ + bfd_arch_tilegx, /* Tilera TILE-Gx */ +#define bfd_mach_tilepro 1 +#define bfd_mach_tilegx 1 +#define bfd_mach_tilegx32 2 + bfd_arch_aarch64, /* AArch64 */ +#define bfd_mach_aarch64 0 bfd_arch_last }; @@ -2116,6 +2216,12 @@ typedef struct bfd_arch_info bfd_boolean (*scan) (const struct bfd_arch_info *, const char *); + /* Allocate via bfd_malloc and return a fill buffer of size COUNT. If + IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is + TRUE, the buffer contains code. */ + void *(*fill) (bfd_size_type count, bfd_boolean is_bigendian, + bfd_boolean code); + const struct bfd_arch_info *next; } bfd_arch_info_type; @@ -2526,6 +2632,10 @@ relocation types already defined. */ BFD_RELOC_SPARC_M44, BFD_RELOC_SPARC_L44, BFD_RELOC_SPARC_REGISTER, + BFD_RELOC_SPARC_H34, + BFD_RELOC_SPARC_SIZE32, + BFD_RELOC_SPARC_SIZE64, + BFD_RELOC_SPARC_WDISP10, /* SPARC little endian relocation */ BFD_RELOC_SPARC_REV32, @@ -2673,9 +2783,9 @@ between two procedure entry points is < 2^21, or else a hint. */ BFD_RELOC_ALPHA_TPREL_LO16, BFD_RELOC_ALPHA_TPREL16, -/* Bits 27..2 of the relocation address shifted right 2 bits; -simple reloc otherwise. */ +/* The MIPS jump instruction. */ BFD_RELOC_MIPS_JMP, + BFD_RELOC_MICROMIPS_JMP, /* The MIPS16 jump instruction. */ BFD_RELOC_MIPS16_JMP, @@ -2721,44 +2831,86 @@ to compensate for the borrow when the low bits are added. */ /* MIPS16 low 16 bits. */ BFD_RELOC_MIPS16_LO16, +/* MIPS16 TLS relocations */ + BFD_RELOC_MIPS16_TLS_GD, + BFD_RELOC_MIPS16_TLS_LDM, + BFD_RELOC_MIPS16_TLS_DTPREL_HI16, + BFD_RELOC_MIPS16_TLS_DTPREL_LO16, + BFD_RELOC_MIPS16_TLS_GOTTPREL, + BFD_RELOC_MIPS16_TLS_TPREL_HI16, + BFD_RELOC_MIPS16_TLS_TPREL_LO16, + /* Relocation against a MIPS literal section. */ BFD_RELOC_MIPS_LITERAL, + BFD_RELOC_MICROMIPS_LITERAL, + +/* microMIPS PC-relative relocations. */ + BFD_RELOC_MICROMIPS_7_PCREL_S1, + BFD_RELOC_MICROMIPS_10_PCREL_S1, + BFD_RELOC_MICROMIPS_16_PCREL_S1, + +/* microMIPS versions of generic BFD relocs. */ + BFD_RELOC_MICROMIPS_GPREL16, + BFD_RELOC_MICROMIPS_HI16, + BFD_RELOC_MICROMIPS_HI16_S, + BFD_RELOC_MICROMIPS_LO16, /* MIPS ELF relocations. */ BFD_RELOC_MIPS_GOT16, + BFD_RELOC_MICROMIPS_GOT16, BFD_RELOC_MIPS_CALL16, + BFD_RELOC_MICROMIPS_CALL16, BFD_RELOC_MIPS_GOT_HI16, + BFD_RELOC_MICROMIPS_GOT_HI16, BFD_RELOC_MIPS_GOT_LO16, + BFD_RELOC_MICROMIPS_GOT_LO16, BFD_RELOC_MIPS_CALL_HI16, + BFD_RELOC_MICROMIPS_CALL_HI16, BFD_RELOC_MIPS_CALL_LO16, + BFD_RELOC_MICROMIPS_CALL_LO16, BFD_RELOC_MIPS_SUB, + BFD_RELOC_MICROMIPS_SUB, BFD_RELOC_MIPS_GOT_PAGE, + BFD_RELOC_MICROMIPS_GOT_PAGE, BFD_RELOC_MIPS_GOT_OFST, + BFD_RELOC_MICROMIPS_GOT_OFST, BFD_RELOC_MIPS_GOT_DISP, + BFD_RELOC_MICROMIPS_GOT_DISP, BFD_RELOC_MIPS_SHIFT5, BFD_RELOC_MIPS_SHIFT6, BFD_RELOC_MIPS_INSERT_A, BFD_RELOC_MIPS_INSERT_B, BFD_RELOC_MIPS_DELETE, BFD_RELOC_MIPS_HIGHEST, + BFD_RELOC_MICROMIPS_HIGHEST, BFD_RELOC_MIPS_HIGHER, + BFD_RELOC_MICROMIPS_HIGHER, BFD_RELOC_MIPS_SCN_DISP, + BFD_RELOC_MICROMIPS_SCN_DISP, BFD_RELOC_MIPS_REL16, BFD_RELOC_MIPS_RELGOT, BFD_RELOC_MIPS_JALR, + BFD_RELOC_MICROMIPS_JALR, BFD_RELOC_MIPS_TLS_DTPMOD32, BFD_RELOC_MIPS_TLS_DTPREL32, BFD_RELOC_MIPS_TLS_DTPMOD64, BFD_RELOC_MIPS_TLS_DTPREL64, BFD_RELOC_MIPS_TLS_GD, + BFD_RELOC_MICROMIPS_TLS_GD, BFD_RELOC_MIPS_TLS_LDM, + BFD_RELOC_MICROMIPS_TLS_LDM, BFD_RELOC_MIPS_TLS_DTPREL_HI16, + BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16, BFD_RELOC_MIPS_TLS_DTPREL_LO16, + BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16, BFD_RELOC_MIPS_TLS_GOTTPREL, + BFD_RELOC_MICROMIPS_TLS_GOTTPREL, BFD_RELOC_MIPS_TLS_TPREL32, BFD_RELOC_MIPS_TLS_TPREL64, BFD_RELOC_MIPS_TLS_TPREL_HI16, + BFD_RELOC_MICROMIPS_TLS_TPREL_HI16, BFD_RELOC_MIPS_TLS_TPREL_LO16, + BFD_RELOC_MICROMIPS_TLS_TPREL_LO16, /* MIPS ELF relocations (VxWorks and PLT extensions). */ @@ -2849,6 +3001,25 @@ be honoured at the offset's location, regardless of linker relaxation. */ BFD_RELOC_MN10300_ALIGN, +/* Various TLS-related relocations. */ + BFD_RELOC_MN10300_TLS_GD, + BFD_RELOC_MN10300_TLS_LD, + BFD_RELOC_MN10300_TLS_LDO, + BFD_RELOC_MN10300_TLS_GOTIE, + BFD_RELOC_MN10300_TLS_IE, + BFD_RELOC_MN10300_TLS_LE, + BFD_RELOC_MN10300_TLS_DTPMOD, + BFD_RELOC_MN10300_TLS_DTPOFF, + BFD_RELOC_MN10300_TLS_TPOFF, + +/* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the +instruction. */ + BFD_RELOC_MN10300_32_PCREL, + +/* This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the +instruction. */ + BFD_RELOC_MN10300_16_PCREL, + /* i386/elf relocations */ BFD_RELOC_386_GOT32, @@ -2962,6 +3133,23 @@ relaxation. */ BFD_RELOC_PPC_EMB_RELST_HA, BFD_RELOC_PPC_EMB_BIT_FLD, BFD_RELOC_PPC_EMB_RELSDA, + BFD_RELOC_PPC_VLE_REL8, + BFD_RELOC_PPC_VLE_REL15, + BFD_RELOC_PPC_VLE_REL24, + BFD_RELOC_PPC_VLE_LO16A, + BFD_RELOC_PPC_VLE_LO16D, + BFD_RELOC_PPC_VLE_HI16A, + BFD_RELOC_PPC_VLE_HI16D, + BFD_RELOC_PPC_VLE_HA16A, + BFD_RELOC_PPC_VLE_HA16D, + BFD_RELOC_PPC_VLE_SDA21, + BFD_RELOC_PPC_VLE_SDA21_LO, + BFD_RELOC_PPC_VLE_SDAREL_LO16A, + BFD_RELOC_PPC_VLE_SDAREL_LO16D, + BFD_RELOC_PPC_VLE_SDAREL_HI16A, + BFD_RELOC_PPC_VLE_SDAREL_HI16D, + BFD_RELOC_PPC_VLE_SDAREL_HA16A, + BFD_RELOC_PPC_VLE_SDAREL_HA16D, BFD_RELOC_PPC64_HIGHER, BFD_RELOC_PPC64_HIGHER_S, BFD_RELOC_PPC64_HIGHEST, @@ -3123,6 +3311,12 @@ pc-relative or some form of GOT-indirect relocation. */ BFD_RELOC_ARM_TLS_TPOFF32, BFD_RELOC_ARM_TLS_IE32, BFD_RELOC_ARM_TLS_LE32, + BFD_RELOC_ARM_TLS_GOTDESC, + BFD_RELOC_ARM_TLS_CALL, + BFD_RELOC_ARM_THM_TLS_CALL, + BFD_RELOC_ARM_TLS_DESCSEQ, + BFD_RELOC_ARM_THM_TLS_DESCSEQ, + BFD_RELOC_ARM_TLS_DESC, /* ARM group relocations. */ BFD_RELOC_ARM_ALU_PC_G0_NC, @@ -3157,6 +3351,9 @@ pc-relative or some form of GOT-indirect relocation. */ /* Annotation of BX instructions. */ BFD_RELOC_ARM_V4BX, +/* ARM support for STT_GNU_IFUNC. */ + BFD_RELOC_ARM_IRELATIVE, + /* These relocs are only used within the ARM assembler. They are not (at present) written to any object files. */ BFD_RELOC_ARM_IMMEDIATE, @@ -3167,6 +3364,7 @@ pc-relative or some form of GOT-indirect relocation. */ BFD_RELOC_ARM_T32_ADD_PC12, BFD_RELOC_ARM_SHIFT_IMM, BFD_RELOC_ARM_SMC, + BFD_RELOC_ARM_HVC, BFD_RELOC_ARM_SWI, BFD_RELOC_ARM_MULTI, BFD_RELOC_ARM_CP_OFF_IMM, @@ -3276,6 +3474,13 @@ pc-relative or some form of GOT-indirect relocation. */ BFD_RELOC_SH_TLS_DTPMOD32, BFD_RELOC_SH_TLS_DTPOFF32, BFD_RELOC_SH_TLS_TPOFF32, + BFD_RELOC_SH_GOT20, + BFD_RELOC_SH_GOTOFF20, + BFD_RELOC_SH_GOTFUNCDESC, + BFD_RELOC_SH_GOTFUNCDESC20, + BFD_RELOC_SH_GOTOFFFUNCDESC, + BFD_RELOC_SH_GOTOFFFUNCDESC20, + BFD_RELOC_SH_FUNCDESC, /* ARC Cores relocs. ARC 22 bit pc-relative branch. The lowest two bits must be zero and are @@ -3601,13 +3806,71 @@ bits placed non-contiguously in the instruction. */ instructions. */ BFD_RELOC_V850_LO16_SPLIT_OFFSET, -/* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the -instruction. */ - BFD_RELOC_MN10300_32_PCREL, +/* This is a 16-bit reloc. */ + BFD_RELOC_V850_16_PCREL, -/* This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the -instruction. */ - BFD_RELOC_MN10300_16_PCREL, +/* This is a 17-bit reloc. */ + BFD_RELOC_V850_17_PCREL, + +/* This is a 23-bit reloc. */ + BFD_RELOC_V850_23, + +/* This is a 32-bit reloc. */ + BFD_RELOC_V850_32_PCREL, + +/* This is a 32-bit reloc. */ + BFD_RELOC_V850_32_ABS, + +/* This is a 16-bit reloc. */ + BFD_RELOC_V850_16_SPLIT_OFFSET, + +/* This is a 16-bit reloc. */ + BFD_RELOC_V850_16_S1, + +/* Low 16 bits. 16 bit shifted by 1. */ + BFD_RELOC_V850_LO16_S1, + +/* This is a 16 bit offset from the call table base pointer. */ + BFD_RELOC_V850_CALLT_15_16_OFFSET, + +/* DSO relocations. */ + BFD_RELOC_V850_32_GOTPCREL, + +/* DSO relocations. */ + BFD_RELOC_V850_16_GOT, + +/* DSO relocations. */ + BFD_RELOC_V850_32_GOT, + +/* DSO relocations. */ + BFD_RELOC_V850_22_PLT_PCREL, + +/* DSO relocations. */ + BFD_RELOC_V850_32_PLT_PCREL, + +/* DSO relocations. */ + BFD_RELOC_V850_COPY, + +/* DSO relocations. */ + BFD_RELOC_V850_GLOB_DAT, + +/* DSO relocations. */ + BFD_RELOC_V850_JMP_SLOT, + +/* DSO relocations. */ + BFD_RELOC_V850_RELATIVE, + +/* DSO relocations. */ + BFD_RELOC_V850_16_GOTOFF, + +/* DSO relocations. */ + BFD_RELOC_V850_32_GOTOFF, + +/* start code. */ + BFD_RELOC_V850_CODE, + +/* start data in text. */ + BFD_RELOC_V850_DATA, /* This is a 8bit DP reloc for the tms320c30, where the most significant 8 bits of a 24 bit word are placed into the least @@ -3661,6 +3924,10 @@ the opcode. */ BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, + BFD_RELOC_C6000_JUMP_SLOT, + BFD_RELOC_C6000_EHTYPE, + BFD_RELOC_C6000_PCR_H16, + BFD_RELOC_C6000_PCR_L16, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP, @@ -3876,6 +4143,52 @@ instructions */ instructions */ BFD_RELOC_AVR_6_ADIW, +/* This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol +in .byte lo8(symbol) */ + BFD_RELOC_AVR_8_LO, + +/* This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol +in .byte hi8(symbol) */ + BFD_RELOC_AVR_8_HI, + +/* This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol +in .byte hlo8(symbol) */ + BFD_RELOC_AVR_8_HLO, + +/* Renesas RL78 Relocations. */ + BFD_RELOC_RL78_NEG8, + BFD_RELOC_RL78_NEG16, + BFD_RELOC_RL78_NEG24, + BFD_RELOC_RL78_NEG32, + BFD_RELOC_RL78_16_OP, + BFD_RELOC_RL78_24_OP, + BFD_RELOC_RL78_32_OP, + BFD_RELOC_RL78_8U, + BFD_RELOC_RL78_16U, + BFD_RELOC_RL78_24U, + BFD_RELOC_RL78_DIR3U_PCREL, + BFD_RELOC_RL78_DIFF, + BFD_RELOC_RL78_GPRELB, + BFD_RELOC_RL78_GPRELW, + BFD_RELOC_RL78_GPRELL, + BFD_RELOC_RL78_SYM, + BFD_RELOC_RL78_OP_SUBTRACT, + BFD_RELOC_RL78_OP_NEG, + BFD_RELOC_RL78_OP_AND, + BFD_RELOC_RL78_OP_SHRA, + BFD_RELOC_RL78_ABS8, + BFD_RELOC_RL78_ABS16, + BFD_RELOC_RL78_ABS16_REV, + BFD_RELOC_RL78_ABS32, + BFD_RELOC_RL78_ABS32_REV, + BFD_RELOC_RL78_ABS16U, + BFD_RELOC_RL78_ABS16UW, + BFD_RELOC_RL78_ABS16UL, + BFD_RELOC_RL78_RELAX, + BFD_RELOC_RL78_HI16, + BFD_RELOC_RL78_HI8, + BFD_RELOC_RL78_LO16, + /* Renesas RX Relocations. */ BFD_RELOC_RX_NEG8, BFD_RELOC_RX_NEG16, @@ -3894,9 +4207,12 @@ instructions */ BFD_RELOC_RX_GPRELL, BFD_RELOC_RX_SYM, BFD_RELOC_RX_OP_SUBTRACT, + BFD_RELOC_RX_OP_NEG, BFD_RELOC_RX_ABS8, BFD_RELOC_RX_ABS16, + BFD_RELOC_RX_ABS16_REV, BFD_RELOC_RX_ABS32, + BFD_RELOC_RX_ABS32_REV, BFD_RELOC_RX_ABS16U, BFD_RELOC_RX_ABS16UW, BFD_RELOC_RX_ABS16UL, @@ -4008,6 +4324,9 @@ instructions */ BFD_RELOC_390_GOTPLT20, BFD_RELOC_390_TLS_GOTIE20, +/* STT_GNU_IFUNC relocation. */ + BFD_RELOC_390_IRELATIVE, + /* Score relocations Low 16 bit for load/store */ BFD_RELOC_SCORE_GPREL15, @@ -4222,6 +4541,83 @@ to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */ This is the 5 bits of a value. */ BFD_RELOC_M68HC12_5B, +/* Freescale XGATE reloc. +This reloc marks the beginning of a bra/jal instruction. */ + BFD_RELOC_XGATE_RL_JUMP, + +/* Freescale XGATE reloc. +This reloc marks a group of several instructions that gcc generates +and for which the linker relaxation pass can modify and/or remove +some of them. */ + BFD_RELOC_XGATE_RL_GROUP, + +/* Freescale XGATE reloc. +This is the 16-bit lower part of an address. It is used for the '16-bit' +instructions. */ + BFD_RELOC_XGATE_LO16, + +/* Freescale XGATE reloc. */ + BFD_RELOC_XGATE_GPAGE, + +/* Freescale XGATE reloc. */ + BFD_RELOC_XGATE_24, + +/* Freescale XGATE reloc. +This is a 9-bit pc-relative reloc. */ + BFD_RELOC_XGATE_PCREL_9, + +/* Freescale XGATE reloc. +This is a 10-bit pc-relative reloc. */ + BFD_RELOC_XGATE_PCREL_10, + +/* Freescale XGATE reloc. +This is the 16-bit lower part of an address. It is used for the '16-bit' +instructions. */ + BFD_RELOC_XGATE_IMM8_LO, + +/* Freescale XGATE reloc. +This is the 16-bit higher part of an address. It is used for the '16-bit' +instructions. */ + BFD_RELOC_XGATE_IMM8_HI, + +/* Freescale XGATE reloc. +This is a 3-bit pc-relative reloc. */ + BFD_RELOC_XGATE_IMM3, + +/* Freescale XGATE reloc. +This is a 4-bit pc-relative reloc. */ + BFD_RELOC_XGATE_IMM4, + +/* Freescale XGATE reloc. +This is a 5-bit pc-relative reloc. */ + BFD_RELOC_XGATE_IMM5, + +/* Motorola 68HC12 reloc. +This is the 9 bits of a value. */ + BFD_RELOC_M68HC12_9B, + +/* Motorola 68HC12 reloc. +This is the 16 bits of a value. */ + BFD_RELOC_M68HC12_16B, + +/* Motorola 68HC12/XGATE reloc. +This is a PCREL9 branch. */ + BFD_RELOC_M68HC12_9_PCREL, + +/* Motorola 68HC12/XGATE reloc. +This is a PCREL10 branch. */ + BFD_RELOC_M68HC12_10_PCREL, + +/* Motorola 68HC12/XGATE reloc. +This is the 8 bit low part of an absolute address and immediately precedes +a matching HI8XG part. */ + BFD_RELOC_M68HC12_LO8XG, + +/* Motorola 68HC12/XGATE reloc. +This is the 8 bit high part of an absolute address and immediately follows +a matching LO8XG part. */ + BFD_RELOC_M68HC12_HI8XG, + /* NS CR16C Relocations. */ BFD_RELOC_16C_NUM08, BFD_RELOC_16C_NUM08_C, @@ -4588,6 +4984,9 @@ BFD_RELOC_XTENSA_ASM_EXPAND. */ BFD_RELOC_MACH_O_PAIR. */ BFD_RELOC_MACH_O_SECTDIFF, +/* Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol. */ + BFD_RELOC_MACH_O_LOCAL_SECTDIFF, + /* Pair of relocation. Contains the first symbol. */ BFD_RELOC_MACH_O_PAIR, @@ -4670,6 +5069,440 @@ value in a word. The relocation is relative offset from */ /* This is used to tell the dynamic linker to copy the value out of the dynamic object into the runtime process image. */ BFD_RELOC_MICROBLAZE_COPY, + +/* AArch64 ADD immediate instruction, holding bits 0 to 11 of the address. +Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */ + BFD_RELOC_AARCH64_ADD_LO12, + +/* AArch64 Load Literal instruction, holding a 19 bit PC relative word +offset of the global offset table entry for a symbol. The lowest two +bits must be zero and are not stored in the instruction, giving a 21 +bit signed byte offset. This relocation type requires signed overflow +checking. */ + BFD_RELOC_AARCH64_GOT_LD_PREL19, + +/* Get to the page base of the global offset table entry for a symbol as +part of an ADRP instruction using a 21 bit PC relative value.Used in +conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC. */ + BFD_RELOC_AARCH64_ADR_GOT_PAGE, + +/* AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page +offset, giving a 4KB aligned page base address. */ + BFD_RELOC_AARCH64_ADR_HI21_PCREL, + +/* AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page +offset, giving a 4KB aligned page base address, but with no overflow +checking. */ + BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL, + +/* AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset. */ + BFD_RELOC_AARCH64_ADR_LO21_PCREL, + +/* AArch64 19 bit pc-relative conditional branch and compare & branch. +The lowest two bits must be zero and are not stored in the instruction, +giving a 21 bit signed byte offset. */ + BFD_RELOC_AARCH64_BRANCH19, + +/* AArch64 26 bit pc-relative unconditional branch and link. +The lowest two bits must be zero and are not stored in the instruction, +giving a 28 bit signed byte offset. */ + BFD_RELOC_AARCH64_CALL26, + +/* AArch64 pseudo relocation code to be used internally by the AArch64 +assembler and not (currently) written to any object files. */ + BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP, + +/* AArch64 26 bit pc-relative unconditional branch. +The lowest two bits must be zero and are not stored in the instruction, +giving a 28 bit signed byte offset. */ + BFD_RELOC_AARCH64_JUMP26, + +/* AArch64 Load Literal instruction, holding a 19 bit pc-relative word +offset. The lowest two bits must be zero and are not stored in the +instruction, giving a 21 bit signed byte offset. */ + BFD_RELOC_AARCH64_LD_LO19_PCREL, + +/* Unsigned 12 bit byte offset for 64 bit load/store from the page of +the GOT entry for this symbol. Used in conjunction with +BFD_RELOC_AARCH64_ADR_GOTPAGE. */ + BFD_RELOC_AARCH64_LD64_GOT_LO12_NC, + +/* AArch64 unspecified load/store instruction, holding bits 0 to 11 of the +address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */ + BFD_RELOC_AARCH64_LDST_LO12, + +/* AArch64 8-bit load/store instruction, holding bits 0 to 11 of the +address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */ + BFD_RELOC_AARCH64_LDST8_LO12, + +/* AArch64 16-bit load/store instruction, holding bits 0 to 11 of the +address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */ + BFD_RELOC_AARCH64_LDST16_LO12, + +/* AArch64 32-bit load/store instruction, holding bits 0 to 11 of the +address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */ + BFD_RELOC_AARCH64_LDST32_LO12, + +/* AArch64 64-bit load/store instruction, holding bits 0 to 11 of the +address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */ + BFD_RELOC_AARCH64_LDST64_LO12, + +/* AArch64 128-bit load/store instruction, holding bits 0 to 11 of the +address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL. */ + BFD_RELOC_AARCH64_LDST128_LO12, + +/* AArch64 MOV[NZK] instruction with most significant bits 0 to 15 +of an unsigned address/value. */ + BFD_RELOC_AARCH64_MOVW_G0, + +/* AArch64 MOV[NZ] instruction with most significant bits 0 to 15 +of a signed value. Changes instruction to MOVZ or MOVN depending on the +value's sign. */ + BFD_RELOC_AARCH64_MOVW_G0_S, + +/* AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of +an address/value. No overflow checking. */ + BFD_RELOC_AARCH64_MOVW_G0_NC, + +/* AArch64 MOV[NZK] instruction with most significant bits 16 to 31 +of an unsigned address/value. */ + BFD_RELOC_AARCH64_MOVW_G1, + +/* AArch64 MOV[NZK] instruction with less significant bits 16 to 31 +of an address/value. No overflow checking. */ + BFD_RELOC_AARCH64_MOVW_G1_NC, + +/* AArch64 MOV[NZ] instruction with most significant bits 16 to 31 +of a signed value. Changes instruction to MOVZ or MOVN depending on the +value's sign. */ + BFD_RELOC_AARCH64_MOVW_G1_S, + +/* AArch64 MOV[NZK] instruction with most significant bits 32 to 47 +of an unsigned address/value. */ + BFD_RELOC_AARCH64_MOVW_G2, + +/* AArch64 MOV[NZK] instruction with less significant bits 32 to 47 +of an address/value. No overflow checking. */ + BFD_RELOC_AARCH64_MOVW_G2_NC, + +/* AArch64 MOV[NZ] instruction with most significant bits 32 to 47 +of a signed value. Changes instruction to MOVZ or MOVN depending on the +value's sign. */ + BFD_RELOC_AARCH64_MOVW_G2_S, + +/* AArch64 MOV[NZK] instruction with most signficant bits 48 to 64 +of a signed or unsigned address/value. */ + BFD_RELOC_AARCH64_MOVW_G3, + +/* AArch64 TLS relocation. */ + BFD_RELOC_AARCH64_TLSDESC, + +/* AArch64 TLS DESC relocation. */ + BFD_RELOC_AARCH64_TLSDESC_ADD, + +/* AArch64 TLS DESC relocation. */ + BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC, + +/* AArch64 TLS DESC relocation. */ + BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE, + +/* AArch64 TLS DESC relocation. */ + BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21, + +/* AArch64 TLS DESC relocation. */ + BFD_RELOC_AARCH64_TLSDESC_CALL, + +/* AArch64 TLS DESC relocation. */ + BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC, + +/* AArch64 TLS DESC relocation. */ + BFD_RELOC_AARCH64_TLSDESC_LD64_PREL19, + +/* AArch64 TLS DESC relocation. */ + BFD_RELOC_AARCH64_TLSDESC_LDR, + +/* AArch64 TLS DESC relocation. */ + BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC, + +/* AArch64 TLS DESC relocation. */ + BFD_RELOC_AARCH64_TLSDESC_OFF_G1, + +/* Unsigned 12 bit byte offset to global offset table entry for a symbols +tls_index structure. Used in conjunction with +BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */ + BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC, + +/* Get to the page base of the global offset table entry for a symbols +tls_index structure as part of an adrp instruction using a 21 bit PC +relative value. Used in conjunction with +BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC. */ + BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21, + +/* AArch64 TLS INITIAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, + +/* AArch64 TLS INITIAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19, + +/* AArch64 TLS INITIAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, + +/* AArch64 TLS INITIAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, + +/* AArch64 TLS INITIAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1, + +/* AArch64 TLS LOCAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12, + +/* AArch64 TLS LOCAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12, + +/* AArch64 TLS LOCAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC, + +/* AArch64 TLS LOCAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0, + +/* AArch64 TLS LOCAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC, + +/* AArch64 TLS LOCAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1, + +/* AArch64 TLS LOCAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC, + +/* AArch64 TLS LOCAL EXEC relocation. */ + BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2, + +/* AArch64 TLS relocation. */ + BFD_RELOC_AARCH64_TLS_DTPMOD64, + +/* AArch64 TLS relocation. */ + BFD_RELOC_AARCH64_TLS_DTPREL64, + +/* AArch64 TLS relocation. */ + BFD_RELOC_AARCH64_TLS_TPREL64, + +/* AArch64 14 bit pc-relative test bit and branch. +The lowest two bits must be zero and are not stored in the instruction, +giving a 16 bit signed byte offset. */ + BFD_RELOC_AARCH64_TSTBR14, + +/* Tilera TILEPro Relocations. */ + BFD_RELOC_TILEPRO_COPY, + BFD_RELOC_TILEPRO_GLOB_DAT, + BFD_RELOC_TILEPRO_JMP_SLOT, + BFD_RELOC_TILEPRO_RELATIVE, + BFD_RELOC_TILEPRO_BROFF_X1, + BFD_RELOC_TILEPRO_JOFFLONG_X1, + BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT, + BFD_RELOC_TILEPRO_IMM8_X0, + BFD_RELOC_TILEPRO_IMM8_Y0, + BFD_RELOC_TILEPRO_IMM8_X1, + BFD_RELOC_TILEPRO_IMM8_Y1, + BFD_RELOC_TILEPRO_DEST_IMM8_X1, + BFD_RELOC_TILEPRO_MT_IMM15_X1, + BFD_RELOC_TILEPRO_MF_IMM15_X1, + BFD_RELOC_TILEPRO_IMM16_X0, + BFD_RELOC_TILEPRO_IMM16_X1, + BFD_RELOC_TILEPRO_IMM16_X0_LO, + BFD_RELOC_TILEPRO_IMM16_X1_LO, + BFD_RELOC_TILEPRO_IMM16_X0_HI, + BFD_RELOC_TILEPRO_IMM16_X1_HI, + BFD_RELOC_TILEPRO_IMM16_X0_HA, + BFD_RELOC_TILEPRO_IMM16_X1_HA, + BFD_RELOC_TILEPRO_IMM16_X0_PCREL, + BFD_RELOC_TILEPRO_IMM16_X1_PCREL, + BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL, + BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL, + BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL, + BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL, + BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL, + BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL, + BFD_RELOC_TILEPRO_IMM16_X0_GOT, + BFD_RELOC_TILEPRO_IMM16_X1_GOT, + BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO, + BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO, + BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI, + BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI, + BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA, + BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA, + BFD_RELOC_TILEPRO_MMSTART_X0, + BFD_RELOC_TILEPRO_MMEND_X0, + BFD_RELOC_TILEPRO_MMSTART_X1, + BFD_RELOC_TILEPRO_MMEND_X1, + BFD_RELOC_TILEPRO_SHAMT_X0, + BFD_RELOC_TILEPRO_SHAMT_X1, + BFD_RELOC_TILEPRO_SHAMT_Y0, + BFD_RELOC_TILEPRO_SHAMT_Y1, + BFD_RELOC_TILEPRO_TLS_GD_CALL, + BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD, + BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD, + BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD, + BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD, + BFD_RELOC_TILEPRO_TLS_IE_LOAD, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA, + BFD_RELOC_TILEPRO_TLS_DTPMOD32, + BFD_RELOC_TILEPRO_TLS_DTPOFF32, + BFD_RELOC_TILEPRO_TLS_TPOFF32, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI, + BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA, + +/* Tilera TILE-Gx Relocations. */ + BFD_RELOC_TILEGX_HW0, + BFD_RELOC_TILEGX_HW1, + BFD_RELOC_TILEGX_HW2, + BFD_RELOC_TILEGX_HW3, + BFD_RELOC_TILEGX_HW0_LAST, + BFD_RELOC_TILEGX_HW1_LAST, + BFD_RELOC_TILEGX_HW2_LAST, + BFD_RELOC_TILEGX_COPY, + BFD_RELOC_TILEGX_GLOB_DAT, + BFD_RELOC_TILEGX_JMP_SLOT, + BFD_RELOC_TILEGX_RELATIVE, + BFD_RELOC_TILEGX_BROFF_X1, + BFD_RELOC_TILEGX_JUMPOFF_X1, + BFD_RELOC_TILEGX_JUMPOFF_X1_PLT, + BFD_RELOC_TILEGX_IMM8_X0, + BFD_RELOC_TILEGX_IMM8_Y0, + BFD_RELOC_TILEGX_IMM8_X1, + BFD_RELOC_TILEGX_IMM8_Y1, + BFD_RELOC_TILEGX_DEST_IMM8_X1, + BFD_RELOC_TILEGX_MT_IMM14_X1, + BFD_RELOC_TILEGX_MF_IMM14_X1, + BFD_RELOC_TILEGX_MMSTART_X0, + BFD_RELOC_TILEGX_MMEND_X0, + BFD_RELOC_TILEGX_SHAMT_X0, + BFD_RELOC_TILEGX_SHAMT_X1, + BFD_RELOC_TILEGX_SHAMT_Y0, + BFD_RELOC_TILEGX_SHAMT_Y1, + BFD_RELOC_TILEGX_IMM16_X0_HW0, + BFD_RELOC_TILEGX_IMM16_X1_HW0, + BFD_RELOC_TILEGX_IMM16_X0_HW1, + BFD_RELOC_TILEGX_IMM16_X1_HW1, + BFD_RELOC_TILEGX_IMM16_X0_HW2, + BFD_RELOC_TILEGX_IMM16_X1_HW2, + BFD_RELOC_TILEGX_IMM16_X0_HW3, + BFD_RELOC_TILEGX_IMM16_X1_HW3, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST, + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST, + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST, + BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT, + BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT, + BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT, + BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE, + BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD, + BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL, + BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE, + BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE, + BFD_RELOC_TILEGX_TLS_DTPMOD64, + BFD_RELOC_TILEGX_TLS_DTPOFF64, + BFD_RELOC_TILEGX_TLS_TPOFF64, + BFD_RELOC_TILEGX_TLS_DTPMOD32, + BFD_RELOC_TILEGX_TLS_DTPOFF32, + BFD_RELOC_TILEGX_TLS_TPOFF32, + BFD_RELOC_TILEGX_TLS_GD_CALL, + BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD, + BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD, + BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD, + BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, + BFD_RELOC_TILEGX_TLS_IE_LOAD, + BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD, + BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD, + BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, + BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD, + +/* Adapteva EPIPHANY - 8 bit signed pc-relative displacement */ + BFD_RELOC_EPIPHANY_SIMM8, + +/* Adapteva EPIPHANY - 24 bit signed pc-relative displacement */ + BFD_RELOC_EPIPHANY_SIMM24, + +/* Adapteva EPIPHANY - 16 most-significant bits of absolute address */ + BFD_RELOC_EPIPHANY_HIGH, + +/* Adapteva EPIPHANY - 16 least-significant bits of absolute address */ + BFD_RELOC_EPIPHANY_LOW, + +/* Adapteva EPIPHANY - 11 bit signed number - add/sub immediate */ + BFD_RELOC_EPIPHANY_SIMM11, + +/* Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement) */ + BFD_RELOC_EPIPHANY_IMM11, + +/* Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction. */ + BFD_RELOC_EPIPHANY_IMM8, BFD_RELOC_UNUSED }; typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; reloc_howto_type *bfd_reloc_type_lookup @@ -4984,6 +5817,24 @@ struct bfd will be consistent from run to run. */ #define BFD_DETERMINISTIC_OUTPUT 0x4000 + /* Compress sections in this BFD. */ +#define BFD_COMPRESS 0x8000 + + /* Decompress sections in this BFD. */ +#define BFD_DECOMPRESS 0x10000 + + /* BFD is a dummy, for plugins. */ +#define BFD_PLUGIN 0x20000 + + /* Flags bits to be saved in bfd_preserve_save. */ +#define BFD_FLAGS_SAVED \ + (BFD_IN_MEMORY | BFD_COMPRESS | BFD_DECOMPRESS | BFD_PLUGIN) + + /* Flags bits which are for BFD use only. */ +#define BFD_FLAGS_FOR_BFD_USE_MASK \ + (BFD_IN_MEMORY | BFD_COMPRESS | BFD_DECOMPRESS | BFD_LINKER_CREATED \ + | BFD_PLUGIN | BFD_TRADITIONAL_FORMAT | BFD_DETERMINISTIC_OUTPUT) + /* Currently my_archive is tested before adding origin to anything. I believe that this can become always an add of origin, with origin set to 0 for non archive files. */ @@ -5167,6 +6018,15 @@ void bfd_set_error_program_name (const char *); bfd_error_handler_type bfd_get_error_handler (void); +typedef void (*bfd_assert_handler_type) (const char *bfd_formatmsg, + const char *bfd_version, + const char *bfd_file, + int bfd_line); + +bfd_assert_handler_type bfd_set_assert_handler (bfd_assert_handler_type); + +bfd_assert_handler_type bfd_get_assert_handler (void); + long bfd_get_reloc_upper_bound (bfd *abfd, asection *sect); long bfd_canonicalize_reloc @@ -5215,6 +6075,11 @@ bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags); BFD_SEND (abfd, _bfd_find_nearest_line, \ (abfd, sec, syms, off, file, func, line)) +#define bfd_find_nearest_line_discriminator(abfd, sec, syms, off, file, func, \ + line, disc) \ + BFD_SEND (abfd, _bfd_find_nearest_line_discriminator, \ + (abfd, sec, syms, off, file, func, line, disc)) + #define bfd_find_line(abfd, syms, sym, file, line) \ BFD_SEND (abfd, _bfd_find_line, \ (abfd, syms, sym, file, line)) @@ -5247,6 +6112,9 @@ bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags); #define bfd_gc_sections(abfd, link_info) \ BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info)) +#define bfd_lookup_section_flags(link_info, flag_info, section) \ + BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info, section)) + #define bfd_merge_sections(abfd, link_info) \ BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info)) @@ -5340,6 +6208,8 @@ const char *bfd_core_file_failing_command (bfd *abfd); int bfd_core_file_failing_signal (bfd *abfd); +int bfd_core_file_pid (bfd *abfd); + bfd_boolean core_file_matches_executable_p (bfd *core_bfd, bfd *exec_bfd); @@ -5401,6 +6271,9 @@ enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN }; /* Forward declaration. */ typedef struct bfd_link_info _bfd_link_info; +/* Forward declaration. */ +typedef struct flag_info flag_info; + typedef struct bfd_target { /* Identifies the kind of target, e.g., SunOS4, Ultrix, etc. */ @@ -5432,7 +6305,11 @@ typedef struct bfd_target char ar_pad_char; /* The maximum number of characters in an archive header. */ - unsigned short ar_max_namelen; + unsigned char ar_max_namelen; + + /* How well this target matches, used to select between various + possible targets when more than one target matches. */ + unsigned char match_priority; /* Entries for byte swapping for data. These are different from the other entry points, since they don't take a BFD as the first argument. @@ -5536,11 +6413,13 @@ typedef struct bfd_target #define BFD_JUMP_TABLE_CORE(NAME) \ NAME##_core_file_failing_command, \ NAME##_core_file_failing_signal, \ - NAME##_core_file_matches_executable_p + NAME##_core_file_matches_executable_p, \ + NAME##_core_file_pid char * (*_core_file_failing_command) (bfd *); int (*_core_file_failing_signal) (bfd *); bfd_boolean (*_core_file_matches_executable_p) (bfd *, bfd *); + int (*_core_file_pid) (bfd *); /* Archive entry points. */ #define BFD_JUMP_TABLE_ARCHIVE(NAME) \ @@ -5582,6 +6461,7 @@ typedef struct bfd_target NAME##_bfd_is_target_special_symbol, \ NAME##_get_lineno, \ NAME##_find_nearest_line, \ + _bfd_generic_find_nearest_line_discriminator, \ _bfd_generic_find_line, \ NAME##_find_inliner_info, \ NAME##_bfd_make_debug_symbol, \ @@ -5605,6 +6485,9 @@ typedef struct bfd_target bfd_boolean (*_bfd_find_nearest_line) (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma, const char **, const char **, unsigned int *); + bfd_boolean (*_bfd_find_nearest_line_discriminator) + (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma, + const char **, const char **, unsigned int *, unsigned int *); bfd_boolean (*_bfd_find_line) (bfd *, struct bfd_symbol **, struct bfd_symbol *, const char **, unsigned int *); @@ -5664,6 +6547,7 @@ typedef struct bfd_target NAME##_bfd_final_link, \ NAME##_bfd_link_split_section, \ NAME##_bfd_gc_sections, \ + NAME##_bfd_lookup_section_flags, \ NAME##_bfd_merge_sections, \ NAME##_bfd_is_group_section, \ NAME##_bfd_discard_group, \ @@ -5708,6 +6592,11 @@ typedef struct bfd_target /* Remove sections that are not referenced from the output. */ bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *); + /* Sets the bitmask of allowed and disallowed section flags. */ + bfd_boolean (*_bfd_lookup_section_flags) (struct bfd_link_info *, + struct flag_info *, + asection *); + /* Attempt to merge SEC_MERGE sections. */ bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *); @@ -5719,8 +6608,8 @@ typedef struct bfd_target /* Check if SEC has been already linked during a reloceatable or final link. */ - void (*_section_already_linked) (bfd *, struct bfd_section *, - struct bfd_link_info *); + bfd_boolean (*_section_already_linked) (bfd *, asection *, + struct bfd_link_info *); /* Define a common symbol. */ bfd_boolean (*_bfd_define_common_symbol) (bfd *, struct bfd_link_info *, @@ -5789,7 +6678,8 @@ bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec); #define bfd_link_split_section(abfd, sec) \ BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec)) -void bfd_section_already_linked (bfd *abfd, asection *sec, +bfd_boolean bfd_section_already_linked (bfd *abfd, + asection *sec, struct bfd_link_info *info); #define bfd_section_already_linked(abfd, sec, info) \ @@ -5806,13 +6696,32 @@ struct bfd_elf_version_tree * bfd_find_version_for_sym (struct bfd_elf_version_tree *verdefs, const char *sym_name, bfd_boolean *hide); +bfd_boolean bfd_hide_sym_by_version + (struct bfd_elf_version_tree *verdefs, const char *sym_name); + /* Extracted from simple.c. */ bfd_byte *bfd_simple_get_relocated_section_contents (bfd *abfd, asection *sec, bfd_byte *outbuf, asymbol **symbol_table); /* Extracted from compress.c. */ -bfd_boolean bfd_uncompress_section_contents - (bfd_byte **buffer, bfd_size_type *size); +bfd_boolean bfd_compress_section_contents + (bfd *abfd, asection *section, bfd_byte *uncompressed_buffer, + bfd_size_type uncompressed_size); + +bfd_boolean bfd_get_full_section_contents + (bfd *abfd, asection *section, bfd_byte **ptr); + +void bfd_cache_section_contents + (asection *sec, void *contents); + +bfd_boolean bfd_is_section_compressed + (bfd *abfd, asection *section); + +bfd_boolean bfd_init_section_decompress_status + (bfd *abfd, asection *section); + +bfd_boolean bfd_init_section_compress_status + (bfd *abfd, asection *section); #ifdef __cplusplus }