X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=bfd%2Fcoff-tic80.c;h=9e49a166a68529b63f0025f6ea9ac3ea95eab6e0;hb=45d735237b7edf282131d570a7a9f6aa9ee1bd9c;hp=10d50f0aab2d24248af7bd236ac511c06f38906d;hpb=b90efa5b79ac1524ec260f8eb89d1be37e0219a7;p=deliverable%2Fbinutils-gdb.git diff --git a/bfd/coff-tic80.c b/bfd/coff-tic80.c index 10d50f0aab..9e49a166a6 100644 --- a/bfd/coff-tic80.c +++ b/bfd/coff-tic80.c @@ -1,5 +1,5 @@ /* BFD back-end for Texas Instruments TMS320C80 Multimedia Video Processor (MVP). - Copyright (C) 1996-2015 Free Software Foundation, Inc. + Copyright (C) 1996-2019 Free Software Foundation, Inc. Written by Fred Fish (fnf@cygnus.com) @@ -42,6 +42,8 @@ #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (2) #define COFF_ALIGN_IN_SECTION_HEADER 1 #define COFF_ALIGN_IN_SFLAGS 1 +#define COFF_ENCODE_ALIGNMENT(S,X) ((S).s_flags |= (((unsigned)(X) & 0xf) << 8)) +#define COFF_DECODE_ALIGNMENT(X) (((X) >> 8) & 0xf) #define GET_SCNHDR_FLAGS H_GET_16 #define PUT_SCNHDR_FLAGS H_PUT_16 @@ -436,8 +438,8 @@ rtype2howto (arelent *cache_ptr, struct internal_reloc *dst) } } - (*_bfd_error_handler) (_("Unrecognized reloc type 0x%x"), - (unsigned int) dst->r_type); + _bfd_error_handler (_("unsupported relocation type %#x"), + (unsigned int) dst->r_type); cache_ptr->howto = tic80_howto_table + 0; } @@ -514,9 +516,9 @@ coff_tic80_relocate_section (bfd *output_bfd, } /* COFF treats common symbols in one of two ways. Either the - size of the symbol is included in the section contents, or it - is not. We assume that the size is not included, and force - the rtype_to_howto function to adjust the addend as needed. */ + size of the symbol is included in the section contents, or it + is not. We assume that the size is not included, and force + the rtype_to_howto function to adjust the addend as needed. */ if (sym != NULL && sym->n_scnum != 0) addend = - sym->n_value; @@ -542,7 +544,7 @@ coff_tic80_relocate_section (bfd *output_bfd, else { sec = sections[symndx]; - val = (sec->output_section->vma + val = (sec->output_section->vma + sec->output_offset + sym->n_value); if (! obj_pe (output_bfd)) @@ -562,20 +564,17 @@ coff_tic80_relocate_section (bfd *output_bfd, + sec->output_offset); } - else if (! info->relocatable) - { - if (! ((*info->callbacks->undefined_symbol) - (info, h->root.root.string, input_bfd, input_section, - rel->r_vaddr - input_section->vma, TRUE))) - return FALSE; - } + else if (! bfd_link_relocatable (info)) + (*info->callbacks->undefined_symbol) + (info, h->root.root.string, input_bfd, input_section, + rel->r_vaddr - input_section->vma, TRUE); } addr = rel->r_vaddr - input_section->vma; /* FIXME: This code assumes little endian, but the PP can - apparently be bi-endian. I don't know if the bi-endianness - applies to the instruction set or just to the data. */ + apparently be bi-endian. I don't know if the bi-endianness + applies to the instruction set or just to the data. */ switch (howto->type) { default: @@ -668,9 +667,10 @@ coff_tic80_relocate_section (bfd *output_bfd, case bfd_reloc_ok: break; case bfd_reloc_outofrange: - (*_bfd_error_handler) - (_("%B: bad reloc address 0x%lx in section `%A'"), - input_bfd, input_section, (unsigned long) rel->r_vaddr); + _bfd_error_handler + /* xgettext: c-format */ + (_("%pB: bad reloc address %#" PRIx64 " in section `%pA'"), + input_bfd, (uint64_t) rel->r_vaddr, input_section); return FALSE; case bfd_reloc_overflow: { @@ -688,11 +688,10 @@ coff_tic80_relocate_section (bfd *output_bfd, return FALSE; } - if (! ((*info->callbacks->reloc_overflow) - (info, (h ? &h->root : NULL), name, howto->name, - (bfd_vma) 0, input_bfd, input_section, - rel->r_vaddr - input_section->vma))) - return FALSE; + (*info->callbacks->reloc_overflow) + (info, (h ? &h->root : NULL), name, howto->name, + (bfd_vma) 0, input_bfd, input_section, + rel->r_vaddr - input_section->vma); } } }