X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=bfd%2Fcpu-ia64-opc.c;h=3cafb9f14d9f090ba1b54751c84fb53fbf705335;hb=98044b3c93477a775540ad17bccd3bdc3d20dfd8;hp=130dbe7b99898f3d62b5ee33b33b2542629e6828;hpb=800eeca487f145ccc5481a03bfff2b871a2fd361;p=deliverable%2Fbinutils-gdb.git diff --git a/bfd/cpu-ia64-opc.c b/bfd/cpu-ia64-opc.c index 130dbe7b99..3cafb9f14d 100644 --- a/bfd/cpu-ia64-opc.c +++ b/bfd/cpu-ia64-opc.c @@ -1,4 +1,4 @@ -/* Copyright (C) 1998, 1999 Free Software Foundation, Inc. +/* Copyright 1998, 1999, 2000, 2001 Free Software Foundation, Inc. Contributed by David Mosberger-Tang This file is part of BFD, the Binary File Descriptor library. @@ -17,10 +17,9 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - /* Logically, this code should be part of libopcode but since some of the operand insertion/extraction functions help bfd to implement - relocations, this code is included as part of elf64-ia64.c. This + relocations, this code is included as part of cpu-ia64.c. This avoids circular dependencies between libopcode and libbfd and also obviates the need for applications to link in libopcode when all they really want is libbfd. @@ -32,25 +31,29 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define NELEMS(a) ((int) (sizeof (a) / sizeof ((a)[0]))) static const char* -ins_rsvd (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) +ins_rsvd (const struct ia64_operand *self ATTRIBUTE_UNUSED, + ia64_insn value ATTRIBUTE_UNUSED, ia64_insn *code ATTRIBUTE_UNUSED) { return "internal error---this shouldn't happen"; } static const char* -ext_rsvd (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) +ext_rsvd (const struct ia64_operand *self ATTRIBUTE_UNUSED, + ia64_insn code ATTRIBUTE_UNUSED, ia64_insn *valuep ATTRIBUTE_UNUSED) { return "internal error---this shouldn't happen"; } static const char* -ins_const (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) +ins_const (const struct ia64_operand *self ATTRIBUTE_UNUSED, + ia64_insn value ATTRIBUTE_UNUSED, ia64_insn *code ATTRIBUTE_UNUSED) { return 0; } static const char* -ext_const (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) +ext_const (const struct ia64_operand *self ATTRIBUTE_UNUSED, + ia64_insn code ATTRIBUTE_UNUSED, ia64_insn *valuep ATTRIBUTE_UNUSED) { return 0; } @@ -134,7 +137,7 @@ static const char* ins_imms_scaled (const struct ia64_operand *self, ia64_insn value, ia64_insn *code, int scale) { - BFD_HOST_64_BIT svalue = value, sign_bit; + BFD_HOST_64_BIT svalue = value, sign_bit = 0; ia64_insn new = 0; int i; @@ -158,8 +161,8 @@ static const char* ext_imms_scaled (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep, int scale) { - int i, bits = 0, total = 0, shift; - BFD_HOST_64_BIT val = 0; + int i, bits = 0, total = 0; + BFD_HOST_64_BIT val = 0, sign; for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i) { @@ -169,8 +172,8 @@ ext_imms_scaled (const struct ia64_operand *self, ia64_insn code, total += bits; } /* sign extend: */ - shift = 8*sizeof (val) - total; - val = (val << shift) >> shift; + sign = (BFD_HOST_64_BIT) 1 << (total - 1); + val = (val ^ sign) - sign; *valuep = (val << scale); return 0; @@ -185,10 +188,7 @@ ins_imms (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) static const char* ins_immsu4 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) { - if (value == (BFD_HOST_U_64_BIT) 0x100000000) - value = 0; - else - value = (((BFD_HOST_64_BIT)value << 32) >> 32); + value = ((value & 0xffffffff) ^ 0x80000000) - 0x80000000; return ins_imms_scaled (self, value, code, 0); } @@ -210,10 +210,7 @@ static const char* ins_immsm1u4 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) { - if (value == (BFD_HOST_U_64_BIT) 0x100000000) - value = 0; - else - value = (((BFD_HOST_64_BIT)value << 32) >> 32); + value = ((value & 0xffffffff) ^ 0x80000000) - 0x80000000; --value; return ins_imms_scaled (self, value, code, 0); @@ -414,19 +411,20 @@ ext_inc3 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = { /* constants: */ - { CST, ins_const, ext_const, "NIL", {{ 0, }}, 0, "" }, - { CST, ins_const, ext_const, "ar.ccv", {{ 0, }}, 0, "ar.ccv" }, - { CST, ins_const, ext_const, "ar.pfs", {{ 0, }}, 0, "ar.pfs" }, - { CST, ins_const, ext_const, "1", {{ 0, }}, 0, "1" }, - { CST, ins_const, ext_const, "8", {{ 0, }}, 0, "1" }, - { CST, ins_const, ext_const, "16", {{ 0, }}, 0, "16" }, - { CST, ins_const, ext_const, "r0", {{ 0, }}, 0, "r0" }, - { CST, ins_const, ext_const, "ip", {{ 0, }}, 0, "ip" }, - { CST, ins_const, ext_const, "pr", {{ 0, }}, 0, "pr" }, - { CST, ins_const, ext_const, "pr.rot", {{ 0, }}, 0, "pr.rot" }, - { CST, ins_const, ext_const, "psr", {{ 0, }}, 0, "psr" }, - { CST, ins_const, ext_const, "psr.l", {{ 0, }}, 0, "psr.l" }, - { CST, ins_const, ext_const, "psr.um", {{ 0, }}, 0, "psr.um" }, + { CST, ins_const, ext_const, "NIL", {{ 0, 0}}, 0, "" }, + { CST, ins_const, ext_const, "ar.csd", {{ 0, 0}}, 0, "ar.csd" }, + { CST, ins_const, ext_const, "ar.ccv", {{ 0, 0}}, 0, "ar.ccv" }, + { CST, ins_const, ext_const, "ar.pfs", {{ 0, 0}}, 0, "ar.pfs" }, + { CST, ins_const, ext_const, "1", {{ 0, 0}}, 0, "1" }, + { CST, ins_const, ext_const, "8", {{ 0, 0}}, 0, "8" }, + { CST, ins_const, ext_const, "16", {{ 0, 0}}, 0, "16" }, + { CST, ins_const, ext_const, "r0", {{ 0, 0}}, 0, "r0" }, + { CST, ins_const, ext_const, "ip", {{ 0, 0}}, 0, "ip" }, + { CST, ins_const, ext_const, "pr", {{ 0, 0}}, 0, "pr" }, + { CST, ins_const, ext_const, "pr.rot", {{ 0, 0}}, 0, "pr.rot" }, + { CST, ins_const, ext_const, "psr", {{ 0, 0}}, 0, "psr" }, + { CST, ins_const, ext_const, "psr.l", {{ 0, 0}}, 0, "psr.l" }, + { CST, ins_const, ext_const, "psr.um", {{ 0, 0}}, 0, "psr.um" }, /* register operands: */ { REG, ins_reg, ext_reg, "ar", {{ 7, 20}}, 0, /* AR3 */ @@ -548,14 +546,14 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = "a 21-bit unsigned" }, { ABS, ins_imms, ext_imms, 0, /* IMM22 */ {{ 7, 13}, { 9, 27}, { 5, 22}, { 1, 36}}, SDEC, - "a 22-bit integer" }, + "a 22-bit signed integer" }, { ABS, ins_immu, ext_immu, 0, /* IMMU24 */ {{21, 6}, { 2, 31}, { 1, 36}}, 0, "a 24-bit unsigned" }, { ABS, ins_imms16,ext_imms16,0, {{27, 6}, { 1, 36}}, 0, /* IMM44 */ "a 44-bit unsigned (least 16 bits ignored/zeroes)" }, { ABS, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* IMMU62 */ - "a 62-bit unsigned" }, + "a 62-bit unsigned" }, { ABS, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* IMMU64 */ "a 64-bit unsigned" }, { ABS, ins_inc3, ext_inc3, 0, {{ 3, 13}}, SDEC, /* INC3 */ @@ -580,7 +578,10 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = {{ 7, 6}, {13, 20}, { 1, 36}}, 0, "a branch target" }, { REL, ins_imms4, ext_imms4, 0, {{20, 13}, { 1, 36}}, 0, /* TGT25c */ - "a branch target" }, - { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* TGT64 */ "a branch target" }, + { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* TGT64 */ + "a branch target" }, + + { ABS, ins_const, ext_const, 0, {{0, 0}}, 0, /* LDXMOV */ + "ldxmov target" }, };