X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=bfd%2Felfxx-mips.c;h=e349e8aa7726fdb2b8ee966152171842b71d9de3;hb=6487709f3fca687ba1420b6487db5cd1e7cf8cde;hp=d649676e2254f59df12cb292e26af0d269de5afd;hpb=5e7fc731f80e0d08385a05ad47dda332a49d9341;p=deliverable%2Fbinutils-gdb.git diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index d649676e22..e349e8aa77 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -1,5 +1,5 @@ /* MIPS-specific support for ELF - Copyright (C) 1993-2016 Free Software Foundation, Inc. + Copyright (C) 1993-2018 Free Software Foundation, Inc. Most of the information added by Ian Lance Taylor, Cygnus Support, . @@ -310,14 +310,17 @@ struct mips_elf_hash_sort_data struct elf_link_hash_entry *low; /* The least dynamic symbol table index corresponding to a non-TLS symbol with a GOT entry. */ - long min_got_dynindx; + bfd_size_type min_got_dynindx; /* The greatest dynamic symbol table index corresponding to a symbol with a GOT entry that is not referenced (e.g., a dynamic symbol with dynamic relocations pointing to it from non-primary GOTs). */ - long max_unref_got_dynindx; - /* The greatest dynamic symbol table index not corresponding to a + bfd_size_type max_unref_got_dynindx; + /* The greatest dynamic symbol table index corresponding to a local + symbol. */ + bfd_size_type max_local_dynindx; + /* The greatest dynamic symbol table index corresponding to an external symbol without a GOT entry. */ - long max_non_got_dynindx; + bfd_size_type max_non_got_dynindx; }; /* We make up to two PLT entries if needed, one for standard MIPS code @@ -443,6 +446,9 @@ struct mips_elf_link_hash_table /* True if we can only use 32-bit microMIPS instructions. */ bfd_boolean insn32; + /* True if we suppress checks for invalid branches between ISA modes. */ + bfd_boolean ignore_branch_isa; + /* True if we're generating code for VxWorks. */ bfd_boolean is_vxworks; @@ -451,8 +457,6 @@ struct mips_elf_link_hash_table /* Shortcuts to some dynamic sections, or NULL if they are not being used. */ - asection *srelbss; - asection *sdynbss; asection *srelplt2; asection *sstubs; @@ -864,8 +868,8 @@ static bfd *reldyn_sorting_bfd; /* Put out word-sized data. */ #define MIPS_ELF_PUT_WORD(abfd, val, ptr) \ - (ABI_64_P (abfd) \ - ? bfd_put_64 (abfd, val, ptr) \ + (ABI_64_P (abfd) \ + ? bfd_put_64 (abfd, val, ptr) \ : bfd_put_32 (abfd, val, ptr)) /* The opcode for word-sized loads (LW or LD). */ @@ -877,7 +881,7 @@ static bfd *reldyn_sorting_bfd; _bfd_elf_add_dynamic_entry (info, tag, val) #define MIPS_ELF_RTYPE_TO_HOWTO(abfd, rtype, rela) \ - (get_elf_backend_data (abfd)->elf_backend_mips_rtype_to_howto (rtype, rela)) + (get_elf_backend_data (abfd)->elf_backend_mips_rtype_to_howto (abfd, rtype, rela)) /* The name of the dynamic relocation section. */ #define MIPS_ELF_REL_DYN_NAME(INFO) \ @@ -906,7 +910,7 @@ static bfd *reldyn_sorting_bfd; #define STUB_LW(abfd) \ ((ABI_64_P (abfd) \ ? 0xdf998010 /* ld t9,0x8010(gp) */ \ - : 0x8f998010)) /* lw t9,0x8010(gp) */ + : 0x8f998010)) /* lw t9,0x8010(gp) */ #define STUB_MOVE 0x03e07825 /* or t7,ra,zero */ #define STUB_LUI(VAL) (0x3c180000 + (VAL)) /* lui t8,VAL */ #define STUB_JALR 0x0320f809 /* jalr ra,t9 */ @@ -947,9 +951,9 @@ static bfd *reldyn_sorting_bfd; /* The name of the dynamic interpreter. This is put in the .interp section. */ -#define ELF_DYNAMIC_INTERPRETER(abfd) \ - (ABI_N32_P (abfd) ? "/usr/lib32/libc.so.1" \ - : ABI_64_P (abfd) ? "/usr/lib64/libc.so.1" \ +#define ELF_DYNAMIC_INTERPRETER(abfd) \ + (ABI_N32_P (abfd) ? "/usr/lib32/libc.so.1" \ + : ABI_64_P (abfd) ? "/usr/lib64/libc.so.1" \ : "/usr/lib/libc.so.1") #ifdef BFD64 @@ -1188,7 +1192,7 @@ static void bfd_put_micromips_32 (const bfd *abfd, bfd_vma opcode, bfd_byte *ptr) { bfd_put_16 (abfd, (opcode >> 16) & 0xffff, ptr); - bfd_put_16 (abfd, opcode & 0xffff, ptr + 2); + bfd_put_16 (abfd, opcode & 0xffff, ptr + 2); } /* microMIPS 32-bit opcode helper retriever. */ @@ -1706,8 +1710,8 @@ mips_elf_check_mips16_stubs (struct bfd_link_info *info, && ! h->need_fn_stub) { /* We don't need the fn_stub; the only references to this symbol - are 16 bit calls. Clobber the size to 0 to prevent it from - being included in the link. */ + are 16 bit calls. Clobber the size to 0 to prevent it from + being included in the link. */ h->fn_stub->size = 0; h->fn_stub->flags &= ~SEC_RELOC; h->fn_stub->reloc_count = 0; @@ -1719,8 +1723,8 @@ mips_elf_check_mips16_stubs (struct bfd_link_info *info, && ELF_ST_IS_MIPS16 (h->root.other)) { /* We don't need the call_stub; this is a 16 bit function, so - calls from other 16 bit functions are OK. Clobber the size - to 0 to prevent it from being included in the link. */ + calls from other 16 bit functions are OK. Clobber the size + to 0 to prevent it from being included in the link. */ h->call_stub->size = 0; h->call_stub->flags &= ~SEC_RELOC; h->call_stub->reloc_count = 0; @@ -1732,8 +1736,8 @@ mips_elf_check_mips16_stubs (struct bfd_link_info *info, && ELF_ST_IS_MIPS16 (h->root.other)) { /* We don't need the call_stub; this is a 16 bit function, so - calls from other 16 bit functions are OK. Clobber the size - to 0 to prevent it from being included in the link. */ + calls from other 16 bit functions are OK. Clobber the size + to 0 to prevent it from being included in the link. */ h->call_fp_stub->size = 0; h->call_fp_stub->flags &= ~SEC_RELOC; h->call_fp_stub->reloc_count = 0; @@ -2018,7 +2022,7 @@ mips_elf_check_symbols (struct mips_elf_link_hash_entry *h, void *data) +--------------+--------------------------------+ | JALX | X| Imm 20:16 | Imm 25:21 | +--------------+--------------------------------+ - | Immediate 15:0 | + | Immediate 15:0 | +-----------------------------------------------+ JALX is the 5-bit value 00011. X is 0 for jal, 1 for jalx. @@ -2048,16 +2052,16 @@ mips_elf_check_symbols (struct mips_elf_link_hash_entry *h, void *data) big-endian: +--------+----------------------+ - | | | - | | targ26-16 | - |31 26|25 0| + | | | + | | targ26-16 | + |31 26|25 0| +--------+----------------------+ little-endian: +----------+------+-------------+ - | | | | - | sub1 | | sub2 | - |0 9|10 15|16 31| + | | | | + | sub1 | | sub2 | + |0 9|10 15|16 31| +----------+--------------------+ where targ26-16 is sub1 followed by sub2 (i.e., the addend field A is ((sub1 << 16) | sub2)). @@ -2883,7 +2887,7 @@ mips_elf_output_extsym (struct mips_elf_link_hash_entry *h, void *data) const char *name; /* Use undefined class. Also, set class and type for some - special symbols. */ + special symbols. */ name = h->root.root.root.string; if (strcmp (name, mips_elf_dynsym_rtproc_names[0]) == 0 || strcmp (name, mips_elf_dynsym_rtproc_names[1]) == 0) @@ -2899,12 +2903,6 @@ mips_elf_output_extsym (struct mips_elf_link_hash_entry *h, void *data) h->esym.asym.value = mips_elf_hash_table (einfo->info)->procedure_count; } - else if (strcmp (name, "_gp_disp") == 0 && ! NEWABI_P (einfo->abfd)) - { - h->esym.asym.sc = scAbs; - h->esym.asym.st = stLabel; - h->esym.asym.value = elf_gp (einfo->abfd); - } else h->esym.asym.sc = scUndefined; } @@ -3831,12 +3829,12 @@ mips_elf_sort_hash_table (bfd *abfd, struct bfd_link_info *info) struct mips_elf_hash_sort_data hsd; struct mips_got_info *g; - if (elf_hash_table (info)->dynsymcount == 0) - return TRUE; - htab = mips_elf_hash_table (info); BFD_ASSERT (htab != NULL); + if (htab->root.dynsymcount == 0) + return TRUE; + g = htab->got_info; if (g == NULL) return TRUE; @@ -3844,20 +3842,19 @@ mips_elf_sort_hash_table (bfd *abfd, struct bfd_link_info *info) hsd.low = NULL; hsd.max_unref_got_dynindx = hsd.min_got_dynindx - = (elf_hash_table (info)->dynsymcount - g->reloc_only_gotno); - hsd.max_non_got_dynindx = count_section_dynsyms (abfd, info) + 1; - mips_elf_link_hash_traverse (((struct mips_elf_link_hash_table *) - elf_hash_table (info)), - mips_elf_sort_hash_table_f, - &hsd); + = (htab->root.dynsymcount - g->reloc_only_gotno); + /* Add 1 to local symbol indices to account for the mandatory NULL entry + at the head of the table; see `_bfd_elf_link_renumber_dynsyms'. */ + hsd.max_local_dynindx = count_section_dynsyms (abfd, info) + 1; + hsd.max_non_got_dynindx = htab->root.local_dynsymcount + 1; + mips_elf_link_hash_traverse (htab, mips_elf_sort_hash_table_f, &hsd); /* There should have been enough room in the symbol table to accommodate both the GOT and non-GOT symbols. */ + BFD_ASSERT (hsd.max_local_dynindx <= htab->root.local_dynsymcount + 1); BFD_ASSERT (hsd.max_non_got_dynindx <= hsd.min_got_dynindx); - BFD_ASSERT ((unsigned long) hsd.max_unref_got_dynindx - == elf_hash_table (info)->dynsymcount); - BFD_ASSERT (elf_hash_table (info)->dynsymcount - hsd.min_got_dynindx - == g->global_gotno); + BFD_ASSERT (hsd.max_unref_got_dynindx == htab->root.dynsymcount); + BFD_ASSERT (htab->root.dynsymcount - hsd.min_got_dynindx == g->global_gotno); /* Now we know which dynamic symbol has the lowest dynamic symbol table index in the GOT. */ @@ -3883,7 +3880,10 @@ mips_elf_sort_hash_table_f (struct mips_elf_link_hash_entry *h, void *data) switch (h->global_got_area) { case GGA_NONE: - h->root.dynindx = hsd->max_non_got_dynindx++; + if (h->root.forced_local) + h->root.dynindx = hsd->max_local_dynindx++; + else + h->root.dynindx = hsd->max_non_got_dynindx++; break; case GGA_NORMAL: @@ -5304,6 +5304,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, bfd_boolean target_is_micromips_code_p = FALSE; struct mips_elf_link_hash_table *htab; bfd *dynobj; + bfd_boolean resolved_to_zero; dynobj = elf_hash_table (info)->dynobj; htab = mips_elf_hash_table (info); @@ -5367,14 +5368,14 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, *namep = bfd_section_name (input_bfd, sec); /* For relocations against a section symbol and ones against no - symbol (absolute relocations) infer the ISA mode from the addend. */ + symbol (absolute relocations) infer the ISA mode from the addend. */ if (section_p || r_symndx == STN_UNDEF) { target_is_16_bit_code_p = (addend & 1) && !micromips_p; target_is_micromips_code_p = (addend & 1) && micromips_p; } /* For relocations against an absolute symbol infer the ISA mode - from the value of the symbol plus addend. */ + from the value of the symbol plus addend. */ else if (bfd_is_abs_section (sec)) { target_is_16_bit_code_p = ((symbol + addend) & 1) && !micromips_p; @@ -5450,7 +5451,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, { /* If this is a dynamic link, we should have created a _DYNAMIC_LINK symbol or _DYNAMIC_LINKING(for normal mips) symbol - in in _bfd_mips_elf_create_dynamic_sections. + in _bfd_mips_elf_create_dynamic_sections. Otherwise, we should define the symbol with a value of 0. FIXME: It should probably get into the symbol table somehow as well. */ @@ -5471,12 +5472,18 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, } else { + bfd_boolean reject_undefined + = (info->unresolved_syms_in_objects == RM_GENERATE_ERROR + || ELF_ST_VISIBILITY (h->root.other) != STV_DEFAULT); + (*info->callbacks->undefined_symbol) (info, h->root.root.root.string, input_bfd, - input_section, relocation->r_offset, - (info->unresolved_syms_in_objects == RM_GENERATE_ERROR) - || ELF_ST_VISIBILITY (h->root.other)); - return bfd_reloc_undefined; + input_section, relocation->r_offset, reject_undefined); + + if (reject_undefined) + return bfd_reloc_undefined; + + symbol = 0; } target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (h->root.other); @@ -5569,7 +5576,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, sec = h->call_stub; else sec = h->call_fp_stub; - } + } BFD_ASSERT (sec->size > 0); symbol = sec->output_section->vma + sec->output_offset; @@ -5659,6 +5666,10 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, addend = 0; } + resolved_to_zero = (h != NULL + && UNDEFWEAK_NO_DYNAMIC_RELOC (info, + &h->root)); + /* If we haven't already determined the GOT offset, and we're going to need it, get it now. */ switch (r_type) @@ -5790,7 +5801,8 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, && r_symndx != STN_UNDEF && (h == NULL || h->root.root.type != bfd_link_hash_undefweak - || ELF_ST_VISIBILITY (h->root.other) == STV_DEFAULT) + || (ELF_ST_VISIBILITY (h->root.other) == STV_DEFAULT + && !resolved_to_zero)) && (input_section->flags & SEC_ALLOC) != 0) { /* If we're creating a shared library, then we can't know @@ -5851,7 +5863,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak) && (*cross_mode_jump_p ? (value & 3) != (r_type == R_MIPS_26) - : (value & ((1 << shift) - 1)) != (r_type != R_MIPS_26))) + : (value & ((1 << shift) - 1)) != (r_type != R_MIPS_26))) return bfd_reloc_outofrange; value >>= shift; @@ -5902,9 +5914,9 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, else { /* For MIPS16 ABI code we generate this sequence - 0: li $v0,%hi(_gp_disp) - 4: addiupc $v1,%lo(_gp_disp) - 8: sll $v0,16 + 0: li $v0,%hi(_gp_disp) + 4: addiupc $v1,%lo(_gp_disp) + 8: sll $v0,16 12: addu $v0,$v1 14: move $gp,$v0 So the offsets of hi and lo relocs are the same, but the @@ -6042,8 +6054,8 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, addend = _bfd_mips_elf_sign_extend (addend, 18); /* No need to exclude weak undefined symbols here as they resolve - to 0 and never set `*cross_mode_jump_p', so this alignment check - will never trigger for them. */ + to 0 and never set `*cross_mode_jump_p', so this alignment check + will never trigger for them. */ if (*cross_mode_jump_p ? ((symbol + addend) & 3) != 1 : ((symbol + addend) & 3) != 0) @@ -6272,7 +6284,13 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, when the symbol does not resolve locally. */ if (h != NULL && !SYMBOL_CALLS_LOCAL (info, &h->root)) return bfd_reloc_continue; + /* We can't optimize cross-mode jumps either. */ + if (*cross_mode_jump_p) + return bfd_reloc_continue; value = symbol + addend; + /* Neither we can non-instruction-aligned targets. */ + if (r_type == R_MIPS_JALR ? (value & 3) != 0 : (value & 1) == 0) + return bfd_reloc_continue; break; case R_MIPS_PJUMP: @@ -6355,7 +6373,7 @@ mips_elf_perform_relocation (struct bfd_link_info *info, : opcode == 0x1d) { info->callbacks->einfo - (_("%X%H: Unsupported JALX to the same ISA mode\n"), + (_("%X%H: unsupported JALX to the same ISA mode\n"), input_bfd, input_section, relocation->r_offset); return TRUE; } @@ -6384,11 +6402,11 @@ mips_elf_perform_relocation (struct bfd_link_info *info, } /* If the opcode is not JAL or JALX, there's a problem. We cannot - convert J or JALS to JALX. */ + convert J or JALS to JALX. */ if (!ok) { info->callbacks->einfo - (_("%X%H: Unsupported jump between ISA modes; " + (_("%X%H: unsupported jump between ISA modes; " "consider recompiling with interlinking enabled\n"), input_bfd, input_section, relocation->r_offset); return TRUE; @@ -6402,6 +6420,7 @@ mips_elf_perform_relocation (struct bfd_link_info *info, bfd_boolean ok = FALSE; bfd_vma opcode = x >> 16; bfd_vma jalx_opcode = 0; + bfd_vma sign_bit = 0; bfd_vma addr; bfd_vma dest; @@ -6409,40 +6428,45 @@ mips_elf_perform_relocation (struct bfd_link_info *info, { ok = opcode == 0x4060; jalx_opcode = 0x3c; + sign_bit = 0x10000; value <<= 1; } else if (r_type == R_MIPS_PC16 || r_type == R_MIPS_GNU_REL16_S2) { ok = opcode == 0x411; jalx_opcode = 0x1d; + sign_bit = 0x20000; value <<= 2; } - if (bfd_link_pic (info) || !ok) + if (ok && !bfd_link_pic (info)) { - info->callbacks->einfo - (_("%X%H: Unsupported branch between ISA modes\n"), - input_bfd, input_section, relocation->r_offset); - return TRUE; - } + addr = (input_section->output_section->vma + + input_section->output_offset + + relocation->r_offset + + 4); + dest = (addr + + (((value & ((sign_bit << 1) - 1)) ^ sign_bit) - sign_bit)); - addr = (input_section->output_section->vma - + input_section->output_offset - + relocation->r_offset - + 4); - dest = addr + (((value & 0x3ffff) ^ 0x20000) - 0x20000); + if ((addr >> 28) << 28 != (dest >> 28) << 28) + { + info->callbacks->einfo + (_("%X%H: cannot convert branch between ISA modes " + "to JALX: relocation out of range\n"), + input_bfd, input_section, relocation->r_offset); + return TRUE; + } - if ((addr >> 28) << 28 != (dest >> 28) << 28) + /* Make this the JALX opcode. */ + x = ((dest >> 2) & 0x3ffffff) | jalx_opcode << 26; + } + else if (!mips_elf_hash_table (info)->ignore_branch_isa) { info->callbacks->einfo - (_("%X%H: Cannot convert branch between ISA modes " - "to JALX: relocation out of range\n"), + (_("%X%H: unsupported branch between ISA modes\n"), input_bfd, input_section, relocation->r_offset); return TRUE; } - - /* Make this the JALX opcode. */ - x = ((dest >> 2) & 0x3ffffff) | jalx_opcode << 26; } /* Try converting JAL to BAL and J(AL)R to B(AL), if the target is in @@ -6451,13 +6475,13 @@ mips_elf_perform_relocation (struct bfd_link_info *info, && !cross_mode_jump_p && ((JAL_TO_BAL_P (input_bfd) && r_type == R_MIPS_26 - && (x >> 26) == 0x3) /* jal addr */ + && (x >> 26) == 0x3) /* jal addr */ || (JALR_TO_BAL_P (input_bfd) && r_type == R_MIPS_JALR - && x == 0x0320f809) /* jalr t9 */ + && x == 0x0320f809) /* jalr t9 */ || (JR_TO_B_P (input_bfd) && r_type == R_MIPS_JALR - && x == 0x03200008))) /* jr t9 */ + && (x & ~1) == 0x03200008))) /* jr t9 / jalr zero, t9 */ { bfd_vma addr; bfd_vma dest; @@ -6474,7 +6498,7 @@ mips_elf_perform_relocation (struct bfd_link_info *info, off = dest - addr; if (off <= 0x1ffff && off >= -0x20000) { - if (x == 0x03200008) /* jr t9 */ + if ((x & ~1) == 0x03200008) /* jr t9 / jalr zero, t9 */ x = 0x10000000 | (((bfd_vma) off >> 2) & 0xffff); /* b addr */ else x = 0x04110000 | (((bfd_vma) off >> 2) & 0xffff); /* bal addr */ @@ -6779,6 +6803,9 @@ _bfd_elf_mips_mach (flagword flags) case E_MIPS_MACH_XLR: return bfd_mach_mips_xlr; + case E_MIPS_MACH_IAMR2: + return bfd_mach_mips_interaptiv_mr2; + default: switch (flags & EF_MIPS_ARCH) { @@ -6938,7 +6965,7 @@ _bfd_mips_elf_symbol_processing (bfd *abfd, asymbol *asym) { asym->section = section; /* MIPS_TEXT is a bit special, the address is not an offset - to the base of the .text section. So substract the section + to the base of the .text section. So subtract the section base address to make it an offset. */ asym->value -= section->vma; } @@ -6953,7 +6980,7 @@ _bfd_mips_elf_symbol_processing (bfd *abfd, asymbol *asym) { asym->section = section; /* MIPS_DATA is a bit special, the address is not an offset - to the base of the .data section. So substract the section + to the base of the .data section. So subtract the section base address to make it an offset. */ asym->value -= section->vma; } @@ -6996,10 +7023,10 @@ _bfd_mips_elf_symbol_processing (bfd *abfd, asymbol *asym) We therefore take the following approach: - If ABFD contains a .gcc_compiled_longXX section, use it to - determine the pointer size. + determine the pointer size. - Otherwise check the type of the first relocation. Assume that - the LP64 ABI is being used if the relocation is of type R_MIPS_64. + the LP64 ABI is being used if the relocation is of type R_MIPS_64. - Otherwise punt. @@ -7014,7 +7041,7 @@ _bfd_mips_elf_symbol_processing (bfd *abfd, asymbol *asym) did so. */ unsigned int -_bfd_mips_elf_eh_frame_address_size (bfd *abfd, asection *sec) +_bfd_mips_elf_eh_frame_address_size (bfd *abfd, const asection *sec) { if (elf_elfheader (abfd)->e_ident[EI_CLASS] == ELFCLASS64) return 8; @@ -7075,9 +7102,19 @@ _bfd_mips_elf_section_processing (bfd *abfd, Elf_Internal_Shdr *hdr) { bfd_byte buf[4]; - BFD_ASSERT (hdr->sh_size == sizeof (Elf32_External_RegInfo)); BFD_ASSERT (hdr->contents == NULL); + if (hdr->sh_size != sizeof (Elf32_External_RegInfo)) + { + _bfd_error_handler + (_("%pB: incorrect `.reginfo' section size; " + "expected %" PRIu64 ", got %" PRIu64), + abfd, (uint64_t) sizeof (Elf32_External_RegInfo), + (uint64_t) hdr->sh_size); + bfd_set_error (bfd_error_bad_value); + return FALSE; + } + if (bfd_seek (abfd, hdr->sh_offset + sizeof (Elf32_External_RegInfo) - 4, SEEK_SET) != 0) @@ -7114,7 +7151,8 @@ _bfd_mips_elf_section_processing (bfd *abfd, Elf_Internal_Shdr *hdr) { _bfd_error_handler /* xgettext:c-format */ - (_("%B: Warning: bad `%s' option size %u smaller than its header"), + (_("%pB: warning: bad `%s' option size %u smaller than" + " its header"), abfd, MIPS_ELF_OPTIONS_SECTION_NAME (abfd), intopt.size); break; } @@ -7259,7 +7297,7 @@ _bfd_mips_elf_section_from_shdr (bfd *abfd, break; case SHT_MIPS_DWARF: if (! CONST_STRNEQ (name, ".debug_") - && ! CONST_STRNEQ (name, ".zdebug_")) + && ! CONST_STRNEQ (name, ".zdebug_")) return FALSE; break; case SHT_MIPS_SYMBOL_LIB: @@ -7348,7 +7386,8 @@ _bfd_mips_elf_section_from_shdr (bfd *abfd, { _bfd_error_handler /* xgettext:c-format */ - (_("%B: Warning: bad `%s' option size %u smaller than its header"), + (_("%pB: warning: bad `%s' option size %u smaller than" + " its header"), abfd, MIPS_ELF_OPTIONS_SECTION_NAME (abfd), intopt.size); break; } @@ -7411,7 +7450,7 @@ _bfd_mips_elf_fake_sections (bfd *abfd, Elf_Internal_Shdr *hdr, asection *sec) { hdr->sh_type = SHT_MIPS_DEBUG; /* In a shared object on IRIX 5.3, the .mdebug section has an - entsize of 0. FIXME: Does this matter? */ + entsize of 0. FIXME: Does this matter? */ if (SGI_COMPAT (abfd) && (abfd->flags & DYNAMIC) != 0) hdr->sh_entsize = 0; else @@ -7421,7 +7460,7 @@ _bfd_mips_elf_fake_sections (bfd *abfd, Elf_Internal_Shdr *hdr, asection *sec) { hdr->sh_type = SHT_MIPS_REGINFO; /* In a shared object on IRIX 5.3, the .reginfo section has an - entsize of 0x18. FIXME: Does this matter? */ + entsize of 0x18. FIXME: Does this matter? */ if (SGI_COMPAT (abfd)) { if ((abfd->flags & DYNAMIC) != 0) @@ -7474,7 +7513,7 @@ _bfd_mips_elf_fake_sections (bfd *abfd, Elf_Internal_Shdr *hdr, asection *sec) hdr->sh_entsize = sizeof (Elf_External_ABIFlags_v0); } else if (CONST_STRNEQ (name, ".debug_") - || CONST_STRNEQ (name, ".zdebug_")) + || CONST_STRNEQ (name, ".zdebug_")) { hdr->sh_type = SHT_MIPS_DWARF; @@ -7488,7 +7527,7 @@ _bfd_mips_elf_fake_sections (bfd *abfd, Elf_Internal_Shdr *hdr, asection *sec) { hdr->sh_type = SHT_MIPS_SYMBOL_LIB; /* The sh_link and sh_info fields are set in - final_write_processing. */ + final_write_processing. */ } else if (CONST_STRNEQ (name, ".MIPS.events") || CONST_STRNEQ (name, ".MIPS.post_rel")) @@ -7618,8 +7657,8 @@ _bfd_mips_elf_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, elf_text_symbol->section = elf_text_section; } /* This code used to do *secp = bfd_und_section_ptr if - bfd_link_pic (info). I don't know why, and that doesn't make sense, - so I took it out. */ + bfd_link_pic (info). I don't know why, and that doesn't make sense, + so I took it out. */ *secp = mips_elf_tdata (abfd)->elf_text_section; break; @@ -7659,8 +7698,8 @@ _bfd_mips_elf_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, elf_data_symbol->section = elf_data_section; } /* This code used to do *secp = bfd_und_section_ptr if - bfd_link_pic (info). I don't know why, and that doesn't make sense, - so I took it out. */ + bfd_link_pic (info). I don't know why, and that doesn't make sense, + so I took it out. */ *secp = mips_elf_tdata (abfd)->elf_data_section; break; @@ -7893,16 +7932,6 @@ _bfd_mips_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) if (!_bfd_elf_create_dynamic_sections (abfd, info)) return FALSE; - /* Cache the sections created above. */ - htab->sdynbss = bfd_get_linker_section (abfd, ".dynbss"); - if (htab->is_vxworks) - htab->srelbss = bfd_get_linker_section (abfd, ".rela.bss"); - if (!htab->sdynbss - || (htab->is_vxworks && !htab->srelbss && !bfd_link_pic (info)) - || !htab->root.srelplt - || !htab->root.splt) - abort (); - /* Do the usual VxWorks handling. */ if (htab->is_vxworks && !elf_vxworks_create_dynamic_sections (abfd, info, &htab->srelplt2)) @@ -8096,7 +8125,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, extsymoff = (elf_bad_symtab (abfd)) ? 0 : symtab_hdr->sh_info; bed = get_elf_backend_data (abfd); - rel_end = relocs + sec->reloc_count * bed->s->int_rels_per_ext_rel; + rel_end = relocs + sec->reloc_count; /* Check for the mips16 stub sections. */ @@ -8106,14 +8135,14 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, unsigned long r_symndx; /* Look at the relocation information to figure out which symbol - this is for. */ + this is for. */ r_symndx = mips16_stub_symndx (bed, sec, relocs, rel_end); if (r_symndx == 0) { _bfd_error_handler /* xgettext:c-format */ - (_("%B: Warning: cannot determine the target function for" + (_("%pB: warning: cannot determine the target function for" " stub section `%s'"), abfd, name); bfd_set_error (bfd_error_bad_value); @@ -8126,8 +8155,8 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, asection *o; /* This stub is for a local symbol. This stub will only be - needed if there is some relocation in this BFD, other - than a 16 bit function call, which refers to this symbol. */ + needed if there is some relocation in this BFD, other + than a 16 bit function call, which refers to this symbol. */ for (o = abfd->sections; o != NULL; o = o->next) { Elf_Internal_Rela *sec_relocs; @@ -8161,16 +8190,16 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, if (o == NULL) { /* There is no non-call reloc for this stub, so we do - not need it. Since this function is called before - the linker maps input sections to output sections, we - can easily discard it by setting the SEC_EXCLUDE - flag. */ + not need it. Since this function is called before + the linker maps input sections to output sections, we + can easily discard it by setting the SEC_EXCLUDE + flag. */ sec->flags |= SEC_EXCLUDE; return TRUE; } /* Record this stub in an array of local symbol stubs for - this BFD. */ + this BFD. */ if (mips_elf_tdata (abfd)->local_stubs == NULL) { unsigned long symcount; @@ -8192,9 +8221,9 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, mips_elf_tdata (abfd)->local_stubs[r_symndx] = sec; /* We don't need to set mips16_stubs_seen in this case. - That flag is used to see whether we need to look through - the global symbol table for stubs. We don't need to set - it here, because we just have a local stub. */ + That flag is used to see whether we need to look through + the global symbol table for stubs. We don't need to set + it here, because we just have a local stub. */ } else { @@ -8232,14 +8261,14 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, asection **loc; /* Look at the relocation information to figure out which symbol - this is for. */ + this is for. */ r_symndx = mips16_stub_symndx (bed, sec, relocs, rel_end); if (r_symndx == 0) { _bfd_error_handler /* xgettext:c-format */ - (_("%B: Warning: cannot determine the target function for" + (_("%pB: warning: cannot determine the target function for" " stub section `%s'"), abfd, name); bfd_set_error (bfd_error_bad_value); @@ -8252,8 +8281,8 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, asection *o; /* This stub is for a local symbol. This stub will only be - needed if there is some relocation (R_MIPS16_26) in this BFD - that refers to this symbol. */ + needed if there is some relocation (R_MIPS16_26) in this BFD + that refers to this symbol. */ for (o = abfd->sections; o != NULL; o = o->next) { Elf_Internal_Rela *sec_relocs; @@ -8287,16 +8316,16 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, if (o == NULL) { /* There is no non-call reloc for this stub, so we do - not need it. Since this function is called before - the linker maps input sections to output sections, we - can easily discard it by setting the SEC_EXCLUDE - flag. */ + not need it. Since this function is called before + the linker maps input sections to output sections, we + can easily discard it by setting the SEC_EXCLUDE + flag. */ sec->flags |= SEC_EXCLUDE; return TRUE; } /* Record this stub in an array of local symbol call_stubs for - this BFD. */ + this BFD. */ if (mips_elf_tdata (abfd)->local_call_stubs == NULL) { unsigned long symcount; @@ -8318,9 +8347,9 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, mips_elf_tdata (abfd)->local_call_stubs[r_symndx] = sec; /* We don't need to set mips16_stubs_seen in this case. - That flag is used to see whether we need to look through - the global symbol table for stubs. We don't need to set - it here, because we just have a local stub. */ + That flag is used to see whether we need to look through + the global symbol table for stubs. We don't need to set + it here, because we just have a local stub. */ } else { @@ -8371,7 +8400,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, { _bfd_error_handler /* xgettext:c-format */ - (_("%B: Malformed reloc detected for section %s"), + (_("%pB: malformed reloc detected for section %s"), abfd, name); bfd_set_error (bfd_error_bad_value); return FALSE; @@ -8384,10 +8413,6 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, while (h->root.type == bfd_link_hash_indirect || h->root.type == bfd_link_hash_warning) h = (struct elf_link_hash_entry *) h->root.u.i.link; - - /* PR15323, ref flags aren't set for references in the - same object. */ - h->root.non_ir_ref = 1; } } @@ -8447,8 +8472,8 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, { _bfd_error_handler /* xgettext:c-format */ - (_("%B: GOT reloc at 0x%lx not expected in executables"), - abfd, (unsigned long) rel->r_offset); + (_("%pB: GOT reloc at %#" PRIx64 " not expected in executables"), + abfd, (uint64_t) rel->r_offset); bfd_set_error (bfd_error_bad_value); return FALSE; } @@ -8585,8 +8610,8 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, { _bfd_error_handler /* xgettext:c-format */ - (_("%B: CALL16 reloc at 0x%lx not against global symbol"), - abfd, (unsigned long) rel->r_offset); + (_("%pB: CALL16 reloc at %#" PRIx64 " not against global symbol"), + abfd, (uint64_t) rel->r_offset); bfd_set_error (bfd_error_bad_value); return FALSE; } @@ -8795,12 +8820,12 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, } /* Record the need for a PLT entry. At this point we don't know - yet if we are going to create a PLT in the first place, but - we only record whether the relocation requires a standard MIPS - or a compressed code entry anyway. If we don't make a PLT after - all, then we'll just ignore these arrangements. Likewise if - a PLT entry is not created because the symbol is satisfied - locally. */ + yet if we are going to create a PLT in the first place, but + we only record whether the relocation requires a standard MIPS + or a compressed code entry anyway. If we don't make a PLT after + all, then we'll just ignore these arrangements. Likewise if + a PLT entry is not created because the symbol is satisfied + locally. */ if (h != NULL && (branch_reloc_p (r_type) || mips16_branch_reloc_p (r_type) @@ -8871,7 +8896,8 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, FALSE); _bfd_error_handler /* xgettext:c-format */ - (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), + (_("%pB: relocation %s against `%s' can not be used" + " when making a shared object; recompile with -fPIC"), abfd, howto->name, (h) ? h->root.root.string : "a local symbol"); bfd_set_error (bfd_error_bad_value); @@ -8885,167 +8911,6 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, return TRUE; } -bfd_boolean -_bfd_mips_relax_section (bfd *abfd, asection *sec, - struct bfd_link_info *link_info, - bfd_boolean *again) -{ - Elf_Internal_Rela *internal_relocs; - Elf_Internal_Rela *irel, *irelend; - Elf_Internal_Shdr *symtab_hdr; - bfd_byte *contents = NULL; - size_t extsymoff; - bfd_boolean changed_contents = FALSE; - bfd_vma sec_start = sec->output_section->vma + sec->output_offset; - Elf_Internal_Sym *isymbuf = NULL; - - /* We are not currently changing any sizes, so only one pass. */ - *again = FALSE; - - if (bfd_link_relocatable (link_info)) - return TRUE; - - internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, - link_info->keep_memory); - if (internal_relocs == NULL) - return TRUE; - - irelend = internal_relocs + sec->reloc_count - * get_elf_backend_data (abfd)->s->int_rels_per_ext_rel; - symtab_hdr = &elf_tdata (abfd)->symtab_hdr; - extsymoff = (elf_bad_symtab (abfd)) ? 0 : symtab_hdr->sh_info; - - for (irel = internal_relocs; irel < irelend; irel++) - { - bfd_vma symval; - bfd_signed_vma sym_offset; - unsigned int r_type; - unsigned long r_symndx; - asection *sym_sec; - unsigned long instruction; - - /* Turn jalr into bgezal, and jr into beq, if they're marked - with a JALR relocation, that indicate where they jump to. - This saves some pipeline bubbles. */ - r_type = ELF_R_TYPE (abfd, irel->r_info); - if (r_type != R_MIPS_JALR) - continue; - - r_symndx = ELF_R_SYM (abfd, irel->r_info); - /* Compute the address of the jump target. */ - if (r_symndx >= extsymoff) - { - struct mips_elf_link_hash_entry *h - = ((struct mips_elf_link_hash_entry *) - elf_sym_hashes (abfd) [r_symndx - extsymoff]); - - while (h->root.root.type == bfd_link_hash_indirect - || h->root.root.type == bfd_link_hash_warning) - h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link; - - /* If a symbol is undefined, or if it may be overridden, - skip it. */ - if (! ((h->root.root.type == bfd_link_hash_defined - || h->root.root.type == bfd_link_hash_defweak) - && h->root.root.u.def.section) - || (bfd_link_pic (link_info) && ! link_info->symbolic - && !h->root.forced_local)) - continue; - - sym_sec = h->root.root.u.def.section; - if (sym_sec->output_section) - symval = (h->root.root.u.def.value - + sym_sec->output_section->vma - + sym_sec->output_offset); - else - symval = h->root.root.u.def.value; - } - else - { - Elf_Internal_Sym *isym; - - /* Read this BFD's symbols if we haven't done so already. */ - if (isymbuf == NULL && symtab_hdr->sh_info != 0) - { - isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; - if (isymbuf == NULL) - isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, - symtab_hdr->sh_info, 0, - NULL, NULL, NULL); - if (isymbuf == NULL) - goto relax_return; - } - - isym = isymbuf + r_symndx; - if (isym->st_shndx == SHN_UNDEF) - continue; - else if (isym->st_shndx == SHN_ABS) - sym_sec = bfd_abs_section_ptr; - else if (isym->st_shndx == SHN_COMMON) - sym_sec = bfd_com_section_ptr; - else - sym_sec - = bfd_section_from_elf_index (abfd, isym->st_shndx); - symval = isym->st_value - + sym_sec->output_section->vma - + sym_sec->output_offset; - } - - /* Compute branch offset, from delay slot of the jump to the - branch target. */ - sym_offset = (symval + irel->r_addend) - - (sec_start + irel->r_offset + 4); - - /* Branch offset must be properly aligned. */ - if ((sym_offset & 3) != 0) - continue; - - sym_offset >>= 2; - - /* Check that it's in range. */ - if (sym_offset < -0x8000 || sym_offset >= 0x8000) - continue; - - /* Get the section contents if we haven't done so already. */ - if (!mips_elf_get_section_contents (abfd, sec, &contents)) - goto relax_return; - - instruction = bfd_get_32 (abfd, contents + irel->r_offset); - - /* If it was jalr , turn it into bgezal $zero, . */ - if ((instruction & 0xfc1fffff) == 0x0000f809) - instruction = 0x04110000; - /* If it was jr , turn it into b . */ - else if ((instruction & 0xfc1fffff) == 0x00000008) - instruction = 0x10000000; - else - continue; - - instruction |= (sym_offset & 0xffff); - bfd_put_32 (abfd, instruction, contents + irel->r_offset); - changed_contents = TRUE; - } - - if (contents != NULL - && elf_section_data (sec)->this_hdr.contents != contents) - { - if (!changed_contents && !link_info->keep_memory) - free (contents); - else - { - /* Cache the section contents for elf_link_input_bfd. */ - elf_section_data (sec)->this_hdr.contents = contents; - } - } - return TRUE; - - relax_return: - if (contents != NULL - && elf_section_data (sec)->this_hdr.contents != contents) - free (contents); - return FALSE; -} - /* Allocate space for global sym dynamic relocs. */ static bfd_boolean @@ -9087,7 +8952,8 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) { /* Do not copy relocations for undefined weak symbols with non-default visibility. */ - if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) + if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT + || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) do_copy = FALSE; /* Make sure undefined weak symbols are output as a dynamic @@ -9141,6 +9007,7 @@ _bfd_mips_elf_adjust_dynamic_symbol (struct bfd_link_info *info, bfd *dynobj; struct mips_elf_link_hash_entry *hmips; struct mips_elf_link_hash_table *htab; + asection *s, *srel; htab = mips_elf_hash_table (info); BFD_ASSERT (htab != NULL); @@ -9151,7 +9018,7 @@ _bfd_mips_elf_adjust_dynamic_symbol (struct bfd_link_info *info, /* Make sure we know what is going on here. */ BFD_ASSERT (dynobj != NULL && (h->needs_plt - || h->u.weakdef != NULL + || h->is_weakalias || (h->def_dynamic && h->ref_regular && !h->def_regular))); @@ -9203,8 +9070,8 @@ _bfd_mips_elf_adjust_dynamic_symbol (struct bfd_link_info *info, bfd_boolean newabi_p = NEWABI_P (info->output_bfd); /* If this is the first symbol to need a PLT entry, then make some - basic setup. Also work out PLT entry sizes. We'll need them - for PLT offset calculations. */ + basic setup. Also work out PLT entry sizes. We'll need them + for PLT offset calculations. */ if (htab->plt_mips_offset + htab->plt_comp_offset == 0) { BFD_ASSERT (htab->root.sgotplt->size == 0); @@ -9275,13 +9142,13 @@ _bfd_mips_elf_adjust_dynamic_symbol (struct bfd_link_info *info, return FALSE; /* There are no defined MIPS16 or microMIPS PLT entries for VxWorks, - n32 or n64, so always use a standard entry there. + n32 or n64, so always use a standard entry there. - If the symbol has a MIPS16 call stub and gets a PLT entry, then - all MIPS16 calls will go via that stub, and there is no benefit - to having a MIPS16 entry. And in the case of call_stub a - standard entry actually has to be used as the stub ends with a J - instruction. */ + If the symbol has a MIPS16 call stub and gets a PLT entry, then + all MIPS16 calls will go via that stub, and there is no benefit + to having a MIPS16 entry. And in the case of call_stub a + standard entry actually has to be used as the stub ends with a J + instruction. */ if (newabi_p || htab->is_vxworks || hmips->call_stub @@ -9292,11 +9159,11 @@ _bfd_mips_elf_adjust_dynamic_symbol (struct bfd_link_info *info, } /* Otherwise, if there are no direct calls to the function, we - have a free choice of whether to use standard or compressed - entries. Prefer microMIPS entries if the object is known to - contain microMIPS code, so that it becomes possible to create - pure microMIPS binaries. Prefer standard entries otherwise, - because MIPS16 ones are no smaller and are usually slower. */ + have a free choice of whether to use standard or compressed + entries. Prefer microMIPS entries if the object is known to + contain microMIPS code, so that it becomes possible to create + pure microMIPS binaries. Prefer standard entries otherwise, + because MIPS16 ones are no smaller and are usually slower. */ if (!h->plt.plist->need_mips && !h->plt.plist->need_comp) { if (micromips_p) @@ -9343,12 +9210,12 @@ _bfd_mips_elf_adjust_dynamic_symbol (struct bfd_link_info *info, /* If this is a weak symbol, and there is a real definition, the processor independent code will have arranged for us to see the real definition first, and we can just use the same value. */ - if (h->u.weakdef != NULL) + if (h->is_weakalias) { - BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined - || h->u.weakdef->root.type == bfd_link_hash_defweak); - h->root.u.def.section = h->u.weakdef->root.u.def.section; - h->root.u.def.value = h->u.weakdef->root.u.def.value; + struct elf_link_hash_entry *def = weakdef (h); + BFD_ASSERT (def->root.type == bfd_link_hash_defined); + h->root.u.def.section = def->root.u.def.section; + h->root.u.def.value = def->root.u.def.value; return TRUE; } @@ -9383,10 +9250,20 @@ _bfd_mips_elf_adjust_dynamic_symbol (struct bfd_link_info *info, both the dynamic object and the regular object will refer to the same memory location for the variable. */ + if ((h->root.u.def.section->flags & SEC_READONLY) != 0) + { + s = htab->root.sdynrelro; + srel = htab->root.sreldynrelro; + } + else + { + s = htab->root.sdynbss; + srel = htab->root.srelbss; + } if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) { if (htab->is_vxworks) - htab->srelbss->size += sizeof (Elf32_External_Rela); + srel->size += sizeof (Elf32_External_Rela); else mips_elf_allocate_dynamic_relocations (dynobj, info, 1); h->needs_copy = 1; @@ -9396,7 +9273,7 @@ _bfd_mips_elf_adjust_dynamic_symbol (struct bfd_link_info *info, dynamic will now refer to the local copy instead. */ hmips->possibly_dynamic_relocs = 0; - return _bfd_elf_adjust_dynamic_copy (info, h, htab->sdynbss); + return _bfd_elf_adjust_dynamic_copy (info, h, s); } /* This function is called after all the input files have been read, @@ -9417,12 +9294,19 @@ _bfd_mips_elf_always_size_sections (bfd *output_bfd, /* The .reginfo section has a fixed size. */ sect = bfd_get_section_by_name (output_bfd, ".reginfo"); if (sect != NULL) - bfd_set_section_size (output_bfd, sect, sizeof (Elf32_External_RegInfo)); + { + bfd_set_section_size (output_bfd, sect, sizeof (Elf32_External_RegInfo)); + sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; + } /* The .MIPS.abiflags section has a fixed size. */ sect = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); if (sect != NULL) - bfd_set_section_size (output_bfd, sect, sizeof (Elf_External_ABIFlags_v0)); + { + bfd_set_section_size (output_bfd, sect, + sizeof (Elf_External_ABIFlags_v0)); + sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; + } hti.info = info; hti.output_bfd = output_bfd; @@ -9725,8 +9609,8 @@ mips_elf_set_plt_sym_value (struct mips_elf_link_hash_entry *h, void *data) } val += isa_bit; /* For VxWorks, point at the PLT load stub rather than the lazy - resolution stub; this stub will become the canonical function - address. */ + resolution stub; this stub will become the canonical function + address. */ if (htab->is_vxworks) val += 8; @@ -9768,17 +9652,17 @@ _bfd_mips_elf_size_dynamic_sections (bfd *output_bfd, } /* Figure out the size of the PLT header if we know that we - are using it. For the sake of cache alignment always use - a standard header whenever any standard entries are present - even if microMIPS entries are present as well. This also - lets the microMIPS header rely on the value of $v0 only set - by microMIPS entries, for a small size reduction. + are using it. For the sake of cache alignment always use + a standard header whenever any standard entries are present + even if microMIPS entries are present as well. This also + lets the microMIPS header rely on the value of $v0 only set + by microMIPS entries, for a small size reduction. - Set symbol table entry values for symbols that use the - address of their PLT entry now that we can calculate it. + Set symbol table entry values for symbols that use the + address of their PLT entry now that we can calculate it. - Also create the _PROCEDURE_LINKAGE_TABLE_ symbol if we - haven't already in _bfd_elf_create_dynamic_sections. */ + Also create the _PROCEDURE_LINKAGE_TABLE_ symbol if we + haven't already in _bfd_elf_create_dynamic_sections. */ if (htab->root.splt && htab->plt_mips_offset + htab->plt_comp_offset != 0) { bfd_boolean micromips_p = (MICROMIPS_P (output_bfd) @@ -9866,11 +9750,11 @@ _bfd_mips_elf_size_dynamic_sections (bfd *output_bfd, asection *target; /* If this relocation section applies to a read only - section, then we probably need a DT_TEXTREL entry. - If the relocation section is .rel(a).dyn, we always - assert a DT_TEXTREL entry rather than testing whether - there exists a relocation to a read only section or - not. */ + section, then we probably need a DT_TEXTREL entry. + If the relocation section is .rel(a).dyn, we always + assert a DT_TEXTREL entry rather than testing whether + there exists a relocation to a read only section or + not. */ outname = bfd_get_section_name (output_bfd, s->output_section); target = bfd_get_section_by_name (output_bfd, outname + 4); @@ -9918,7 +9802,8 @@ _bfd_mips_elf_size_dynamic_sections (bfd *output_bfd, && s != htab->root.sgot && s != htab->root.sgotplt && s != htab->sstubs - && s != htab->sdynbss) + && s != htab->root.sdynbss + && s != htab->root.sdynrelro) { /* It's not one of our sections, so don't allocate space. */ continue; @@ -10173,10 +10058,8 @@ _bfd_mips_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, const Elf_Internal_Rela *relend; bfd_vma addend = 0; bfd_boolean use_saved_addend_p = FALSE; - const struct elf_backend_data *bed; - bed = get_elf_backend_data (output_bfd); - relend = relocs + input_section->reloc_count * bed->s->int_rels_per_ext_rel; + relend = relocs + input_section->reloc_count; for (rel = relocs; rel < relend; ++rel) { const char *name; @@ -10184,7 +10067,7 @@ _bfd_mips_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, reloc_howto_type *howto; bfd_boolean cross_mode_jump_p = FALSE; /* TRUE if the relocation is a RELA relocation, rather than a - REL relocation. */ + REL relocation. */ bfd_boolean rela_relocation_p = TRUE; unsigned int r_type = ELF_R_TYPE (output_bfd, rel->r_info); const char *msg; @@ -10277,9 +10160,10 @@ _bfd_mips_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, sec); _bfd_error_handler /* xgettext:c-format */ - (_("%B: Can't find matching LO16 reloc against `%s' for %s at 0x%lx in section `%A'"), - input_bfd, input_section, name, howto->name, - rel->r_offset); + (_("%pB: can't find matching LO16 reloc against `%s'" + " for %s at %#" PRIx64 " in section `%pA'"), + input_bfd, name, + howto->name, (uint64_t) rel->r_offset, input_section); } } else @@ -10435,16 +10319,16 @@ _bfd_mips_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, msg = NULL; if (jal_reloc_p (howto->type)) msg = (cross_mode_jump_p - ? _("Cannot convert a jump to JALX " + ? _("cannot convert a jump to JALX " "for a non-word-aligned address") : (howto->type == R_MIPS16_26 - ? _("Jump to a non-word-aligned address") - : _("Jump to a non-instruction-aligned address"))); + ? _("jump to a non-word-aligned address") + : _("jump to a non-instruction-aligned address"))); else if (b_reloc_p (howto->type)) msg = (cross_mode_jump_p - ? _("Cannot convert a branch to JALX " + ? _("cannot convert a branch to JALX " "for a non-word-aligned address") - : _("Branch to a non-instruction-aligned address")); + : _("branch to a non-instruction-aligned address")); else if (aligned_pcrel_reloc_p (howto->type)) msg = _("PC-relative load from unaligned address"); if (msg) @@ -10725,7 +10609,7 @@ _bfd_mips_elf_finish_dynamic_symbol (bfd *output_bfd, bfd_put_32 (output_bfd, header_address, loc); /* Now handle the PLT itself. First the standard entry (the order - does not matter, we just have to pick one). */ + does not matter, we just have to pick one). */ if (h->plt.plist->mips_offset != MINUS_ONE) { const bfd_vma *plt_entry; @@ -10820,12 +10704,12 @@ _bfd_mips_elf_finish_dynamic_symbol (bfd *output_bfd, { _bfd_error_handler /* xgettext:c-format */ - (_("%B: `%A' offset of %ld from `%A' " + (_("%pB: `%pA' offset of %" PRId64 " from `%pA' " "beyond the range of ADDIUPC"), output_bfd, htab->root.sgotplt->output_section, - htab->root.splt->output_section, - (long) gotpc_offset); + (int64_t) gotpc_offset, + htab->root.splt->output_section); bfd_set_error (bfd_error_no_error); return FALSE; } @@ -11086,12 +10970,6 @@ _bfd_mips_elf_finish_dynamic_symbol (bfd *output_bfd, sym->st_info = ELF_ST_INFO (STB_GLOBAL, STT_SECTION); sym->st_value = 1; } - else if (strcmp (name, "_gp_disp") == 0 && ! NEWABI_P (output_bfd)) - { - sym->st_shndx = SHN_ABS; - sym->st_info = ELF_ST_INFO (STB_GLOBAL, STT_SECTION); - sym->st_value = elf_gp (output_bfd); - } else if (SGI_COMPAT (output_bfd)) { if (strcmp (name, mips_elf_dynsym_rtproc_names[0]) == 0 @@ -11308,6 +11186,8 @@ _bfd_mips_vxworks_finish_dynamic_symbol (bfd *output_bfd, if (h->needs_copy) { Elf_Internal_Rela rel; + asection *srel; + bfd_byte *loc; BFD_ASSERT (h->dynindx != -1); @@ -11316,11 +11196,13 @@ _bfd_mips_vxworks_finish_dynamic_symbol (bfd *output_bfd, + h->root.u.def.value); rel.r_info = ELF32_R_INFO (h->dynindx, R_MIPS_COPY); rel.r_addend = 0; - bfd_elf32_swap_reloca_out (output_bfd, &rel, - htab->srelbss->contents - + (htab->srelbss->reloc_count - * sizeof (Elf32_External_Rela))); - ++htab->srelbss->reloc_count; + if (h->root.u.def.section == htab->root.sdynrelro) + srel = htab->root.sreldynrelro; + else + srel = htab->root.srelbss; + loc = srel->contents + srel->reloc_count * sizeof (Elf32_External_Rela); + bfd_elf32_swap_reloca_out (output_bfd, &rel, loc); + ++srel->reloc_count; } /* If this is a mips16/microMIPS symbol, force the value to be even. */ @@ -11384,11 +11266,12 @@ mips_finish_exec_plt (bfd *output_bfd, struct bfd_link_info *info) { _bfd_error_handler /* xgettext:c-format */ - (_("%B: `%A' offset of %ld from `%A' beyond the range of ADDIUPC"), + (_("%pB: `%pA' offset of %" PRId64 " from `%pA' " + "beyond the range of ADDIUPC"), output_bfd, htab->root.sgotplt->output_section, - htab->root.splt->output_section, - (long) gotpc_offset); + (int64_t) gotpc_offset, + htab->root.splt->output_section); bfd_set_error (bfd_error_no_error); return FALSE; } @@ -12002,6 +11885,10 @@ mips_set_isa_flags (bfd *abfd) val = E_MIPS_ARCH_2; break; + case bfd_mach_mips4010: + val = E_MIPS_ARCH_2 | E_MIPS_MACH_4010; + break; + case bfd_mach_mips4000: case bfd_mach_mips4300: case bfd_mach_mips4400: @@ -12009,10 +11896,6 @@ mips_set_isa_flags (bfd *abfd) val = E_MIPS_ARCH_3; break; - case bfd_mach_mips4010: - val = E_MIPS_ARCH_3 | E_MIPS_MACH_4010; - break; - case bfd_mach_mips4100: val = E_MIPS_ARCH_3 | E_MIPS_MACH_4100; break; @@ -12106,6 +11989,10 @@ mips_set_isa_flags (bfd *abfd) val = E_MIPS_ARCH_32R2; break; + case bfd_mach_mips_interaptiv_mr2: + val = E_MIPS_ARCH_32R2 | E_MIPS_MACH_IAMR2; + break; + case bfd_mach_mipsisa64r2: case bfd_mach_mipsisa64r3: case bfd_mach_mipsisa64r5: @@ -12560,66 +12447,6 @@ _bfd_mips_elf_gc_mark_hook (asection *sec, return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); } -/* Update the got entry reference counts for the section being removed. */ - -bfd_boolean -_bfd_mips_elf_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED, - struct bfd_link_info *info ATTRIBUTE_UNUSED, - asection *sec ATTRIBUTE_UNUSED, - const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED) -{ -#if 0 - Elf_Internal_Shdr *symtab_hdr; - struct elf_link_hash_entry **sym_hashes; - bfd_signed_vma *local_got_refcounts; - const Elf_Internal_Rela *rel, *relend; - unsigned long r_symndx; - struct elf_link_hash_entry *h; - - if (bfd_link_relocatable (info)) - return TRUE; - - symtab_hdr = &elf_tdata (abfd)->symtab_hdr; - sym_hashes = elf_sym_hashes (abfd); - local_got_refcounts = elf_local_got_refcounts (abfd); - - relend = relocs + sec->reloc_count; - for (rel = relocs; rel < relend; rel++) - switch (ELF_R_TYPE (abfd, rel->r_info)) - { - case R_MIPS16_GOT16: - case R_MIPS16_CALL16: - case R_MIPS_GOT16: - case R_MIPS_CALL16: - case R_MIPS_CALL_HI16: - case R_MIPS_CALL_LO16: - case R_MIPS_GOT_HI16: - case R_MIPS_GOT_LO16: - case R_MIPS_GOT_DISP: - case R_MIPS_GOT_PAGE: - case R_MIPS_GOT_OFST: - case R_MICROMIPS_GOT16: - case R_MICROMIPS_CALL16: - case R_MICROMIPS_CALL_HI16: - case R_MICROMIPS_CALL_LO16: - case R_MICROMIPS_GOT_HI16: - case R_MICROMIPS_GOT_LO16: - case R_MICROMIPS_GOT_DISP: - case R_MICROMIPS_GOT_PAGE: - case R_MICROMIPS_GOT_OFST: - /* ??? It would seem that the existing MIPS code does no sort - of reference counting or whatnot on its GOT and PLT entries, - so it is not possible to garbage collect them at this time. */ - break; - - default: - break; - } -#endif - - return TRUE; -} - /* Prevent .MIPS.abiflags from being discarded with --gc-sections. */ bfd_boolean @@ -12781,7 +12608,7 @@ _bfd_mips_elf_ignore_discarded_relocs (asection *sec) bfd_boolean _bfd_mips_elf_write_section (bfd *output_bfd, struct bfd_link_info *link_info ATTRIBUTE_UNUSED, - asection *sec, bfd_byte *contents) + asection *sec, bfd_byte *contents) { bfd_byte *to, *from, *end; int i; @@ -12842,13 +12669,29 @@ _bfd_mips_elf_find_nearest_line (bfd *abfd, asymbol **symbols, line_ptr, discriminator_ptr, dwarf_debug_sections, ABI_64_P (abfd) ? 8 : 0, - &elf_tdata (abfd)->dwarf2_find_line_info)) - return TRUE; + &elf_tdata (abfd)->dwarf2_find_line_info) + || _bfd_dwarf1_find_nearest_line (abfd, symbols, section, offset, + filename_ptr, functionname_ptr, + line_ptr)) + { + /* PR 22789: If the function name or filename was not found through + the debug information, then try an ordinary lookup instead. */ + if ((functionname_ptr != NULL && *functionname_ptr == NULL) + || (filename_ptr != NULL && *filename_ptr == NULL)) + { + /* Do not override already discovered names. */ + if (functionname_ptr != NULL && *functionname_ptr != NULL) + functionname_ptr = NULL; - if (_bfd_dwarf1_find_nearest_line (abfd, symbols, section, offset, - filename_ptr, functionname_ptr, - line_ptr)) - return TRUE; + if (filename_ptr != NULL && *filename_ptr != NULL) + filename_ptr = NULL; + + _bfd_elf_find_function (abfd, symbols, section, offset, + filename_ptr, functionname_ptr); + } + + return TRUE; + } msec = bfd_get_section_by_name (abfd, ".mdebug"); if (msec != NULL) @@ -12906,11 +12749,11 @@ _bfd_mips_elf_find_nearest_line (bfd *abfd, asymbol **symbols, mips_elf_tdata (abfd)->find_line_info = fi; /* Note that we don't bother to ever free this information. - find_nearest_line is either called all the time, as in - objdump -l, so the information should be saved, or it is - rarely called, as in ld error messages, so the memory - wasted is unimportant. Still, it would probably be a - good idea for free_cached_info to throw it away. */ + find_nearest_line is either called all the time, as in + objdump -l, so the information should be saved, or it is + rarely called, as in ld error messages, so the memory + wasted is unimportant. Still, it would probably be a + good idea for free_cached_info to throw it away. */ } if (_bfd_ecoff_locate_line (abfd, section, offset, &fi->d, swap, @@ -13615,12 +13458,12 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec, int fndopc; /* The number of bytes to delete for relaxation and from where - to delete these bytes starting at irel->r_offset. */ + to delete these bytes starting at irel->r_offset. */ int delcnt = 0; int deloff = 0; /* If this isn't something that can be relaxed, then ignore - this reloc. */ + this reloc. */ if (r_type != R_MICROMIPS_HI16 && r_type != R_MICROMIPS_PC16_S1 && r_type != R_MICROMIPS_26_S1) @@ -13697,12 +13540,12 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec, /* For simplicity of coding, we are going to modify the - section contents, the section relocs, and the BFD symbol - table. We must tell the rest of the code not to free up this - information. It would be possible to instead create a table - of changes which have to be made, as is done in coff-mips.c; - that would be more work, but would require less memory when - the linker is run. */ + section contents, the section relocs, and the BFD symbol + table. We must tell the rest of the code not to free up this + information. It would be possible to instead create a table + of changes which have to be made, as is done in coff-mips.c; + that would be more work, but would require less memory when + the linker is run. */ /* Only 32-bit instructions relaxed. */ if (irel->r_offset + 4 > sec->size) @@ -13711,20 +13554,20 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec, opcode = bfd_get_micromips_32 (abfd, ptr); /* This is the pc-relative distance from the instruction the - relocation is applied to, to the symbol referred. */ + relocation is applied to, to the symbol referred. */ pcrval = (symval - (sec->output_section->vma + sec->output_offset) - irel->r_offset); /* R_MICROMIPS_HI16 / LUI relaxation to nil, performing relaxation - of corresponding R_MICROMIPS_LO16 to R_MICROMIPS_HI0_LO16 or - R_MICROMIPS_PC23_S2. The R_MICROMIPS_PC23_S2 condition is + of corresponding R_MICROMIPS_LO16 to R_MICROMIPS_HI0_LO16 or + R_MICROMIPS_PC23_S2. The R_MICROMIPS_PC23_S2 condition is - (symval % 4 == 0 && IS_BITSIZE (pcrval, 25)) + (symval % 4 == 0 && IS_BITSIZE (pcrval, 25)) - where pcrval has first to be adjusted to apply against the LO16 - location (we make the adjustment later on, when we have figured - out the offset). */ + where pcrval has first to be adjusted to apply against the LO16 + location (we make the adjustment later on, when we have figured + out the offset). */ if (r_type == R_MICROMIPS_HI16 && MATCH (opcode, lui_insn)) { bfd_boolean bzc = FALSE; @@ -13808,8 +13651,8 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec, irel[1].r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_HI0_LO16); /* Instructions using R_MICROMIPS_LO16 have the base or - source register in bits 20:16. This register becomes $0 - (zero) as the result of the R_MICROMIPS_HI16 being 0. */ + source register in bits 20:16. This register becomes $0 + (zero) as the result of the R_MICROMIPS_HI16 being 0. */ nextopc &= ~0x001f0000; bfd_put_16 (abfd, (nextopc >> 16) & 0xffff, contents + irel[1].r_offset); @@ -13848,9 +13691,9 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec, } /* Compact branch relaxation -- due to the multitude of macros - employed by the compiler/assembler, compact branches are not - always generated. Obviously, this can/will be fixed elsewhere, - but there is no drawback in double checking it here. */ + employed by the compiler/assembler, compact branches are not + always generated. Obviously, this can/will be fixed elsewhere, + but there is no drawback in double checking it here. */ else if (r_type == R_MICROMIPS_PC16_S1 && irel->r_offset + 5 < sec->size && ((fndopc = find_match (opcode, bz_rs_insns_32)) >= 0 @@ -13880,7 +13723,7 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec, } /* R_MICROMIPS_PC16_S1 relaxation to R_MICROMIPS_PC10_S1. We need - to check the distance from the next instruction, so subtract 2. */ + to check the distance from the next instruction, so subtract 2. */ else if (!insn32 && r_type == R_MICROMIPS_PC16_S1 && IS_BITSIZE (pcrval - 2, 11) @@ -13901,7 +13744,7 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec, } /* R_MICROMIPS_PC16_S1 relaxation to R_MICROMIPS_PC7_S1. We need - to check the distance from the next instruction, so subtract 2. */ + to check the distance from the next instruction, so subtract 2. */ else if (!insn32 && r_type == R_MICROMIPS_PC16_S1 && IS_BITSIZE (pcrval - 2, 8) @@ -13965,7 +13808,7 @@ _bfd_mips_elf_relax_section (bfd *abfd, asection *sec, if (relaxed) { /* JAL with 32-bit delay slot that is changed to a JALS - with 16-bit delay slot. */ + with 16-bit delay slot. */ bfd_put_micromips_32 (abfd, jal_insn_32_bd16.match, ptr); /* Delete 2 bytes from irel->r_offset + 6. */ @@ -14091,12 +13934,15 @@ _bfd_mips_elf_use_plts_and_copy_relocs (struct bfd_link_info *info) } /* A function that the linker calls to select between all or only - 32-bit microMIPS instructions. */ + 32-bit microMIPS instructions, and between making or ignoring + branch relocation checks for invalid transitions between ISA modes. */ void -_bfd_mips_elf_insn32 (struct bfd_link_info *info, bfd_boolean on) +_bfd_mips_elf_linker_flags (struct bfd_link_info *info, bfd_boolean insn32, + bfd_boolean ignore_branch_isa) { - mips_elf_hash_table (info)->insn32 = on; + mips_elf_hash_table (info)->insn32 = insn32; + mips_elf_hash_table (info)->ignore_branch_isa = ignore_branch_isa; } /* Structure for saying that BFD machine EXTENSION extends BASE. */ @@ -14160,15 +14006,21 @@ static const struct mips_mach_extension mips_mach_extensions[] = { bfd_mach_mips4400, bfd_mach_mips4000 }, { bfd_mach_mips4300, bfd_mach_mips4000 }, { bfd_mach_mips4100, bfd_mach_mips4000 }, - { bfd_mach_mips4010, bfd_mach_mips4000 }, { bfd_mach_mips5900, bfd_mach_mips4000 }, + /* MIPS32r3 extensions. */ + { bfd_mach_mips_interaptiv_mr2, bfd_mach_mipsisa32r3 }, + + /* MIPS32r2 extensions. */ + { bfd_mach_mipsisa32r3, bfd_mach_mipsisa32r2 }, + /* MIPS32 extensions. */ { bfd_mach_mipsisa32r2, bfd_mach_mipsisa32 }, /* MIPS II extensions. */ { bfd_mach_mips4000, bfd_mach_mips6000 }, { bfd_mach_mipsisa32, bfd_mach_mips6000 }, + { bfd_mach_mips4010, bfd_mach_mips6000 }, /* MIPS I extensions. */ { bfd_mach_mips6000, bfd_mach_mips3000 }, @@ -14211,25 +14063,25 @@ bfd_mips_isa_ext_mach (unsigned int isa_ext) { switch (isa_ext) { - case AFL_EXT_3900: return bfd_mach_mips3900; - case AFL_EXT_4010: return bfd_mach_mips4010; - case AFL_EXT_4100: return bfd_mach_mips4100; - case AFL_EXT_4111: return bfd_mach_mips4111; - case AFL_EXT_4120: return bfd_mach_mips4120; - case AFL_EXT_4650: return bfd_mach_mips4650; - case AFL_EXT_5400: return bfd_mach_mips5400; - case AFL_EXT_5500: return bfd_mach_mips5500; - case AFL_EXT_5900: return bfd_mach_mips5900; - case AFL_EXT_10000: return bfd_mach_mips10000; + case AFL_EXT_3900: return bfd_mach_mips3900; + case AFL_EXT_4010: return bfd_mach_mips4010; + case AFL_EXT_4100: return bfd_mach_mips4100; + case AFL_EXT_4111: return bfd_mach_mips4111; + case AFL_EXT_4120: return bfd_mach_mips4120; + case AFL_EXT_4650: return bfd_mach_mips4650; + case AFL_EXT_5400: return bfd_mach_mips5400; + case AFL_EXT_5500: return bfd_mach_mips5500; + case AFL_EXT_5900: return bfd_mach_mips5900; + case AFL_EXT_10000: return bfd_mach_mips10000; case AFL_EXT_LOONGSON_2E: return bfd_mach_mips_loongson_2e; case AFL_EXT_LOONGSON_2F: return bfd_mach_mips_loongson_2f; case AFL_EXT_LOONGSON_3A: return bfd_mach_mips_loongson_3a; - case AFL_EXT_SB1: return bfd_mach_mips_sb1; + case AFL_EXT_SB1: return bfd_mach_mips_sb1; case AFL_EXT_OCTEON: return bfd_mach_mips_octeon; case AFL_EXT_OCTEONP: return bfd_mach_mips_octeonp; case AFL_EXT_OCTEON2: return bfd_mach_mips_octeon2; - case AFL_EXT_XLR: return bfd_mach_mips_xlr; - default: return bfd_mach_mips3000; + case AFL_EXT_XLR: return bfd_mach_mips_xlr; + default: return bfd_mach_mips3000; } } @@ -14240,26 +14092,28 @@ bfd_mips_isa_ext (bfd *abfd) { switch (bfd_get_mach (abfd)) { - case bfd_mach_mips3900: return AFL_EXT_3900; - case bfd_mach_mips4010: return AFL_EXT_4010; - case bfd_mach_mips4100: return AFL_EXT_4100; - case bfd_mach_mips4111: return AFL_EXT_4111; - case bfd_mach_mips4120: return AFL_EXT_4120; - case bfd_mach_mips4650: return AFL_EXT_4650; - case bfd_mach_mips5400: return AFL_EXT_5400; - case bfd_mach_mips5500: return AFL_EXT_5500; - case bfd_mach_mips5900: return AFL_EXT_5900; - case bfd_mach_mips10000: return AFL_EXT_10000; + case bfd_mach_mips3900: return AFL_EXT_3900; + case bfd_mach_mips4010: return AFL_EXT_4010; + case bfd_mach_mips4100: return AFL_EXT_4100; + case bfd_mach_mips4111: return AFL_EXT_4111; + case bfd_mach_mips4120: return AFL_EXT_4120; + case bfd_mach_mips4650: return AFL_EXT_4650; + case bfd_mach_mips5400: return AFL_EXT_5400; + case bfd_mach_mips5500: return AFL_EXT_5500; + case bfd_mach_mips5900: return AFL_EXT_5900; + case bfd_mach_mips10000: return AFL_EXT_10000; case bfd_mach_mips_loongson_2e: return AFL_EXT_LOONGSON_2E; case bfd_mach_mips_loongson_2f: return AFL_EXT_LOONGSON_2F; case bfd_mach_mips_loongson_3a: return AFL_EXT_LOONGSON_3A; - case bfd_mach_mips_sb1: return AFL_EXT_SB1; - case bfd_mach_mips_octeon: return AFL_EXT_OCTEON; - case bfd_mach_mips_octeonp: return AFL_EXT_OCTEONP; - case bfd_mach_mips_octeon3: return AFL_EXT_OCTEON3; - case bfd_mach_mips_octeon2: return AFL_EXT_OCTEON2; - case bfd_mach_mips_xlr: return AFL_EXT_XLR; - default: return 0; + case bfd_mach_mips_sb1: return AFL_EXT_SB1; + case bfd_mach_mips_octeon: return AFL_EXT_OCTEON; + case bfd_mach_mips_octeonp: return AFL_EXT_OCTEONP; + case bfd_mach_mips_octeon3: return AFL_EXT_OCTEON3; + case bfd_mach_mips_octeon2: return AFL_EXT_OCTEON2; + case bfd_mach_mips_xlr: return AFL_EXT_XLR; + case bfd_mach_mips_interaptiv_mr2: + return AFL_EXT_INTERAPTIV_MR2; + default: return 0; } } @@ -14292,7 +14146,7 @@ update_mips_abiflags_isa (bfd *abfd, Elf_Internal_ABIFlags_v0 *abiflags) default: _bfd_error_handler /* xgettext:c-format */ - (_("%B: Unknown architecture %s"), + (_("%pB: unknown architecture %s"), abfd, bfd_printable_name (abfd)); } @@ -14405,11 +14259,11 @@ _bfd_mips_elf_final_link (bfd *abfd, struct bfd_link_info *info) scRData, scSData, scSBss, scBss }; - /* Sort the dynamic symbols so that those with GOT entries come after - those without. */ htab = mips_elf_hash_table (info); BFD_ASSERT (htab != NULL); + /* Sort the dynamic symbols so that those with GOT entries come after + those without. */ if (!mips_elf_sort_hash_table (abfd, info)) return FALSE; @@ -14515,6 +14369,7 @@ _bfd_mips_elf_final_link (bfd *abfd, struct bfd_link_info *info) bfd *input_bfd; Elf32_External_RegInfo ext; Elf32_RegInfo sub; + bfd_size_type sz; if (p->type != bfd_indirect_link_order) { @@ -14526,8 +14381,11 @@ _bfd_mips_elf_final_link (bfd *abfd, struct bfd_link_info *info) input_section = p->u.indirect.section; input_bfd = input_section->owner; + sz = (input_section->size < sizeof (ext) + ? input_section->size : sizeof (ext)); + memset (&ext, 0, sizeof (ext)); if (! bfd_get_section_contents (input_bfd, input_section, - &ext, 0, sizeof ext)) + &ext, 0, sz)) return FALSE; bfd_mips_elf32_swap_reginfo_in (input_bfd, &ext, &sub); @@ -14539,7 +14397,7 @@ _bfd_mips_elf_final_link (bfd *abfd, struct bfd_link_info *info) reginfo.ri_cprmask[3] |= sub.ri_cprmask[3]; /* ri_gp_value is set by the function - mips_elf32_section_processing when the section is + `_bfd_mips_elf_section_processing' when the section is finally written out. */ /* Hack: reset the SEC_HAS_CONTENTS flag so that @@ -14822,8 +14680,7 @@ _bfd_mips_elf_final_link (bfd *abfd, struct bfd_link_info *info) { _bfd_error_handler /* xgettext:c-format */ - (_("%s: illegal section name `%s'"), - bfd_get_filename (abfd), o->name); + (_("%pB: illegal section name `%pA'"), abfd, o); bfd_set_error (bfd_error_nonrepresentable_section); return FALSE; } @@ -15100,7 +14957,7 @@ mips_elf_merge_obj_e_flags (bfd *ibfd, struct bfd_link_info *info) != ((old_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0)) { _bfd_error_handler - (_("%B: warning: linking abicalls files with non-abicalls files"), + (_("%pB: warning: linking abicalls files with non-abicalls files"), ibfd); ok = TRUE; } @@ -15117,7 +14974,7 @@ mips_elf_merge_obj_e_flags (bfd *ibfd, struct bfd_link_info *info) if (mips_32bit_flags_p (old_flags) != mips_32bit_flags_p (new_flags)) { _bfd_error_handler - (_("%B: linking 32-bit code with 64-bit code"), + (_("%pB: linking 32-bit code with 64-bit code"), ibfd); ok = FALSE; } @@ -15149,7 +15006,7 @@ mips_elf_merge_obj_e_flags (bfd *ibfd, struct bfd_link_info *info) /* The ISAs aren't compatible. */ _bfd_error_handler /* xgettext:c-format */ - (_("%B: linking %s module with previous %s modules"), + (_("%pB: linking %s module with previous %s modules"), ibfd, bfd_printable_name (ibfd), bfd_printable_name (obfd)); @@ -15173,7 +15030,7 @@ mips_elf_merge_obj_e_flags (bfd *ibfd, struct bfd_link_info *info) { _bfd_error_handler /* xgettext:c-format */ - (_("%B: ABI mismatch: linking %s module with previous %s modules"), + (_("%pB: ABI mismatch: linking %s module with previous %s modules"), ibfd, elf_mips_abi_name (ibfd), elf_mips_abi_name (obfd)); @@ -15198,7 +15055,7 @@ mips_elf_merge_obj_e_flags (bfd *ibfd, struct bfd_link_info *info) { _bfd_error_handler /* xgettext:c-format */ - (_("%B: ASE mismatch: linking %s module with previous %s modules"), + (_("%pB: ASE mismatch: linking %s module with previous %s modules"), ibfd, m16_mis ? "MIPS16" : "microMIPS", m16_mis ? "microMIPS" : "MIPS16"); @@ -15215,7 +15072,7 @@ mips_elf_merge_obj_e_flags (bfd *ibfd, struct bfd_link_info *info) if ((new_flags & EF_MIPS_NAN2008) != (old_flags & EF_MIPS_NAN2008)) { /* xgettext:c-format */ - _bfd_error_handler (_("%B: linking %s module with previous %s modules"), + _bfd_error_handler (_("%pB: linking %s module with previous %s modules"), ibfd, (new_flags & EF_MIPS_NAN2008 ? "-mnan=2008" : "-mnan=legacy"), @@ -15230,7 +15087,7 @@ mips_elf_merge_obj_e_flags (bfd *ibfd, struct bfd_link_info *info) if ((new_flags & EF_MIPS_FP64) != (old_flags & EF_MIPS_FP64)) { /* xgettext:c-format */ - _bfd_error_handler (_("%B: linking %s module with previous %s modules"), + _bfd_error_handler (_("%pB: linking %s module with previous %s modules"), ibfd, (new_flags & EF_MIPS_FP64 ? "-mfp64" : "-mfp32"), @@ -15246,10 +15103,9 @@ mips_elf_merge_obj_e_flags (bfd *ibfd, struct bfd_link_info *info) { /* xgettext:c-format */ _bfd_error_handler - (_("%B: uses different e_flags (0x%lx) fields than previous modules " - "(0x%lx)"), - ibfd, (unsigned long) new_flags, - (unsigned long) old_flags); + (_("%pB: uses different e_flags (%#x) fields than previous modules " + "(%#x)"), + ibfd, new_flags, old_flags); ok = FALSE; } @@ -15333,21 +15189,21 @@ mips_elf_merge_obj_attributes (bfd *ibfd, struct bfd_link_info *info) if (!out_string && !in_string) /* xgettext:c-format */ _bfd_error_handler - (_("Warning: %B uses unknown floating point ABI %d " - "(set by %B), %B uses unknown floating point ABI %d"), - obfd, abi_fp_bfd, ibfd, out_fp, in_fp); + (_("warning: %pB uses unknown floating point ABI %d " + "(set by %pB), %pB uses unknown floating point ABI %d"), + obfd, out_fp, abi_fp_bfd, ibfd, in_fp); else if (!out_string) _bfd_error_handler /* xgettext:c-format */ - (_("Warning: %B uses unknown floating point ABI %d " - "(set by %B), %B uses %s"), - obfd, abi_fp_bfd, ibfd, out_fp, in_string); + (_("warning: %pB uses unknown floating point ABI %d " + "(set by %pB), %pB uses %s"), + obfd, out_fp, abi_fp_bfd, ibfd, in_string); else if (!in_string) _bfd_error_handler /* xgettext:c-format */ - (_("Warning: %B uses %s (set by %B), " - "%B uses unknown floating point ABI %d"), - obfd, abi_fp_bfd, ibfd, out_string, in_fp); + (_("warning: %pB uses %s (set by %pB), " + "%pB uses unknown floating point ABI %d"), + obfd, out_string, abi_fp_bfd, ibfd, in_fp); else { /* If one of the bfds is soft-float, the other must be @@ -15359,8 +15215,8 @@ mips_elf_merge_obj_attributes (bfd *ibfd, struct bfd_link_info *info) in_string = "-mhard-float"; _bfd_error_handler /* xgettext:c-format */ - (_("Warning: %B uses %s (set by %B), %B uses %s"), - obfd, abi_fp_bfd, ibfd, out_string, in_string); + (_("warning: %pB uses %s (set by %pB), %pB uses %s"), + obfd, out_string, abi_fp_bfd, ibfd, in_string); } } } @@ -15378,10 +15234,10 @@ mips_elf_merge_obj_attributes (bfd *ibfd, struct bfd_link_info *info) case Val_GNU_MIPS_ABI_MSA_128: _bfd_error_handler /* xgettext:c-format */ - (_("Warning: %B uses %s (set by %B), " - "%B uses unknown MSA ABI %d"), - obfd, abi_msa_bfd, ibfd, - "-mmsa", in_attr[Tag_GNU_MIPS_ABI_MSA].i); + (_("warning: %pB uses %s (set by %pB), " + "%pB uses unknown MSA ABI %d"), + obfd, "-mmsa", abi_msa_bfd, + ibfd, in_attr[Tag_GNU_MIPS_ABI_MSA].i); break; default: @@ -15390,20 +15246,19 @@ mips_elf_merge_obj_attributes (bfd *ibfd, struct bfd_link_info *info) case Val_GNU_MIPS_ABI_MSA_128: _bfd_error_handler /* xgettext:c-format */ - (_("Warning: %B uses unknown MSA ABI %d " - "(set by %B), %B uses %s"), - obfd, abi_msa_bfd, ibfd, - out_attr[Tag_GNU_MIPS_ABI_MSA].i, "-mmsa"); + (_("warning: %pB uses unknown MSA ABI %d " + "(set by %pB), %pB uses %s"), + obfd, out_attr[Tag_GNU_MIPS_ABI_MSA].i, + abi_msa_bfd, ibfd, "-mmsa"); break; default: _bfd_error_handler /* xgettext:c-format */ - (_("Warning: %B uses unknown MSA ABI %d " - "(set by %B), %B uses unknown MSA ABI %d"), - obfd, abi_msa_bfd, ibfd, - out_attr[Tag_GNU_MIPS_ABI_MSA].i, - in_attr[Tag_GNU_MIPS_ABI_MSA].i); + (_("warning: %pB uses unknown MSA ABI %d " + "(set by %pB), %pB uses unknown MSA ABI %d"), + obfd, out_attr[Tag_GNU_MIPS_ABI_MSA].i, + abi_msa_bfd, ibfd, in_attr[Tag_GNU_MIPS_ABI_MSA].i); break; } } @@ -15462,7 +15317,7 @@ _bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) if (! _bfd_generic_verify_endian_match (ibfd, info)) { _bfd_error_handler - (_("%B: endianness incompatible with that of the selected emulation"), + (_("%pB: endianness incompatible with that of the selected emulation"), ibfd); return FALSE; } @@ -15476,7 +15331,7 @@ _bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) if (strcmp (bfd_get_target (ibfd), bfd_get_target (obfd)) != 0) { _bfd_error_handler - (_("%B: ABI is incompatible with that of the selected emulation"), + (_("%pB: ABI is incompatible with that of the selected emulation"), ibfd); return FALSE; } @@ -15513,44 +15368,44 @@ _bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) Elf_Internal_ABIFlags_v0 abiflags; /* Set up the FP ABI attribute from the abiflags if it is not already - set. */ + set. */ if (in_attr[Tag_GNU_MIPS_ABI_FP].i == Val_GNU_MIPS_ABI_FP_ANY) - in_attr[Tag_GNU_MIPS_ABI_FP].i = in_tdata->abiflags.fp_abi; + in_attr[Tag_GNU_MIPS_ABI_FP].i = in_tdata->abiflags.fp_abi; infer_mips_abiflags (ibfd, &abiflags); in_abiflags = in_tdata->abiflags; /* It is not possible to infer the correct ISA revision - for R3 or R5 so drop down to R2 for the checks. */ + for R3 or R5 so drop down to R2 for the checks. */ if (in_abiflags.isa_rev == 3 || in_abiflags.isa_rev == 5) in_abiflags.isa_rev = 2; if (LEVEL_REV (in_abiflags.isa_level, in_abiflags.isa_rev) < LEVEL_REV (abiflags.isa_level, abiflags.isa_rev)) _bfd_error_handler - (_("%B: warning: Inconsistent ISA between e_flags and " + (_("%pB: warning: inconsistent ISA between e_flags and " ".MIPS.abiflags"), ibfd); if (abiflags.fp_abi != Val_GNU_MIPS_ABI_FP_ANY && in_abiflags.fp_abi != abiflags.fp_abi) _bfd_error_handler - (_("%B: warning: Inconsistent FP ABI between .gnu.attributes and " + (_("%pB: warning: inconsistent FP ABI between .gnu.attributes and " ".MIPS.abiflags"), ibfd); if ((in_abiflags.ases & abiflags.ases) != abiflags.ases) _bfd_error_handler - (_("%B: warning: Inconsistent ASEs between e_flags and " + (_("%pB: warning: inconsistent ASEs between e_flags and " ".MIPS.abiflags"), ibfd); /* The isa_ext is allowed to be an extension of what can be inferred from e_flags. */ if (!mips_mach_extends_p (bfd_mips_isa_ext_mach (abiflags.isa_ext), bfd_mips_isa_ext_mach (in_abiflags.isa_ext))) _bfd_error_handler - (_("%B: warning: Inconsistent ISA extensions between e_flags and " + (_("%pB: warning: inconsistent ISA extensions between e_flags and " ".MIPS.abiflags"), ibfd); if (in_abiflags.flags2 != 0) _bfd_error_handler - (_("%B: warning: Unexpected flag in the flags2 field of " + (_("%pB: warning: unexpected flag in the flags2 field of " ".MIPS.abiflags (0x%lx)"), ibfd, - (unsigned long) in_abiflags.flags2); + in_abiflags.flags2); } else { @@ -15784,6 +15639,8 @@ print_mips_ases (FILE *file, unsigned int mask) fputs ("\n\tMICROMIPS ASE", file); if (mask & AFL_ASE_XPA) fputs ("\n\tXPA ASE", file); + if (mask & AFL_ASE_MIPS16E2) + fputs ("\n\tMIPS16e2 ASE", file); if (mask == 0) fprintf (file, "\n\t%s", _("None")); else if ((mask & ~AFL_ASE_MASK) != 0) @@ -15855,6 +15712,9 @@ print_mips_isa_ext (FILE *file, unsigned int isa_ext) case AFL_EXT_LOONGSON_2F: fputs ("ST Microelectronics Loongson 2F", file); break; + case AFL_EXT_INTERAPTIV_MR2: + fputs ("Imagination interAptiv MR2", file); + break; default: fprintf (file, "%s (%d)", _("Unknown"), isa_ext); break; @@ -16027,13 +15887,13 @@ _bfd_mips_elf_print_private_bfd_data (bfd *abfd, void *ptr) const struct bfd_elf_special_section _bfd_mips_elf_special_sections[] = { - { STRING_COMMA_LEN (".lit4"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, - { STRING_COMMA_LEN (".lit8"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, + { STRING_COMMA_LEN (".lit4"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, + { STRING_COMMA_LEN (".lit8"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, { STRING_COMMA_LEN (".mdebug"), 0, SHT_MIPS_DEBUG, 0 }, - { STRING_COMMA_LEN (".sbss"), -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, + { STRING_COMMA_LEN (".sbss"), -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, { STRING_COMMA_LEN (".sdata"), -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, { STRING_COMMA_LEN (".ucode"), 0, SHT_MIPS_UCODE, 0 }, - { NULL, 0, 0, 0, 0 } + { NULL, 0, 0, 0, 0 } }; /* Merge non visibility st_other attributes. Ensure that the @@ -16358,9 +16218,6 @@ _bfd_mips_post_process_headers (bfd *abfd, struct bfd_link_info *link_info) if (mips_elf_tdata (abfd)->abiflags.fp_abi == Val_GNU_MIPS_ABI_FP_64 || mips_elf_tdata (abfd)->abiflags.fp_abi == Val_GNU_MIPS_ABI_FP_64A) i_ehdrp->e_ident[EI_ABIVERSION] = 3; - - if (elf_stack_flags (abfd) && !(elf_stack_flags (abfd) & PF_X)) - i_ehdrp->e_ident[EI_ABIVERSION] = 5; } int