X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=cpu%2Fiq2000.cpu;h=cb9cfae1d43e173f8ea6401e6d96d757bc72c055;hb=5018ce90c1205d79f29adf954b0fd5e613d08430;hp=978108cffb16702780221dc1159644fad5f19ec1;hpb=4030fa5ade3caa531bb7dbe9717886681b187a71;p=deliverable%2Fbinutils-gdb.git

diff --git a/cpu/iq2000.cpu b/cpu/iq2000.cpu
index 978108cffb..cb9cfae1d4 100644
--- a/cpu/iq2000.cpu
+++ b/cpu/iq2000.cpu
@@ -1,7 +1,24 @@
 ; IQ2000/IQ10 Common CPU description. -*- Scheme -*-
-; Copyright (C) 2000, 2001, 2002 Red Hat, Inc.
-; This file is part of CGEN.
-; See file COPYING.CGEN for details.
+; Copyright 2001, 2002, 2007, 2009 Free Software Foundation, Inc.
+;
+; Contributed by Red Hat Inc; developed under contract from Fujitsu.
+;
+; This file is part of the GNU Binutils.
+;
+; This program is free software; you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation; either version 3 of the License, or
+; (at your option) any later version.
+;
+; This program is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with this program; if not, write to the Free Software
+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+; MA 02110-1301, USA.
 
 (include "simplify.inc")
 
@@ -190,7 +207,7 @@
 (df  f-offset "pc offset field"                (PCREL-ADDR) 15 16 INT
      ; Actually, this is relative to the address of the delay slot.
      ((value pc) (sra SI (sub SI value pc) 2))
-     ((value pc) (add SI (sll SI value 2) (add pc 4))))
+     ((value pc) (add SI (mul SI value 4) (add pc 4))))
 
 ; Instruction fields that scarcely appear in instructions.
 
@@ -333,10 +350,10 @@
     (name (.sym USES- (.upcase regfield)))
     (comment ("insn accesses register operand " regfield))))
 
-(define-reg-use-attr rd)
-(define-reg-use-attr rs)
-(define-reg-use-attr rt)
-(define-reg-use-attr r31)
+(define-reg-use-attr "rd")
+(define-reg-use-attr "rs")
+(define-reg-use-attr "rt")
+(define-reg-use-attr "r31")
 
 
 ; Operands.
@@ -1177,6 +1194,3 @@
 
 (if (keep-mach? (iq10))
 (include "iq10.cpu"))
-
-
-