X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gas%2FChangeLog;h=223ea8d9ba8b595dfc469bc487341459fed73e50;hb=51c8edf68bf1e16c6d05fbb31a36e0cc436a9750;hp=1d835b6fdef9d6411b4f7a37893e886c55a39f4d;hpb=8382113fdb028386a335e8dee9ac04ebc8cf04a1;p=deliverable%2Fbinutils-gdb.git

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 1d835b6fde..223ea8d9ba 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,118 @@
+2019-11-12  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (type_names): Remove OPERAND_TYPE_ESSEG
+	entry.
+	(md_assemble): Adjust isstring field use. Add assertion.
+	(check_string): Mostly re-write.
+	(i386_index_check): Adjust isstring field use and related code.
+
+2019-11-12  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (process_immext): Remove SSE3, SVME, and
+	MWAITX special case logic.
+	(process_suffix): Replace immext field uses by instance ones.
+	* testsuite/gas/i386/arch-13.s,
+	testsuite/gas/i386/x86-64-arch-3.s: Add CLZERO with operand
+	cases.
+	* testsuite/gas/i386/svme.s: Add 16-bit operand cases.
+	* testsuite/gas/i386/x86-64-specific-reg.s: Drop FIXME comments.
+	* testsuite/gas/i386/arch-13.d,
+	testsuite/gas/i386/mwaitx-reg.l, testsuite/gas/i386/svme.d,
+	testsuite/gas/i386/x86-64-arch-3.d,
+	testsuite/gas/i386/x86-64-mwaitx-reg.l,
+	testsuite/gas/i386/x86-64-specific-reg.l: Adjust expectations.
+
+2019-11-12  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (operand_type_set, operand_type_and,
+	operand_type_and_not, operand_type_or, operand_type_xor): Handle
+	"instance" field specially.
+	(operand_size_match, md_assemble, match_template, process_suffix,
+	check_byte_reg, check_long_reg, check_qword_reg, check_word_reg,
+	process_operands, build_modrm_byte): Use "instance" instead of
+	"acc" / "inoutportreg" / "shiftcount" fields.
+	(optimize_imm): Adjust comment.
+
+2019-11-11  Jan Beulich  <jbeulich@suse.com>
+
+	* testsuite/gas/aarch64/illegal-sve2.s: Add smaxp/sminp cases
+	with mismatched 1st and 3rd operands.
+	* testsuite/gas/aarch64/illegal-sve2.l: Adjust expectations.
+
+2019-11-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/25167
+	* config/tc-i386.c (match_template): Don't check instruction
+	suffix set from operand.
+	* testsuite/gas/i386/code16.d: New file.
+	* testsuite/gas/i386/code16.s: Likewise.
+	* testsuite/gas/i386/i386.exp: Run code16.
+
+2019-11-08  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (optimize_encoding, build_modrm_byte,
+	check_VecOperations, parse_real_register): Use "class" instead
+	of "regmask" and "regbnd" fields.
+
+2019-11-08  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (match_mem_size, operand_size_match,
+	operand_type_register_match, pi, check_VecOperands, match_template,
+	check_byte_reg, check_long_reg, check_qword_reg, process_operands,
+	build_modrm_byte, parse_real_register): Use "class" instead of
+	"regsimd" / "regmmx" fields.
+
+2019-11-08  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (pi, check_byte_reg, build_modrm_byte,
+	parse_real_register): Use "class" instead of "control"/"debug"/
+	"test" fields.
+
+2019-11-08  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (pi, check_byte_reg, process_operands,
+	build_modrm_byte, i386_att_operand, parse_real_register): Use
+	"class" instead of "sreg" field.
+	* config/tc-i386-intel.c (i386_intel_simplify_register,
+	i386_intel_operand): Likewise.
+
+2019-11-08  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (operand_type_set, operand_type_and,
+	operand_type_and_not, operand_type_or, operand_type_xor): Handle
+	"class" field specially.
+	(anyimm): New.
+	(operand_type_check, operand_size_match,
+	operand_type_register_match, pi, md_assemble, is_short_form,
+	process_suffix, check_byte_reg, check_long_reg, check_qword_reg,
+	check_word_reg, process_operands, build_modrm_byte): Use "class"
+	instead of "reg" field.
+	(optimize_imm): Likewise. Reduce redundancy. Adjust calculation
+	of "allowed".
+
+2019-11-07  Mihail Ionescu  <mihail.ionescu@arm.com>
+
+	* testsuite/gas/aarch64/dgh.s: New test.
+	* testsuite/gas/aarch64/dgh.d: New test.
+
+2019-11-07  Mihail Ionescu  <mihail.ionescu@arm.com>
+
+	* config/tc-arm.c (arm_ext_i8mm): New feature set.
+	(do_vusdot): New.
+	(do_vsudot): New.
+	(do_vsmmla): New.
+	(do_vummla): New.
+	(insns): Add vsmmla, vummla, vusmmla, vusdot, vsudot mnemonics.
+	(armv86a_ext_table): Add i8mm extension.
+	(arm_extensions): Move bf16 extension to context sensitive table.
+	(armv82a_ext_table, armv84a_ext_table, armv85a_ext_table):
+	Move bf16 extension to context sensitive table.
+	(armv86a_ext_table): Add i8mm extension.
+	* doc/c-arm.texi: Document i8mm extension.
+	* testsuite/gas/arm/i8mm.s: New test.
+	* testsuite/gas/arm/i8mm.d: New test.
+	* testsuite/gas/arm/bfloat17-cmdline-bad-3.d: Update test.
+
 2019-11-07  Mihail Ionescu  <mihail.ionescu@arm.com>
 
 	* config/tc-aarch64.c: Add new arch fetures to suppport the mm extension.