X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gas%2FChangeLog;h=875bcf8fe561e62860835b417ff10f3dfdcb5977;hb=5b660084e26050d2e7f1fda06daec1e83311c188;hp=a2937f8663aed767c28fe82c2a6fe2f60305243f;hpb=bab6aec1255ba2ec8de3ae0363958e2ff26ce25d;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/ChangeLog b/gas/ChangeLog index a2937f8663..875bcf8fe5 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,591 @@ +2019-12-17 Alan Modra + + * doc/as.texi: Remove mention of tic80. + +2019-12-12 H.J. Lu + + PR gas/25274 + * config/tc-i386.c (optimize_encoding): Also check R12-R15 + registers for "test $imm7, %r64/%r32/%r16 -> test $imm7, %r8" + optimization. + * testsuite/gas/i386/x86-64-optimize-3.s: Add tests for test + with r12. + * testsuite/gas/i386/x86-64-optimize-3.d: Updated. + * testsuite/gas/i386/x86-64-optimize-3b.d: Likewise. + +2019-12-12 H.J. Lu + + * testsuite/gas/i386/align-branch-1.s: New file. + * testsuite/gas/i386/align-branch-1a.d: Likewise. + * testsuite/gas/i386/align-branch-1b.d: Likewise. + * testsuite/gas/i386/align-branch-1c.d: Likewise. + * testsuite/gas/i386/align-branch-1d.d: Likewise. + * testsuite/gas/i386/align-branch-1e.d: Likewise. + * testsuite/gas/i386/align-branch-1f.d: Likewise. + * testsuite/gas/i386/align-branch-1g.d: Likewise. + * testsuite/gas/i386/align-branch-1h.d: Likewise. + * testsuite/gas/i386/align-branch-2.s: Likewise. + * testsuite/gas/i386/align-branch-2a.d: Likewise. + * testsuite/gas/i386/align-branch-2b.d: Likewise. + * testsuite/gas/i386/align-branch-2c.d: Likewise. + * testsuite/gas/i386/align-branch-3.d: Likewise. + * testsuite/gas/i386/align-branch-3.s: Likewise. + * testsuite/gas/i386/align-branch-4.s: Likewise. + * testsuite/gas/i386/align-branch-4a.d: Likewise. + * testsuite/gas/i386/align-branch-4b.d: Likewise. + * testsuite/gas/i386/align-branch-5.d: Likewise. + * testsuite/gas/i386/align-branch-5.s: Likewise. + * testsuite/gas/i386/align-branch-6.d: Likewise. + * testsuite/gas/i386/align-branch-6.s: Likewise. + * testsuite/gas/i386/align-branch-7.d: Likewise. + * testsuite/gas/i386/align-branch-7.s: Likewise. + * testsuite/gas/i386/align-branch-8.d: Likewise. + * testsuite/gas/i386/align-branch-8.s: Likewise. + * testsuite/gas/i386/x86-64-align-branch-1.s: Likewise. + * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-2.s: Likewise. + * testsuite/gas/i386/x86-64-align-branch-2a.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-2b.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-2c.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-3.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-3.s: Likewise. + * testsuite/gas/i386/x86-64-align-branch-4.s: Likewise. + * testsuite/gas/i386/x86-64-align-branch-4a.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-4b.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-6.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-7.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-7.s: Likewise. + * testsuite/gas/i386/x86-64-align-branch-8.d: Likewise. + * testsuite/gas/i386/x86-64-align-branch-8.s: Likewise. + * testsuite/gas/i386/i386.exp: Run new tests. + +2019-12-12 H.J. Lu + + * config/tc-i386.c (OPTION_MBRANCHES_WITH_32B_BOUNDARIES): New. + (md_longopts): Add -mbranches-within-32B-boundaries. + (md_parse_option): Handle -mbranches-within-32B-boundaries. + (md_show_usage): Add -mbranches-within-32B-boundaries. + +2019-12-12 H.J. Lu + + * config/tc-i386.c (_i386_insn): Add has_gotpc_tls_reloc. + (tls_get_addr): New. + (last_insn): New. + (align_branch_power): New. + (align_branch_kind): New. + (align_branch_bit): New. + (align_branch): New. + (MAX_FUSED_JCC_PADDING_SIZE): New. + (align_branch_prefix_size): New. + (BRANCH_PADDING): New. + (BRANCH_PREFIX): New. + (FUSED_JCC_PADDING): New. + (i386_generate_nops): Support BRANCH_PADDING and FUSED_JCC_PADDING. + (md_begin): Abort if align_branch_prefix_size < + MAX_FUSED_JCC_PADDING_SIZE. + (md_assemble): Set last_insn. + (maybe_fused_with_jcc_p): New. + (add_fused_jcc_padding_frag_p): New. + (add_branch_prefix_frag_p): New. + (add_branch_padding_frag_p): New. + (output_insn): Generate a BRANCH_PADDING, FUSED_JCC_PADDING or + BRANCH_PREFIX frag and terminate each frag to align branches. + (output_disp): Set i.has_gotpc_tls_reloc to TRUE for GOTPC and + relaxable TLS relocations. + (output_imm): Likewise. + (i386_next_non_empty_frag): New. + (i386_next_jcc_frag): New. + (i386_classify_machine_dependent_frag): New. + (i386_branch_padding_size): New. + (i386_generic_table_relax_frag): New. + (md_estimate_size_before_relax): Handle COND_JUMP_PADDING, + FUSED_JCC_PADDING and COND_JUMP_PREFIX frags. + (md_convert_frag): Handle BRANCH_PADDING, BRANCH_PREFIX and + FUSED_JCC_PADDING frags. + (OPTION_MALIGN_BRANCH_BOUNDARY): New. + (OPTION_MALIGN_BRANCH_PREFIX_SIZE): New. + (OPTION_MALIGN_BRANCH): New. + (md_longopts): Add -malign-branch-boundary=, + -malign-branch-prefix-size= and -malign-branch=. + (md_parse_option): Handle -malign-branch-boundary=, + -malign-branch-prefix-size= and -malign-branch=. + (md_show_usage): Display -malign-branch-boundary=, + -malign-branch-prefix-size= and -malign-branch=. + (i386_target_format): Set tls_get_addr. + (i386_cons_align): New. + * config/tc-i386.h (i386_cons_align): New. + (md_cons_align): New. + (i386_generic_table_relax_frag): New. + (md_generic_table_relax_frag): New. + (i386_tc_frag_data): Add u, padding_address, length, + max_prefix_length, prefix_length, default_prefix, cmp_size, + classified and branch_type. + (TC_FRAG_INIT): Initialize u, padding_address, length, + max_prefix_length, prefix_length, default_prefix, cmp_size, + classified and branch_type. + * doc/c-i386.texi: Document -malign-branch-boundary=, + -malign-branch= and -malign-branch-prefix-size=. + +2019-12-12 H.J. Lu + + * write.c (md_generic_table_relax_frag): New. Defined to + relax_frag if not defined. + (relax_segment): Call md_generic_table_relax_frag instead of + relax_frag. + +2019-12-12 Alan Modra + + * config/tc-aarch64.c (get_aarch64_insn): Avoid signed overflow. + * config/tc-metag.c (parse_dalu): Likewise. + * config/tc-tic4x.c (md_pcrel_from): Likewise. + * config/tc-tic6x.c (tic6x_output_unwinding): Likewise. + * config/tc-csky.c (parse_fexp): Use an unsigned char temp buffer. + Don't use register keyword. Avoid signed overflow and remove now + unneccesary char masks. Formatting. + * config/tc-ia64.c (operand_match): Don't use shifts to sign extend. + * config/tc-mep.c (mep_apply_fix): Likewise. + * config/tc-pru.c (md_apply_fix): Likewise. + * config/tc-riscv.c (load_const): Likewise. + * config/tc-nios2.c (md_apply_fix): Likewise. Don't potentially + truncate fixup before right shift. Tidy BFD_RELOC_NIOS2_HIADJ16 + calculation. + +2019-12-12 Alan Modra + + * config/obj-evax.c (crc32, encode_32, encode_16, decode_16): + Remove unnecessary prototypes. + (number_of_codings): Delete, use ARRAY_SIZE instead throughout. + (codings, decodings): Make arrays of unsigned char. + (crc32): Use unsigned variables. Delete unnecessary mask. + (encode_32, encode_16): Return unsigned char*, and make static + buffer an unsigned char array. + (decode_16): Make arg an unsigned char*. Remove useless casts. + (shorten_identifier): Use unsigned char crc_chars. + (is_truncated_identifier): Make ptr an unsigned char*. + +2019-12-11 Wilco Dijkstra + + * config/tc-arm.c (warn_on_restrict_it): Add new variable. + (it_fsm_post_encode): Check warn_on_restrict_it. + (arm_option_table): Add -mwarn-restrict-it/-mno-warn-restrict-it. + * testsuite/gas/arm/armv8-2-fp16-scalar-bad.d: Add -mwarn-restrict-it. + * testsuite/gas/arm/armv8-2-fp16-scalar-bad-ext.d: Likewise. + * testsuite/gas/arm/armv8-a-bad.d: Likewise. + * testsuite/gas/arm/armv8-a-it-bad.d: Likewise. + * testsuite/gas/arm/armv8-r-bad.d: Likewise. + * testsuite/gas/arm/armv8-r-it-bad.d: Likewise. + * testsuite/gas/arm/sp-pc-validations-bad-t-v8a.d: Likewise. + * testsuite/gas/arm/udf.d: Likewise. + +2018-12-11 Jan Beulich + + * config/tc-i386.c (md_assemble): Extend SSE check conditional. + * testsuite/gas/i386/sse-check.s: Add SSE4a and SHA tests. + Extend GFNI tests. + * testsuite/gas/i386/sse-check.d: Adjust expectations. + * testsuite/gas/i386/sse-check-error.l, + testsuite/gas/i386/x86-64-sse-check-error.l: Likewise. + * testsuite/gas/i386/sse-check-warn.e: Likewise. + +2019-12-10 Vladimir Murzin + + * config/tc-arm.c (s_arm_arch): Set selected_ctx_ext_table. + * testsuite/gas/arm/mve-arch-ext.s: New. + * testsuite/gas/arm/mve-arch-ext.d: New. + +2019-12-09 Jan Beulich + + * config/tc-i386-intel.c (O_oword_ptr): Move. + (O_xmmword_ptr): Alias to O_oword_ptr. + (O_fword_ptr, O_tbyte_ptr, O_ymmword_ptr, O_zmmword_ptr): Adjust + expansion. + (i386_intel_simplify, i386_intel_operand): Fold O_oword_ptr and + O_xmmword_ptr cases, leaving comments. + +2019-12-09 Jan Beulich + + * config/tc-i386-intel.c (O_mmword_ptr): Define. + (i386_types): Add mmword entry. + (i386_intel_simplify, i386_intel_operand): Add comment. + * testsuite/gas/i386/intel-expr.s: Also test mmword and zmmword. + * testsuite/gas/i386/intelok.s: Also test "mmword ptr". + * testsuite/gas/i386/intel-expr.d, testsuite/gas/i386/intelok.d, + testsuite/gas/i386/intelok.e: Adjust expectations. + +2019-12-09 Jan Beulich + + * config/tc-i386-intel.c (i386_intel_operand): Set "byte" + attribute suffix instead of suffix for floating point insns when + handling O_near_ptr / O_far_ptr. + * testsuite/gas/i386/intelbad.s: Add FPU tests. + * testsuite/gas/i386/intelbad.l: Adjust expectations. + +2019-12-09 Jan Beulich + + * config/tc-i386-intel.c (i386_intel_operand): Set "byte" + attribute suffix instead of suffix uniformly for insns not + possibly accepting "tbyte ptr" explicitly. + +2019-12-09 Jan Beulich + + * config/tc-i386-intel.c (i386_intel_operand): Don't set suffix + for floating point insns when handling O_fword_ptr. + +2019-12-09 Jan Beulich + + * config/tc-i386-intel.c (i386_intel_operand): Don't special + case LDS et al when handling O_word_ptr. + +2019-12-08 Alan Modra + + * testsuite/gas/aarch64/bfloat16.d: Match 32-bit and 64-bit output. + * testsuite/gas/aarch64/dgh.d: Likewise. + * testsuite/gas/aarch64/f32mm.d: Likewise. + * testsuite/gas/aarch64/f64mm.d: Likewise. + * testsuite/gas/aarch64/i8mm.d: Likewise. + * testsuite/gas/aarch64/pac_ab_key.d: Likewise. + * testsuite/gas/aarch64/pac_negate_ra_state.d: Likewise. + * testsuite/gas/aarch64/reloc-prel_g0.d: Likewise. + * testsuite/gas/aarch64/reloc-prel_g0_nc.d: Likewise. + * testsuite/gas/aarch64/reloc-prel_g1.d: Likewise. + * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Likewise. + * testsuite/gas/aarch64/sve-movprfx-mm.d: Likewise. + * testsuite/gas/aarch64/sve2.d: Likewise. + +2019-12-06 Kyrylo Tkachov + + * dw2gencfi.c (cfi_pseudo_table): Add cfi_negate_ra_state. + * testsuite/gas/aarch64/pac_negate_ra_state.s: New file. + * testsuite/gas/aarch64/pac_negate_ra_state.d: Likewise. + +2019-12-05 Jan Beulich + + * config/tc-aarch64.c (aarch64_features): Drop redundant AES and + SHA2 flags from "crypto" entry. + +2019-12-05 Jan Beulich + + * config/tc-aarch64.c (aarch64_features): Make SHA2 a prereq of + SHA3. + * testsuite/gas/aarch64/crypto.s + * testsuite/gas/aarch64/crypto-directive.d: Refer to crypto.d + for actual output. + * testsuite/gas/aarch64/illegal-crypto-nofp.l: Relax + expectations. + * testsuite/gas/aarch64/crypto-directive2.d, + testsuite/gas/aarch64/crypto-directive3.d: New. + +2019-12-04 Jan Beulich + + * config/tc-i386-intel.c (i386_intel_operand): Handle LFS et al + as well as LGDT at al when processing O_tbyte_ptr. + * testsuite/gas/i386/intelbad.s: Add LDS et al cases. + * testsuite/gas/i386/x86-64-intel64.s, + * testsuite/gas/i386/x86-64-opcode.s: Add LFS et al cases. + * testsuite/gas/i386/ilp32/x86-64-intel64.d: Add -mintel64 + command line option and fold expectations with parent dir test. + * testsuite/gas/i386/x86-64-intel64.d: Add -mintel64 command + line option and adjust expectations. + * testsuite/gas/i386/intelbad.l, + testsuite/gas/i386/x86-64-opcode.d: Adjust expectations. + +2019-12-04 Jan Beulich + + * config/tc-i386-intel.c (i386_intel_operand): Also handle DWORD + with 64-bit mode branches. + * testsuite/gas/i386/x86-64-jump.s: Extend Intel syntax branch + operand coverage. + * testsuite/gas/i386/x86-64-jump.d: Adjust expectations. + +2019-12-04 Jan Beulich + + * config/tc-i386.c (output_insn): Don't consider Cpu* settings + when setting GNU_PROPERTY_X86_FEATURE_2_MMX. + +2019-12-04 Jan Beulich + + * testsuite/gas/i386/movdir.s: Add Intel syntax case with + operand size specifier. + * testsuite/gas/i386/x86-64-movdir.s: Add Intel syntax cases + with operand size specifier and wit 32-bit operands. + * testsuite/gas/i386/movdir-intel.d, + testsuite/gas/i386/movdir.d, + testsuite/gas/i386/x86-64-movdir-intel.d, + testsuite/gas/i386/x86-64-movdir.d: Adjust expectations. + +2019-12-04 Jan Beulich + + * config/tc-i386.c (process_suffix): Arrange for insns with a + single non-GPR register operand to not have its suffix guessed + from GPR operands. Extend DefaultSize handling to cover PUSH/POP + of segment registers. + * testsuite/gas/i386/general.s: Add PUSH/POP sreg to .code16gcc + set of insns. + * testsuite/gas/i386/general.l: Adjust expectations. + +2019-12-04 Jan Beulich + + * config/tc-i386.c (process_suffix): Exclude SYSRET alongside + FLDENV et al. + * testsuite/gas/i386/general.s: Expand .code16gcc set of insns. + * testsuite/gas/i386/general.l: Adjust expectations. + +2019-11-22 Andrew Burgess + + * as.c (flag_dwarf_cie_version): Change initial value to -1, and + update comment. + * config/tc-riscv.c (riscv_after_parse_args): Set + flag_dwarf_cie_version if it has not already been set. + * dwarf2dbg.c (dwarf2_init): Initialise flag_dwarf_cie_version if + needed. + * testsuite/gas/riscv/default-cie-version.d: New file. + * testsuite/gas/riscv/default-cie-version.s: New file. + +2019-11-22 Andrew Burgess + + * dw2gencfi.c (output_cie): Error on return column overflow. + * testsuite/gas/riscv/cie-rtn-col-1.d: New file. + * testsuite/gas/riscv/cie-rtn-col-3.d: New file. + * testsuite/gas/riscv/cie-rtn-col.s: New file. + +2019-11-22 Andrew Burgess + + * config/tc-riscv.c (tc_riscv_regname_to_dw2regnum): Lookup CSR + names too. + * testsuite/gas/riscv/csr-dw-regnums.d: New file. + * testsuite/gas/riscv/csr-dw-regnums.s: New file. + +2019-11-22 Andrew Burgess + + * config/tc-riscv.c (struct regname): Delete. + (hash_reg_names): Handle value as 'void *'. + +2019-11-25 Andrew Pinski + + * config/tc-aarch64.c (md_begin): Use correct + hash table for uppercase version of hint. + * testsuite/gas/aarch64/system-2.s: Extend psb case to uppercase. + * testsuite/gas/aarch64/system-2.d: Update. + +2019-11-25 Christian Eggers + + * as.h: Define SEC_OCTETS as SEC_ELF_OCTETS if OBJ_ELF. + * dwarf2dbg.c: (dwarf2_finish): Set section flag SEC_OCTETS for + .debug_line, .debug_info, .debug_abbrev, .debug_aranges, .debug_str + and .debug_ranges sections. + * write.c (maybe_generate_build_notes): Set section flag + SEC_OCTETS for .gnu.build.attributes section. + * frags.c (frag_now_fix): Don't divide by OCTETS_PER_BYTE if + SEC_OCTETS is set. + * symbols.c (resolve_symbol_value): Likewise. + +2019-11-25 Christian Eggers + + * dwarf2dbg.c (out_set_addr): Revert 2019-03-13 change. + (out_debug_line, out_debug_aranges, out_debug_info): Likewise. + * symbols.h (symbol_set_value_now_octets, symbol_octets_p): Remove. + * symbols.c (struct symbol_flags): Remove member sy_octets. + (symbol_temp_new_now_octets): Don't set symbol_flags::sy_octets. + (resolve_symbol_value): Revert: Return octets instead of bytes if + sy_octets is set. + (symbol_set_value_now_octets): Remove. + (symbol_octets_p): Remove. + +2019-11-22 Mihail Ionescu + + * config/tc-arm.c (arm_ext_crc): New. + (crc_ext_armv8): Remove. + (insns): Rename crc_ext_armv8 to arm_ext_crc. + (arm_cpus): Replace CRC_EXT_ARMV8 with ARM_EXT2_CRC. + (armv8a_ext_table, armv8r_ext_table, + arm_option_extension_value_table): Redefine the crc + extension in terms of ARM_EXT2_CRC. + * gas/testsuite/gas/arm/crc-ext.s: New. + * gas/testsuite/gas/arm/crc-ext.d: New. + +2019-11-20 Alan Modra + + PR 24944 + * atof-generic.c (atof_generic): Increase decimal guard digits. + * testsuite/gas/i386/fp.s: Add more tests. + * testsuite/gas/i386/fp.d: Update. + +2019-11-18 Andrew Burgess + + * as.c (parse_args): Parse --gdwarf-cie-version option. + (flag_dwarf_cie_version): New variable. + * as.h (flag_dwarf_cie_version): Declare. + * dw2gencfi.c (output_cie): Switch from DW_CIE_VERSION to + flag_dwarf_cie_version. + * doc/as.texi (Overview): Document --gdwarf-cie-version. + * NEWS: Likewise. + * testsuite/gas/cfi/cfi.exp: Add new tests. + * testsuite/gas/cfi/cie-version-0.d: New file. + * testsuite/gas/cfi/cie-version-1.d: New file. + * testsuite/gas/cfi/cie-version-2.d: New file. + * testsuite/gas/cfi/cie-version-3.d: New file. + * testsuite/gas/cfi/cie-version-4.d: New file. + * testsuite/gas/cfi/cie-version.s: New file. + +2019-11-14 Jan Beulich + + * config/tc-i386.c (operand_size_match, md_assemble, + parse_insn, match_template, process_suffix, output_jump, + output_insn, i386_displacement): Adjust jump* field use/ + handling. + * config/tc-i386-intel.c (i386_intel_operand): Likewise. + +2019-11-14 Jan Beulich + + * config/tc-i386.c (struct _i386_insn): Add jumpabsolute field. + (operand_type_match): Drop jumpabsolute use. + (type_names): Remove OPERAND_TYPE_JUMPABSOLUTE entry. + (process_suffix, i386_displacement): Adjust jumpabsolute uses. + (match_template, i386_att_operand): Adjust jumpabsolute + handling. + * config/tc-i386-intel.c (i386_intel_operand): Likewise. + +2019-11-14 Jan Beulich + + * config/tc-i386.c (operand_size_match): Adjust anysize use. + +2019-11-14 Jan Beulich + + * testsuite/gas/i386/intel-cmps32.d, + testsuite/gas/i386/intel-cmps64.d: Correct regexp closing + parentheses placement. + +2019-11-14 Jan Beulich + + * testsuite/gas/i386/intel-cmps.s, + testsuite/gas/i386/intel-movs.s: Extend. + * testsuite/gas/i386/intel-cmps32.d, + testsuite/gas/i386/intel-cmps64.d, + testsuite/gas/i386/intel-movs32.d, + testsuite/gas/i386/intel-movs64.d: Adjust expectations. + * testsuite/gas/i386/intel-cmps16.d, + testsuite/gas/i386/intel-movs16.d: New. + * testsuite/gas/i386/i386.exp: Run new tests. + +2019-11-12 Nelson Chu + + * testsuite/gas/riscv/insn.d: Add the f extension to -march option. + +2019-11-12 Mihail Ionescu + + * config/tc-arm.c (do_vfp_nsyn_push): Move in order to enable it for + both fpu_vfp_ext_v1xd and mve_ext and add call to the aliased vstm + instruction for mve_ext. + (do_vfp_nsyn_pop): Move in order to enable it for both + fpu_vfp_ext_v1xd and mve_ext and add call to the aliased vldm + instruction for mve_ext. + (do_neon_ldm_stm): Add fpu_vfp_ext_v1 and mve_ext checks. + (insns): Enable vldm, vldmia, vldmdb, vstm, vstmia, vstmdb, vpop, + vpush, and fldd, fstd, flds, fsts for arm_ext_v6t2 instead + of fpu_vfp_ext_v1xd. + * testsuite/gas/arm/v8_1m-mve.s: New. + * testsuite/gas/arm/v8_1m-mve.d: New. + +2019-11-12 Mihail Ionescu + + * gas/config/tc-arm.c (do_neon_mvn): Allow mve_ext cmode=0xd. + * testsuite/gas/arm/mve-vmov-vmvn-vorr-vbic.s: New test. + * testsuite/gas/arm/mve-vmov-vmvn-vorr-vbic.d: Likewise. + +2019-11-12 Mihail Ionescu + + * config/tc-arm.c (s_arm_fpu): Clear selected_cpu fpu bits. + (fpu_any): Remove OBJ_ELF guards. + * testsuite/gas/arm/fpu-rst.s: New. + * testsuite/gas/arm/fpu-rst.d: New. + * testsuite/gas/arm/fpu-rst.l: New. + +2019-11-12 Jan Beulich + + * config/tc-i386.c (type_names): Remove OPERAND_TYPE_ESSEG + entry. + (md_assemble): Adjust isstring field use. Add assertion. + (check_string): Mostly re-write. + (i386_index_check): Adjust isstring field use and related code. + +2019-11-12 Jan Beulich + + * config/tc-i386.c (process_immext): Remove SSE3, SVME, and + MWAITX special case logic. + (process_suffix): Replace immext field uses by instance ones. + * testsuite/gas/i386/arch-13.s, + testsuite/gas/i386/x86-64-arch-3.s: Add CLZERO with operand + cases. + * testsuite/gas/i386/svme.s: Add 16-bit operand cases. + * testsuite/gas/i386/x86-64-specific-reg.s: Drop FIXME comments. + * testsuite/gas/i386/arch-13.d, + testsuite/gas/i386/mwaitx-reg.l, testsuite/gas/i386/svme.d, + testsuite/gas/i386/x86-64-arch-3.d, + testsuite/gas/i386/x86-64-mwaitx-reg.l, + testsuite/gas/i386/x86-64-specific-reg.l: Adjust expectations. + +2019-11-12 Jan Beulich + + * config/tc-i386.c (operand_type_set, operand_type_and, + operand_type_and_not, operand_type_or, operand_type_xor): Handle + "instance" field specially. + (operand_size_match, md_assemble, match_template, process_suffix, + check_byte_reg, check_long_reg, check_qword_reg, check_word_reg, + process_operands, build_modrm_byte): Use "instance" instead of + "acc" / "inoutportreg" / "shiftcount" fields. + (optimize_imm): Adjust comment. + +2019-11-11 Jan Beulich + + * testsuite/gas/aarch64/illegal-sve2.s: Add smaxp/sminp cases + with mismatched 1st and 3rd operands. + * testsuite/gas/aarch64/illegal-sve2.l: Adjust expectations. + +2019-11-08 H.J. Lu + + PR gas/25167 + * config/tc-i386.c (match_template): Don't check instruction + suffix set from operand. + * testsuite/gas/i386/code16.d: New file. + * testsuite/gas/i386/code16.s: Likewise. + * testsuite/gas/i386/i386.exp: Run code16. + +2019-11-08 Jan Beulich + + * config/tc-i386.c (optimize_encoding, build_modrm_byte, + check_VecOperations, parse_real_register): Use "class" instead + of "regmask" and "regbnd" fields. + +2019-11-08 Jan Beulich + + * config/tc-i386.c (match_mem_size, operand_size_match, + operand_type_register_match, pi, check_VecOperands, match_template, + check_byte_reg, check_long_reg, check_qword_reg, process_operands, + build_modrm_byte, parse_real_register): Use "class" instead of + "regsimd" / "regmmx" fields. + +2019-11-08 Jan Beulich + + * config/tc-i386.c (pi, check_byte_reg, build_modrm_byte, + parse_real_register): Use "class" instead of "control"/"debug"/ + "test" fields. + +2019-11-08 Jan Beulich + + * config/tc-i386.c (pi, check_byte_reg, process_operands, + build_modrm_byte, i386_att_operand, parse_real_register): Use + "class" instead of "sreg" field. + * config/tc-i386-intel.c (i386_intel_simplify_register, + i386_intel_operand): Likewise. + 2019-11-08 Jan Beulich * config/tc-i386.c (operand_type_set, operand_type_and,