X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gas%2Fcgen.c;h=109b086b77c1846b133d511ddbf668fe31dd0a2a;hb=ffa54e5c48223b42840f93e56a5eff69998ab4e1;hp=67b9b16186e288d50efc724afeb8263ce7026771;hpb=2ee563b53258d390d7446e90a67f465d504ae44c;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/cgen.c b/gas/cgen.c index 67b9b16186..109b086b77 100644 --- a/gas/cgen.c +++ b/gas/cgen.c @@ -1,35 +1,53 @@ /* GAS interface for targets using CGEN: Cpu tools GENerator. - Copyright 1996, 1997, 1998, 1999, 2000, 2001 - Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, + 2006, 2007, 2009, 2010 Free Software Foundation, Inc. -This file is part of GAS, the GNU Assembler. + This file is part of GAS, the GNU Assembler. -GAS is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -GAS is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + GAS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License -along with GAS; see the file COPYING. If not, write to the Free Software -Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with GAS; see the file COPYING. If not, write to the Free Software + Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ #include -#include "ansidecl.h" -#include "libiberty.h" -#include "bfd.h" +#include "as.h" #include "symcat.h" #include "cgen-desc.h" -#include "as.h" #include "subsegs.h" #include "cgen.h" #include "dwarf2dbg.h" -static void queue_fixup PARAMS ((int, int, expressionS *)); +#include "symbols.h" +#include "struc-symbol.h" + +#ifdef OBJ_COMPLEX_RELC +static expressionS * make_right_shifted_expr + (expressionS *, const int, const int); + +static unsigned long gas_cgen_encode_addend + (const unsigned long, const unsigned long, const unsigned long, \ + const unsigned long, const unsigned long, const unsigned long, \ + const unsigned long); + +static char * weak_operand_overflow_check + (const expressionS *, const CGEN_OPERAND *); + +static void queue_fixup_recursively + (const int, const int, expressionS *, \ + const CGEN_MAYBE_MULTI_IFLD *, const int, const int); + +static int rightshift = 0; +#endif +static void queue_fixup (int, int, expressionS *); /* Opcode table descriptor, must be set by md_begin. */ @@ -61,10 +79,13 @@ cgen_asm_record_register (name, number) OPINDEX is the index in the operand table. OPINFO is something the caller chooses to help in reloc determination. */ -struct fixup { +struct fixup +{ int opindex; int opinfo; expressionS exp; + struct cgen_maybe_multi_ifield * field; + int msb_field_p; }; static struct fixup fixups[GAS_CGEN_MAX_FIXUPS]; @@ -112,7 +133,7 @@ queue_fixup (opindex, opinfo, expP) gas_cgen_initialize_saved_fixups_array(): Sets num_fixups_in_chain to 0 for each element. Call this from md_begin() if you plan to use these functions and you want the - fixup count in each element to be set to 0 intially. This is + fixup count in each element to be set to 0 initially. This is not necessary, but it's included just in case. It performs the same function for each element in the array of fixup chains that gas_init_parse() performs for the current fixups. @@ -130,7 +151,8 @@ queue_fixup (opindex, opinfo, expP) element - swap the current fixups with those in this element number. */ -struct saved_fixups { +struct saved_fixups +{ struct fixup fixup_chain[GAS_CGEN_MAX_FIXUPS]; int num_fixups_in_chain; }; @@ -223,7 +245,7 @@ gas_cgen_swap_fixups (i) At this point we do not use a bfd_reloc_code_real_type for operands residing in the insn, but instead just use the operand index. This lets us easily handle fixups for any - operand type. We pick a BFD reloc type in md_apply_fix3. */ + operand type. We pick a BFD reloc type in md_apply_fix. */ fixS * gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offset) @@ -240,7 +262,6 @@ gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offse /* It may seem strange to use operand->attrs and not insn->attrs here, but it is the operand that has a pc relative relocation. */ - fixP = fix_new (frag, where, length / 8, symbol, offset, CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR), (bfd_reloc_code_real_type) @@ -248,6 +269,8 @@ gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offse + (int) operand->type)); fixP->fx_cgen.insn = insn; fixP->fx_cgen.opinfo = opinfo; + fixP->fx_cgen.field = NULL; + fixP->fx_cgen.msb_field_p = 0; return fixP; } @@ -263,7 +286,7 @@ gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offse At this point we do not use a bfd_reloc_code_real_type for operands residing in the insn, but instead just use the operand index. This lets us easily handle fixups for any - operand type. We pick a BFD reloc type in md_apply_fix3. */ + operand type. We pick a BFD reloc type in md_apply_fix. */ fixS * gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp) @@ -279,7 +302,6 @@ gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp) /* It may seem strange to use operand->attrs and not insn->attrs here, but it is the operand that has a pc relative relocation. */ - fixP = fix_new_exp (frag, where, length / 8, exp, CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR), (bfd_reloc_code_real_type) @@ -287,10 +309,26 @@ gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp) + (int) operand->type)); fixP->fx_cgen.insn = insn; fixP->fx_cgen.opinfo = opinfo; + fixP->fx_cgen.field = NULL; + fixP->fx_cgen.msb_field_p = 0; return fixP; } +#ifdef OBJ_COMPLEX_RELC +static symbolS * +expr_build_binary (operatorT op, symbolS * s1, symbolS * s2) +{ + expressionS e; + + e.X_op = op; + e.X_add_symbol = s1; + e.X_op_symbol = s2; + e.X_add_number = 0; + return make_expr_symbol (& e); +} +#endif + /* Used for communication between the next two procedures. */ static jmp_buf expr_jmp_buf; static int expr_jmp_buf_p; @@ -308,7 +346,12 @@ static int expr_jmp_buf_p; const char * gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) + +#ifdef OBJ_COMPLEX_RELC + CGEN_CPU_DESC cd; +#else CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; +#endif enum cgen_parse_operand_type want; const char **strP; int opindex; @@ -320,13 +363,22 @@ gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) /* These are volatile to survive the setjmp. */ char * volatile hold; enum cgen_parse_operand_result * volatile resultP_1; + volatile int opinfo_1; #else static char *hold; static enum cgen_parse_operand_result *resultP_1; + int opinfo_1; #endif const char *errmsg; expressionS exp; +#ifdef OBJ_COMPLEX_RELC + volatile int signed_p = 0; + symbolS * stmp = NULL; + bfd_reloc_code_real_type reloc_type; + const CGEN_OPERAND * operand; + fixS dummy_fixup; +#endif if (want == CGEN_PARSE_OPERAND_INIT) { gas_cgen_init_parse (); @@ -336,6 +388,7 @@ gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) resultP_1 = resultP; hold = input_line_pointer; input_line_pointer = (char *) *strP; + opinfo_1 = opinfo; /* We rely on md_operand to longjmp back to us. This is done via gas_cgen_md_operand. */ @@ -355,6 +408,10 @@ gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) *strP = input_line_pointer; input_line_pointer = hold; +#ifdef TC_CGEN_PARSE_FIX_EXP + opinfo_1 = TC_CGEN_PARSE_FIX_EXP (opinfo_1, & exp); +#endif + /* FIXME: Need to check `want'. */ switch (exp.X_op) @@ -368,6 +425,8 @@ gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; break; case O_constant: + if (want == CGEN_PARSE_OPERAND_SYMBOLIC) + goto de_fault; *valueP = exp.X_add_number; *resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER; break; @@ -375,10 +434,85 @@ gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) *valueP = exp.X_add_number; *resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER; break; + de_fault: default: - queue_fixup (opindex, opinfo, &exp); +#ifdef OBJ_COMPLEX_RELC + /* Look up operand, check to see if there's an obvious + overflow (this helps disambiguate some insn parses). */ + operand = cgen_operand_lookup_by_num (cd, opindex); + errmsg = weak_operand_overflow_check (& exp, operand); + + if (! errmsg) + { + /* Fragment the expression as necessary, and queue a reloc. */ + memset (& dummy_fixup, 0, sizeof (fixS)); + + reloc_type = md_cgen_lookup_reloc (0, operand, & dummy_fixup); + + if (exp.X_op == O_symbol + && reloc_type == BFD_RELOC_RELC + && exp.X_add_symbol->sy_value.X_op == O_constant + && (!exp.X_add_symbol->bsym + || (exp.X_add_symbol->bsym->section != expr_section + && exp.X_add_symbol->bsym->section != absolute_section + && exp.X_add_symbol->bsym->section != undefined_section))) + { + /* Local labels will have been (eagerly) turned into constants + by now, due to the inappropriately deep insight of the + expression parser. Unfortunately make_expr_symbol + prematurely dives into the symbol evaluator, and in this + case it gets a bad answer, so we manually create the + expression symbol we want here. */ + stmp = symbol_create (FAKE_LABEL_NAME, expr_section, 0, + & zero_address_frag); + symbol_set_value_expression (stmp, & exp); + } + else + stmp = make_expr_symbol (& exp); + + /* If this is a pc-relative RELC operand, we + need to subtract "." from the expression. */ + if (reloc_type == BFD_RELOC_RELC + && CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR)) + stmp = expr_build_binary (O_subtract, stmp, expr_build_dot ()); + + /* FIXME: this is not a perfect heuristic for figuring out + whether an operand is signed: it only works when the operand + is an immediate. it's not terribly likely that any other + values will be signed relocs, but it's possible. */ + if (operand && (operand->hw_type == HW_H_SINT)) + signed_p = 1; + + if (stmp->bsym && (stmp->bsym->section == expr_section)) + { + if (signed_p) + stmp->bsym->flags |= BSF_SRELC; + else + stmp->bsym->flags |= BSF_RELC; + } + + /* Now package it all up for the fixup emitter. */ + exp.X_op = O_symbol; + exp.X_op_symbol = 0; + exp.X_add_symbol = stmp; + exp.X_add_number = 0; + + /* Re-init rightshift quantity, just in case. */ + rightshift = operand->length; + queue_fixup_recursively (opindex, opinfo_1, & exp, + (reloc_type == BFD_RELOC_RELC) ? + & (operand->index_fields) : 0, + signed_p, -1); + } + * resultP = errmsg + ? CGEN_PARSE_OPERAND_RESULT_ERROR + : CGEN_PARSE_OPERAND_RESULT_QUEUED; + *valueP = 0; +#else + queue_fixup (opindex, opinfo_1, &exp); *valueP = 0; *resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED; +#endif break; } @@ -431,7 +565,7 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) Relaxable instructions: We need to ensure we allocate enough space for the largest insn. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX)) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED)) /* These currently shouldn't get here. */ abort (); @@ -515,7 +649,7 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) /* If we're recording insns as numbers (rather than a string of bytes), target byte order handling is deferred until now. */ #if CGEN_INT_INSN_P - cgen_put_insn_value (gas_cgen_cpu_desc, f, length, *buf); + cgen_put_insn_value (gas_cgen_cpu_desc, (unsigned char *) f, length, *buf); #else memcpy (f, buf, byte_len); #endif @@ -531,7 +665,7 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex); /* Don't create fixups for these. That's done during relaxation. - We don't need to test for CGEN_INSN_RELAX as they can't get here + We don't need to test for CGEN_INSN_RELAXED as they can't get here (see above). */ if (relax_p && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE) @@ -546,6 +680,8 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) insn, length, operand, fixups[i].opinfo, &fixups[i].exp); + fixP->fx_cgen.field = fixups[i].field; + fixP->fx_cgen.msb_field_p = fixups[i].msb_field_p; if (result) result->fixups[i] = fixP; } @@ -557,6 +693,168 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) } } +#ifdef OBJ_COMPLEX_RELC +/* Queue many fixups, recursively. If the field is a multi-ifield, + repeatedly queue its sub-parts, right shifted to fit into the field (we + assume here multi-fields represent a left-to-right, MSB0-LSB0 + reading). */ + +static void +queue_fixup_recursively (const int opindex, + const int opinfo, + expressionS * expP, + const CGEN_MAYBE_MULTI_IFLD * field, + const int signed_p, + const int part_of_multi) +{ + if (field && field->count) + { + int i; + + for (i = 0; i < field->count; ++ i) + queue_fixup_recursively (opindex, opinfo, expP, + & (field->val.multi[i]), signed_p, i); + } + else + { + expressionS * new_exp = expP; + +#ifdef DEBUG + printf ("queueing fixup for field %s\n", + (field ? field->val.leaf->name : "??")); + print_symbol_value (expP->X_add_symbol); +#endif + if (field && part_of_multi != -1) + { + rightshift -= field->val.leaf->length; + + /* Shift reloc value by number of bits remaining after this + field. */ + if (rightshift) + new_exp = make_right_shifted_expr (expP, rightshift, signed_p); + } + + /* Truncate reloc values to length, *after* leftmost one. */ + fixups[num_fixups].msb_field_p = (part_of_multi <= 0); + fixups[num_fixups].field = (CGEN_MAYBE_MULTI_IFLD *) field; + + queue_fixup (opindex, opinfo, new_exp); + } +} + +/* Encode the self-describing RELC reloc format's addend. */ + +static unsigned long +gas_cgen_encode_addend (const unsigned long start, /* in bits */ + const unsigned long len, /* in bits */ + const unsigned long oplen, /* in bits */ + const unsigned long wordsz, /* in bytes */ + const unsigned long chunksz, /* in bytes */ + const unsigned long signed_p, + const unsigned long trunc_p) +{ + unsigned long res = 0L; + + res |= start & 0x3F; + res |= (oplen & 0x3F) << 6; + res |= (len & 0x3F) << 12; + res |= (wordsz & 0xF) << 18; + res |= (chunksz & 0xF) << 22; + res |= (CGEN_INSN_LSB0_P ? 1 : 0) << 27; + res |= signed_p << 28; + res |= trunc_p << 29; + + return res; +} + +/* Purpose: make a weak check that the expression doesn't overflow the + operand it's to be inserted into. + + Rationale: some insns used to use %operators to disambiguate during a + parse. when these %operators are translated to expressions by the macro + expander, the ambiguity returns. we attempt to disambiguate by field + size. + + Method: check to see if the expression's top node is an O_and operator, + and the mask is larger than the operand length. This would be an + overflow, so signal it by returning an error string. Any other case is + ambiguous, so we assume it's OK and return NULL. */ + +static char * +weak_operand_overflow_check (const expressionS * exp, + const CGEN_OPERAND * operand) +{ + const unsigned long len = operand->length; + unsigned long mask; + unsigned long opmask = (((1L << (len - 1)) - 1) << 1) | 1; + + if (!exp) + return NULL; + + if (exp->X_op != O_bit_and) + { + /* Check for implicit overflow flag. */ + if (CGEN_OPERAND_ATTR_VALUE + (operand, CGEN_OPERAND_RELOC_IMPLIES_OVERFLOW)) + return _("a reloc on this operand implies an overflow"); + return NULL; + } + + mask = exp->X_add_number; + + if (exp->X_add_symbol + && exp->X_add_symbol->sy_value.X_op == O_constant) + mask |= exp->X_add_symbol->sy_value.X_add_number; + + if (exp->X_op_symbol + && exp->X_op_symbol->sy_value.X_op == O_constant) + mask |= exp->X_op_symbol->sy_value.X_add_number; + + /* Want to know if mask covers more bits than opmask. + this is the same as asking if mask has any bits not in opmask, + or whether (mask & ~opmask) is nonzero. */ + if (mask && (mask & ~opmask)) + { +#ifdef DEBUG + printf ("overflow: (mask = %8.8x, ~opmask = %8.8x, AND = %8.8x)\n", + mask, ~opmask, (mask & ~opmask)); +#endif + return _("operand mask overflow"); + } + + return NULL; +} + +static expressionS * +make_right_shifted_expr (expressionS * exp, + const int amount, + const int signed_p) +{ + symbolS * stmp = 0; + expressionS * new_exp; + + stmp = expr_build_binary (O_right_shift, + make_expr_symbol (exp), + expr_build_uconstant (amount)); + + if (signed_p) + stmp->bsym->flags |= BSF_SRELC; + else + stmp->bsym->flags |= BSF_RELC; + + /* Then wrap that in a "symbol expr" for good measure. */ + new_exp = xmalloc (sizeof (expressionS)); + memset (new_exp, 0, sizeof (expressionS)); + new_exp->X_op = O_symbol; + new_exp->X_op_symbol = 0; + new_exp->X_add_symbol = stmp; + new_exp->X_add_number = 0; + + return new_exp; +} + +#endif + /* Apply a fixup to the object code. This is called for all the fixups we generated by the call to fix_new_exp, above. In the call above we used a reloc code which was the largest legal reloc code @@ -570,7 +868,7 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) should handle them all. */ void -gas_cgen_md_apply_fix3 (fixP, valP, seg) +gas_cgen_md_apply_fix (fixP, valP, seg) fixS * fixP; valueT * valP; segT seg ATTRIBUTE_UNUSED; @@ -580,39 +878,12 @@ gas_cgen_md_apply_fix3 (fixP, valP, seg) /* Canonical name, since used a lot. */ CGEN_CPU_DESC cd = gas_cgen_cpu_desc; - /* FIXME FIXME FIXME: The value we are passed in *valuep includes - the symbol values. Since we are using BFD_ASSEMBLER, if we are - doing this relocation the code in write.c is going to call - bfd_install_relocation, which is also going to use the symbol - value. That means that if the reloc is fully resolved we want to - use *valuep since bfd_install_relocation is not being used. - However, if the reloc is not fully resolved we do not want to use - *valuep, and must use fx_offset instead. However, if the reloc - is PC relative, we do want to use *valuep since it includes the - result of md_pcrel_from. This is confusing. */ - if (fixP->fx_addsy == (symbolS *) NULL) fixP->fx_done = 1; - else if (fixP->fx_pcrel) - ; - - else - { - value = fixP->fx_offset; - - if (fixP->fx_subsy != (symbolS *) NULL) - { - if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) - value -= S_GET_VALUE (fixP->fx_subsy); - else - { - /* We don't actually support subtracting a symbol. */ - as_bad_where (fixP->fx_file, fixP->fx_line, - _("expression too complex")); - } - } - } + /* We don't actually support subtracting a symbol. */ + if (fixP->fx_subsy != (symbolS *) NULL) + as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) { @@ -622,6 +893,32 @@ gas_cgen_md_apply_fix3 (fixP, valP, seg) bfd_reloc_code_real_type reloc_type; CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd)); const CGEN_INSN *insn = fixP->fx_cgen.insn; +#ifdef OBJ_COMPLEX_RELC + int start; + int length; + int signed_p = 0; + + if (fixP->fx_cgen.field) + { + /* Use the twisty little pointer path + back to the ifield if it exists. */ + start = fixP->fx_cgen.field->val.leaf->start; + length = fixP->fx_cgen.field->val.leaf->length; + } + else + { + /* Or the far less useful operand-size guesstimate. */ + start = operand->start; + length = operand->length; + } + + /* FIXME: this is not a perfect heuristic for figuring out + whether an operand is signed: it only works when the operand + is an immediate. it's not terribly likely that any other + values will be signed relocs, but it's possible. */ + if (operand && (operand->hw_type == HW_H_SINT)) + signed_p = 1; +#endif /* If the reloc has been fully resolved finish the operand here. */ /* FIXME: This duplicates the capabilities of code in BFD. */ @@ -636,17 +933,19 @@ gas_cgen_md_apply_fix3 (fixP, valP, seg) #if CGEN_INT_INSN_P { CGEN_INSN_INT insn_value = - cgen_get_insn_value (cd, where, CGEN_INSN_BITSIZE (insn)); + cgen_get_insn_value (cd, (unsigned char *) where, + CGEN_INSN_BITSIZE (insn)); /* ??? 0 is passed for `pc'. */ errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, &insn_value, (bfd_vma) 0); - cgen_put_insn_value (cd, where, CGEN_INSN_BITSIZE (insn), - insn_value); + cgen_put_insn_value (cd, (unsigned char *) where, + CGEN_INSN_BITSIZE (insn), insn_value); } #else /* ??? 0 is passed for `pc'. */ - errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, where, + errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, + (unsigned char *) where, (bfd_vma) 0); #endif if (errmsg) @@ -662,6 +961,18 @@ gas_cgen_md_apply_fix3 (fixP, valP, seg) partial_inplace == false. */ reloc_type = md_cgen_lookup_reloc (insn, operand, fixP); +#ifdef OBJ_COMPLEX_RELC + if (reloc_type == BFD_RELOC_RELC) + { + /* Change addend to "self-describing" form, + for BFD to handle in the linker. */ + value = gas_cgen_encode_addend (start, operand->length, + length, fixP->fx_size, + cd->insn_chunk_bitsize / 8, + signed_p, + ! (fixP->fx_cgen.msb_field_p)); + } +#endif if (reloc_type != BFD_RELOC_NONE) fixP->fx_r_type = reloc_type; @@ -717,7 +1028,6 @@ gas_cgen_tc_gen_reloc (section, fixP) fixS * fixP; { arelent *reloc; - reloc = (arelent *) xmalloc (sizeof (arelent)); reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); @@ -728,7 +1038,7 @@ gas_cgen_tc_gen_reloc (section, fixP) return NULL; } - assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); + gas_assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); @@ -743,3 +1053,15 @@ gas_cgen_tc_gen_reloc (section, fixP) reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; return reloc; } + +/* Perform any cgen specific initialisation. + Called after gas_cgen_cpu_desc has been created. */ + +void +gas_cgen_begin () +{ + if (flag_signed_overflow_ok) + cgen_set_signed_overflow_ok (gas_cgen_cpu_desc); + else + cgen_clear_signed_overflow_ok (gas_cgen_cpu_desc); +}