X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gas%2Fconfig%2Ftc-bfin.c;h=adbc3e4b8c96e0f143c1c2036072d5e719375cc4;hb=fa9efd0fbc3f388e06f8f893c168e8e612216230;hp=58b7ed124f650cbfa39fc25ef059f7b240af7c5b;hpb=aa820537ead0135a7c38c619039dce8a6fc74ed1;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/config/tc-bfin.c b/gas/config/tc-bfin.c index 58b7ed124f..adbc3e4b8c 100644 --- a/gas/config/tc-bfin.c +++ b/gas/config/tc-bfin.c @@ -57,163 +57,6 @@ FILE *errorf; static flagword bfin_flags = DEFAULT_FLAGS | DEFAULT_FDPIC; static const char *bfin_pic_flag = DEFAULT_FDPIC ? "-mfdpic" : (const char *)0; -/* Registers list. */ -struct bfin_reg_entry -{ - const char *name; - int number; -}; - -static const struct bfin_reg_entry bfin_reg_info[] = { - {"R0.L", REG_RL0}, - {"R1.L", REG_RL1}, - {"R2.L", REG_RL2}, - {"R3.L", REG_RL3}, - {"R4.L", REG_RL4}, - {"R5.L", REG_RL5}, - {"R6.L", REG_RL6}, - {"R7.L", REG_RL7}, - {"R0.H", REG_RH0}, - {"R1.H", REG_RH1}, - {"R2.H", REG_RH2}, - {"R3.H", REG_RH3}, - {"R4.H", REG_RH4}, - {"R5.H", REG_RH5}, - {"R6.H", REG_RH6}, - {"R7.H", REG_RH7}, - {"R0", REG_R0}, - {"R1", REG_R1}, - {"R2", REG_R2}, - {"R3", REG_R3}, - {"R4", REG_R4}, - {"R5", REG_R5}, - {"R6", REG_R6}, - {"R7", REG_R7}, - {"P0", REG_P0}, - {"P0.H", REG_P0}, - {"P0.L", REG_P0}, - {"P1", REG_P1}, - {"P1.H", REG_P1}, - {"P1.L", REG_P1}, - {"P2", REG_P2}, - {"P2.H", REG_P2}, - {"P2.L", REG_P2}, - {"P3", REG_P3}, - {"P3.H", REG_P3}, - {"P3.L", REG_P3}, - {"P4", REG_P4}, - {"P4.H", REG_P4}, - {"P4.L", REG_P4}, - {"P5", REG_P5}, - {"P5.H", REG_P5}, - {"P5.L", REG_P5}, - {"SP", REG_SP}, - {"SP.L", REG_SP}, - {"SP.H", REG_SP}, - {"FP", REG_FP}, - {"FP.L", REG_FP}, - {"FP.H", REG_FP}, - {"A0x", REG_A0x}, - {"A1x", REG_A1x}, - {"A0w", REG_A0w}, - {"A1w", REG_A1w}, - {"A0.x", REG_A0x}, - {"A1.x", REG_A1x}, - {"A0.w", REG_A0w}, - {"A1.w", REG_A1w}, - {"A0", REG_A0}, - {"A0.L", REG_A0}, - {"A0.H", REG_A0}, - {"A1", REG_A1}, - {"A1.L", REG_A1}, - {"A1.H", REG_A1}, - {"I0", REG_I0}, - {"I0.L", REG_I0}, - {"I0.H", REG_I0}, - {"I1", REG_I1}, - {"I1.L", REG_I1}, - {"I1.H", REG_I1}, - {"I2", REG_I2}, - {"I2.L", REG_I2}, - {"I2.H", REG_I2}, - {"I3", REG_I3}, - {"I3.L", REG_I3}, - {"I3.H", REG_I3}, - {"M0", REG_M0}, - {"M0.H", REG_M0}, - {"M0.L", REG_M0}, - {"M1", REG_M1}, - {"M1.H", REG_M1}, - {"M1.L", REG_M1}, - {"M2", REG_M2}, - {"M2.H", REG_M2}, - {"M2.L", REG_M2}, - {"M3", REG_M3}, - {"M3.H", REG_M3}, - {"M3.L", REG_M3}, - {"B0", REG_B0}, - {"B0.H", REG_B0}, - {"B0.L", REG_B0}, - {"B1", REG_B1}, - {"B1.H", REG_B1}, - {"B1.L", REG_B1}, - {"B2", REG_B2}, - {"B2.H", REG_B2}, - {"B2.L", REG_B2}, - {"B3", REG_B3}, - {"B3.H", REG_B3}, - {"B3.L", REG_B3}, - {"L0", REG_L0}, - {"L0.H", REG_L0}, - {"L0.L", REG_L0}, - {"L1", REG_L1}, - {"L1.H", REG_L1}, - {"L1.L", REG_L1}, - {"L2", REG_L2}, - {"L2.H", REG_L2}, - {"L2.L", REG_L2}, - {"L3", REG_L3}, - {"L3.H", REG_L3}, - {"L3.L", REG_L3}, - {"AZ", S_AZ}, - {"AN", S_AN}, - {"AC0", S_AC0}, - {"AC1", S_AC1}, - {"AV0", S_AV0}, - {"AV0S", S_AV0S}, - {"AV1", S_AV1}, - {"AV1S", S_AV1S}, - {"AQ", S_AQ}, - {"V", S_V}, - {"VS", S_VS}, - {"sftreset", REG_sftreset}, - {"omode", REG_omode}, - {"excause", REG_excause}, - {"emucause", REG_emucause}, - {"idle_req", REG_idle_req}, - {"hwerrcause", REG_hwerrcause}, - {"CC", REG_CC}, - {"LC0", REG_LC0}, - {"LC1", REG_LC1}, - {"ASTAT", REG_ASTAT}, - {"RETS", REG_RETS}, - {"LT0", REG_LT0}, - {"LB0", REG_LB0}, - {"LT1", REG_LT1}, - {"LB1", REG_LB1}, - {"CYCLES", REG_CYCLES}, - {"CYCLES2", REG_CYCLES2}, - {"USP", REG_USP}, - {"SEQSTAT", REG_SEQSTAT}, - {"SYSCFG", REG_SYSCFG}, - {"RETI", REG_RETI}, - {"RETX", REG_RETX}, - {"RETN", REG_RETN}, - {"RETE", REG_RETE}, - {"EMUDAT", REG_EMUDAT}, - {0, 0} -}; - /* Blackfin specific function to handle FD-PIC pointer initializations. */ static void @@ -508,10 +351,7 @@ md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED) } if (p == NULL) - { - error ("-mcpu=%s is not valid", arg); - return 0; - } + as_fatal ("-mcpu=%s is not valid", arg); bfin_cpu_type = bfin_cpus[i].type; @@ -545,8 +385,7 @@ md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED) || si_major > 0xff || si_minor > 0xff) { invalid_silicon_revision: - error ("-mcpu=%s has invalid silicon revision", arg); - return 0; + as_fatal ("-mcpu=%s has invalid silicon revision", arg); } bfin_si_revision = (si_major << 8) | si_minor; @@ -712,6 +551,10 @@ md_assemble (char *line) #ifdef OBJ_ELF dwarf2_emit_insn (insn_size); #endif + + while (*line++ != '\0') + if (*line == '\n') + bump_line_counters (); } /* Parse one line of instructions, and generate opcode for it. @@ -1016,123 +859,6 @@ bfin_fix_adjustable (fixS *fixP) } } - -/* Handle the LOOP_BEGIN and LOOP_END statements. - Parse the Loop_Begin/Loop_End and create a label. */ -void -bfin_start_line_hook () -{ - bfd_boolean maybe_begin = FALSE; - bfd_boolean maybe_end = FALSE; - - char *c1, *label_name; - symbolS *line_label; - char *c = input_line_pointer; - int cr_num = 0; - - while (ISSPACE (*c)) - { - if (*c == '\n') - cr_num++; - c++; - } - - /* Look for Loop_Begin or Loop_End statements. */ - - if (*c != 'L' && *c != 'l') - return; - - c++; - if (*c != 'O' && *c != 'o') - return; - - c++; - if (*c != 'O' && *c != 'o') - return; - - c++; - if (*c != 'P' && *c != 'p') - return; - - c++; - if (*c != '_') - return; - - c++; - if (*c == 'E' || *c == 'e') - maybe_end = TRUE; - else if (*c == 'B' || *c == 'b') - maybe_begin = TRUE; - else - return; - - if (maybe_end) - { - c++; - if (*c != 'N' && *c != 'n') - return; - - c++; - if (*c != 'D' && *c != 'd') - return; - } - - if (maybe_begin) - { - c++; - if (*c != 'E' && *c != 'e') - return; - - c++; - if (*c != 'G' && *c != 'g') - return; - - c++; - if (*c != 'I' && *c != 'i') - return; - - c++; - if (*c != 'N' && *c != 'n') - return; - } - - c++; - while (ISSPACE (*c)) c++; - c1 = c; - while (ISALPHA (*c) || ISDIGIT (*c) || *c == '_') c++; - - if (input_line_pointer[-1] == '\n') - bump_line_counters (); - - while (cr_num--) - bump_line_counters (); - - input_line_pointer = c; - if (maybe_end) - { - label_name = (char *) xmalloc ((c - c1) + strlen ("__END") + 5); - label_name[0] = 0; - strcat (label_name, "L$L$"); - strncat (label_name, c1, c-c1); - strcat (label_name, "__END"); - } - else /* maybe_begin. */ - { - label_name = (char *) xmalloc ((c - c1) + strlen ("__BEGIN") + 5); - label_name[0] = 0; - strcat (label_name, "L$L$"); - strncat (label_name, c1, c-c1); - strcat (label_name, "__BEGIN"); - } - - line_label = colon (label_name); - - /* Loop_End follows the last instruction in the loop. - Adjust label address. */ - if (maybe_end) - ((struct local_symbol *) line_label)->lsy_value -= last_insn_size; -} - /* Special extra functions that help bfin-parse.y perform its job. */ struct obstack mempool; @@ -2065,10 +1791,13 @@ bfin_gen_pseudodbg (int fn, int reg, int grp) INSTR_T bfin_gen_pseudodbg_assert (int dbgop, REG_T regtest, int expected) { + int grp; INIT (PseudoDbg_Assert); ASSIGN (dbgop); ASSIGN_R (regtest); + grp = GROUP (regtest); + ASSIGN (grp); ASSIGN (expected); return GEN_OPCODE32 (); @@ -2145,6 +1874,31 @@ bfin_gen_loop (Expr_Node *expr, REG_T reg, int rop, REG_T preg) return bfin_gen_loopsetup(lbegin, reg, rop, lend, preg); } +void +bfin_loop_beginend (Expr_Node *expr, int begin) +{ + const char *loopsym; + char *label_name; + symbolS *line_label; + const char *suffix = begin ? "__BEGIN" : "__END"; + + loopsym = expr->value.s_value; + label_name = (char *) xmalloc (strlen (loopsym) + strlen (suffix) + 5); + + label_name[0] = 0; + + strcat (label_name, "L$L$"); + strcat (label_name, loopsym); + strcat (label_name, suffix); + + line_label = colon (label_name); + + /* LOOP_END follows the last instruction in the loop. + Adjust label address. */ + if (!begin) + ((struct local_symbol *) line_label)->lsy_value -= last_insn_size; +} + bfd_boolean bfin_eol_in_insn (char *line) {